vc4: Emit perf debug when we fall back to quad clears.
[mesa.git] / src / gallium / drivers / vc4 / vc4_draw.c
1 /*
2 * Copyright (c) 2014 Scott Mansell
3 * Copyright © 2014 Broadcom
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_blitter.h"
26 #include "util/u_prim.h"
27 #include "util/u_format.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_upload_mgr.h"
30 #include "indices/u_primconvert.h"
31
32 #include "vc4_context.h"
33 #include "vc4_resource.h"
34
35 static void
36 vc4_get_draw_cl_space(struct vc4_job *job, int vert_count)
37 {
38 /* The SW-5891 workaround may cause us to emit multiple shader recs
39 * and draw packets.
40 */
41 int num_draws = DIV_ROUND_UP(vert_count, 65535) + 1;
42
43 /* Binner gets our packet state -- vc4_emit.c contents,
44 * and the primitive itself.
45 */
46 cl_ensure_space(&job->bcl,
47 256 + (VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE +
48 VC4_PACKET_GL_SHADER_STATE_SIZE) * num_draws);
49
50 /* Nothing for rcl -- that's covered by vc4_context.c */
51
52 /* shader_rec gets up to 12 dwords of reloc handles plus a maximally
53 * sized shader_rec (104 bytes base for 8 vattrs plus 32 bytes of
54 * vattr stride).
55 */
56 cl_ensure_space(&job->shader_rec,
57 (12 * sizeof(uint32_t) + 104 + 8 * 32) * num_draws);
58
59 /* Uniforms are covered by vc4_write_uniforms(). */
60
61 /* There could be up to 16 textures per stage, plus misc other
62 * pointers.
63 */
64 cl_ensure_space(&job->bo_handles, (2 * 16 + 20) * sizeof(uint32_t));
65 cl_ensure_space(&job->bo_pointers,
66 (2 * 16 + 20) * sizeof(struct vc4_bo *));
67 }
68
69 /**
70 * Does the initial bining command list setup for drawing to a given FBO.
71 */
72 static void
73 vc4_start_draw(struct vc4_context *vc4, int vert_count)
74 {
75 struct vc4_job *job = vc4->job;
76
77 if (job->needs_flush)
78 return;
79
80 vc4_get_draw_cl_space(job, 0);
81
82 struct vc4_cl_out *bcl = cl_start(&job->bcl);
83 // Tile state data is 48 bytes per tile, I think it can be thrown away
84 // as soon as binning is finished.
85 cl_u8(&bcl, VC4_PACKET_TILE_BINNING_MODE_CONFIG);
86 cl_u32(&bcl, 0); /* tile alloc addr, filled by kernel */
87 cl_u32(&bcl, 0); /* tile alloc size, filled by kernel */
88 cl_u32(&bcl, 0); /* tile state addr, filled by kernel */
89 cl_u8(&bcl, job->draw_tiles_x);
90 cl_u8(&bcl, job->draw_tiles_y);
91 /* Other flags are filled by kernel. */
92 cl_u8(&bcl, job->msaa ? VC4_BIN_CONFIG_MS_MODE_4X : 0);
93
94 /* START_TILE_BINNING resets the statechange counters in the hardware,
95 * which are what is used when a primitive is binned to a tile to
96 * figure out what new state packets need to be written to that tile's
97 * command list.
98 */
99 cl_u8(&bcl, VC4_PACKET_START_TILE_BINNING);
100
101 /* Reset the current compressed primitives format. This gets modified
102 * by VC4_PACKET_GL_INDEXED_PRIMITIVE and
103 * VC4_PACKET_GL_ARRAY_PRIMITIVE, so it needs to be reset at the start
104 * of every tile.
105 */
106 cl_u8(&bcl, VC4_PACKET_PRIMITIVE_LIST_FORMAT);
107 cl_u8(&bcl, (VC4_PRIMITIVE_LIST_FORMAT_16_INDEX |
108 VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES));
109
110 job->needs_flush = true;
111 job->draw_calls_queued++;
112 job->draw_width = vc4->framebuffer.width;
113 job->draw_height = vc4->framebuffer.height;
114
115 cl_end(&job->bcl, bcl);
116 }
117
118 static void
119 vc4_predraw_check_textures(struct pipe_context *pctx,
120 struct vc4_texture_stateobj *stage_tex)
121 {
122 struct vc4_context *vc4 = vc4_context(pctx);
123
124 for (int i = 0; i < stage_tex->num_textures; i++) {
125 struct pipe_sampler_view *view = stage_tex->textures[i];
126 if (!view)
127 continue;
128 struct vc4_resource *rsc = vc4_resource(view->texture);
129 if (rsc->shadow_parent)
130 vc4_update_shadow_baselevel_texture(pctx, view);
131
132 vc4_flush_jobs_writing_resource(vc4, view->texture);
133 }
134 }
135
136 static void
137 vc4_emit_gl_shader_state(struct vc4_context *vc4,
138 const struct pipe_draw_info *info,
139 uint32_t extra_index_bias)
140 {
141 struct vc4_job *job = vc4->job;
142 /* VC4_DIRTY_VTXSTATE */
143 struct vc4_vertex_stateobj *vtx = vc4->vtx;
144 /* VC4_DIRTY_VTXBUF */
145 struct vc4_vertexbuf_stateobj *vertexbuf = &vc4->vertexbuf;
146
147 /* The simulator throws a fit if VS or CS don't read an attribute, so
148 * we emit a dummy read.
149 */
150 uint32_t num_elements_emit = MAX2(vtx->num_elements, 1);
151 /* Emit the shader record. */
152 struct vc4_cl_out *shader_rec =
153 cl_start_shader_reloc(&job->shader_rec, 3 + num_elements_emit);
154 /* VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER */
155 cl_u16(&shader_rec,
156 VC4_SHADER_FLAG_ENABLE_CLIPPING |
157 VC4_SHADER_FLAG_FS_SINGLE_THREAD |
158 ((info->mode == PIPE_PRIM_POINTS &&
159 vc4->rasterizer->base.point_size_per_vertex) ?
160 VC4_SHADER_FLAG_VS_POINT_SIZE : 0));
161
162 /* VC4_DIRTY_COMPILED_FS */
163 cl_u8(&shader_rec, 0); /* fs num uniforms (unused) */
164 cl_u8(&shader_rec, vc4->prog.fs->num_inputs);
165 cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.fs->bo, 0);
166 cl_u32(&shader_rec, 0); /* UBO offset written by kernel */
167
168 /* VC4_DIRTY_COMPILED_VS */
169 cl_u16(&shader_rec, 0); /* vs num uniforms */
170 cl_u8(&shader_rec, vc4->prog.vs->vattrs_live);
171 cl_u8(&shader_rec, vc4->prog.vs->vattr_offsets[8]);
172 cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.vs->bo, 0);
173 cl_u32(&shader_rec, 0); /* UBO offset written by kernel */
174
175 /* VC4_DIRTY_COMPILED_CS */
176 cl_u16(&shader_rec, 0); /* cs num uniforms */
177 cl_u8(&shader_rec, vc4->prog.cs->vattrs_live);
178 cl_u8(&shader_rec, vc4->prog.cs->vattr_offsets[8]);
179 cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.cs->bo, 0);
180 cl_u32(&shader_rec, 0); /* UBO offset written by kernel */
181
182 uint32_t max_index = 0xffff;
183 for (int i = 0; i < vtx->num_elements; i++) {
184 struct pipe_vertex_element *elem = &vtx->pipe[i];
185 struct pipe_vertex_buffer *vb =
186 &vertexbuf->vb[elem->vertex_buffer_index];
187 struct vc4_resource *rsc = vc4_resource(vb->buffer);
188 /* not vc4->dirty tracked: vc4->last_index_bias */
189 uint32_t offset = (vb->buffer_offset +
190 elem->src_offset +
191 vb->stride * (info->index_bias +
192 extra_index_bias));
193 uint32_t vb_size = rsc->bo->size - offset;
194 uint32_t elem_size =
195 util_format_get_blocksize(elem->src_format);
196
197 cl_reloc(job, &job->shader_rec, &shader_rec, rsc->bo, offset);
198 cl_u8(&shader_rec, elem_size - 1);
199 cl_u8(&shader_rec, vb->stride);
200 cl_u8(&shader_rec, vc4->prog.vs->vattr_offsets[i]);
201 cl_u8(&shader_rec, vc4->prog.cs->vattr_offsets[i]);
202
203 if (vb->stride > 0) {
204 max_index = MIN2(max_index,
205 (vb_size - elem_size) / vb->stride);
206 }
207 }
208
209 if (vtx->num_elements == 0) {
210 assert(num_elements_emit == 1);
211 struct vc4_bo *bo = vc4_bo_alloc(vc4->screen, 4096, "scratch VBO");
212 cl_reloc(job, &job->shader_rec, &shader_rec, bo, 0);
213 cl_u8(&shader_rec, 16 - 1); /* element size */
214 cl_u8(&shader_rec, 0); /* stride */
215 cl_u8(&shader_rec, 0); /* VS VPM offset */
216 cl_u8(&shader_rec, 0); /* CS VPM offset */
217 vc4_bo_unreference(&bo);
218 }
219 cl_end(&job->shader_rec, shader_rec);
220
221 struct vc4_cl_out *bcl = cl_start(&job->bcl);
222 /* the actual draw call. */
223 cl_u8(&bcl, VC4_PACKET_GL_SHADER_STATE);
224 assert(vtx->num_elements <= 8);
225 /* Note that number of attributes == 0 in the packet means 8
226 * attributes. This field also contains the offset into shader_rec.
227 */
228 cl_u32(&bcl, num_elements_emit & 0x7);
229 cl_end(&job->bcl, bcl);
230
231 vc4_write_uniforms(vc4, vc4->prog.fs,
232 &vc4->constbuf[PIPE_SHADER_FRAGMENT],
233 &vc4->fragtex);
234 vc4_write_uniforms(vc4, vc4->prog.vs,
235 &vc4->constbuf[PIPE_SHADER_VERTEX],
236 &vc4->verttex);
237 vc4_write_uniforms(vc4, vc4->prog.cs,
238 &vc4->constbuf[PIPE_SHADER_VERTEX],
239 &vc4->verttex);
240
241 vc4->last_index_bias = info->index_bias + extra_index_bias;
242 vc4->max_index = max_index;
243 job->shader_rec_count++;
244 }
245
246 /**
247 * HW-2116 workaround: Flush the batch before triggering the hardware state
248 * counter wraparound behavior.
249 *
250 * State updates are tracked by a global counter which increments at the first
251 * state update after a draw or a START_BINNING. Tiles can then have their
252 * state updated at draw time with a set of cheap checks for whether the
253 * state's copy of the global counter matches the global counter the last time
254 * that state was written to the tile.
255 *
256 * The state counters are relatively small and wrap around quickly, so you
257 * could get false negatives for needing to update a particular state in the
258 * tile. To avoid this, the hardware attempts to write all of the state in
259 * the tile at wraparound time. This apparently is broken, so we just flush
260 * everything before that behavior is triggered. A batch flush is sufficient
261 * to get our current contents drawn and reset the counters to 0.
262 *
263 * Note that we can't just use VC4_PACKET_FLUSH_ALL, because that caps the
264 * tiles with VC4_PACKET_RETURN_FROM_LIST.
265 */
266 static void
267 vc4_hw_2116_workaround(struct pipe_context *pctx)
268 {
269 struct vc4_context *vc4 = vc4_context(pctx);
270 struct vc4_job *job = vc4_get_job_for_fbo(vc4);
271
272 if (job->draw_calls_queued == 0x1ef0) {
273 perf_debug("Flushing batch due to HW-2116 workaround "
274 "(too many draw calls per scene\n");
275 vc4_job_submit(vc4, job);
276 }
277 }
278
279 static void
280 vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
281 {
282 struct vc4_context *vc4 = vc4_context(pctx);
283
284 if (info->mode >= PIPE_PRIM_QUADS) {
285 util_primconvert_save_index_buffer(vc4->primconvert, &vc4->indexbuf);
286 util_primconvert_save_rasterizer_state(vc4->primconvert, &vc4->rasterizer->base);
287 util_primconvert_draw_vbo(vc4->primconvert, info);
288 perf_debug("Fallback conversion for %d %s vertices\n",
289 info->count, u_prim_name(info->mode));
290 return;
291 }
292
293 /* Before setting up the draw, do any fixup blits necessary. */
294 vc4_predraw_check_textures(pctx, &vc4->verttex);
295 vc4_predraw_check_textures(pctx, &vc4->fragtex);
296
297 vc4_hw_2116_workaround(pctx);
298
299 struct vc4_job *job = vc4_get_job_for_fbo(vc4);
300
301 vc4_get_draw_cl_space(job, info->count);
302
303 if (vc4->prim_mode != info->mode) {
304 vc4->prim_mode = info->mode;
305 vc4->dirty |= VC4_DIRTY_PRIM_MODE;
306 }
307
308 vc4_start_draw(vc4, info->count);
309 vc4_update_compiled_shaders(vc4, info->mode);
310
311 uint32_t start_draw_calls_queued = job->draw_calls_queued;
312 vc4_emit_state(pctx);
313
314 if ((vc4->dirty & (VC4_DIRTY_VTXBUF |
315 VC4_DIRTY_VTXSTATE |
316 VC4_DIRTY_PRIM_MODE |
317 VC4_DIRTY_RASTERIZER |
318 VC4_DIRTY_COMPILED_CS |
319 VC4_DIRTY_COMPILED_VS |
320 VC4_DIRTY_COMPILED_FS |
321 vc4->prog.cs->uniform_dirty_bits |
322 vc4->prog.vs->uniform_dirty_bits |
323 vc4->prog.fs->uniform_dirty_bits)) ||
324 vc4->last_index_bias != info->index_bias) {
325 vc4_emit_gl_shader_state(vc4, info, 0);
326 }
327
328 vc4->dirty = 0;
329
330 /* Note that the primitive type fields match with OpenGL/gallium
331 * definitions, up to but not including QUADS.
332 */
333 struct vc4_cl_out *bcl = cl_start(&job->bcl);
334 if (info->indexed) {
335 uint32_t offset = vc4->indexbuf.offset;
336 uint32_t index_size = vc4->indexbuf.index_size;
337 struct pipe_resource *prsc;
338 if (vc4->indexbuf.index_size == 4) {
339 prsc = vc4_get_shadow_index_buffer(pctx, &vc4->indexbuf,
340 info->count, &offset);
341 index_size = 2;
342 } else {
343 if (vc4->indexbuf.user_buffer) {
344 prsc = NULL;
345 u_upload_data(vc4->uploader, 0,
346 info->count * index_size, 4,
347 vc4->indexbuf.user_buffer,
348 &offset, &prsc);
349 } else {
350 prsc = vc4->indexbuf.buffer;
351 }
352 }
353 struct vc4_resource *rsc = vc4_resource(prsc);
354
355 cl_start_reloc(&job->bcl, &bcl, 1);
356 cl_u8(&bcl, VC4_PACKET_GL_INDEXED_PRIMITIVE);
357 cl_u8(&bcl,
358 info->mode |
359 (index_size == 2 ?
360 VC4_INDEX_BUFFER_U16:
361 VC4_INDEX_BUFFER_U8));
362 cl_u32(&bcl, info->count);
363 cl_reloc(job, &job->bcl, &bcl, rsc->bo, offset);
364 cl_u32(&bcl, vc4->max_index);
365
366 if (vc4->indexbuf.index_size == 4 || vc4->indexbuf.user_buffer)
367 pipe_resource_reference(&prsc, NULL);
368 } else {
369 uint32_t count = info->count;
370 uint32_t start = info->start;
371 uint32_t extra_index_bias = 0;
372
373 while (count) {
374 uint32_t this_count = count;
375 uint32_t step = count;
376 static const uint32_t max_verts = 65535;
377
378 /* GFXH-515 / SW-5891: The binner emits 16 bit indices
379 * for drawarrays, which means that if start + count >
380 * 64k it would truncate the top bits. Work around
381 * this by emitting a limited number of primitives at
382 * a time and reemitting the shader state pointing
383 * farther down the vertex attribute arrays.
384 *
385 * To do this properly for line loops or trifans, we'd
386 * need to make a new VB containing the first vertex
387 * plus whatever remainder.
388 */
389 if (extra_index_bias) {
390 cl_end(&job->bcl, bcl);
391 vc4_emit_gl_shader_state(vc4, info,
392 extra_index_bias);
393 bcl = cl_start(&job->bcl);
394 }
395
396 if (start + count > max_verts) {
397 switch (info->mode) {
398 case PIPE_PRIM_POINTS:
399 this_count = step = max_verts;
400 break;
401 case PIPE_PRIM_LINES:
402 this_count = step = max_verts - (max_verts % 2);
403 break;
404 case PIPE_PRIM_LINE_STRIP:
405 this_count = max_verts;
406 step = max_verts - 1;
407 break;
408 case PIPE_PRIM_LINE_LOOP:
409 this_count = max_verts;
410 step = max_verts - 1;
411 debug_warn_once("unhandled line loop "
412 "looping behavior with "
413 ">65535 verts\n");
414 break;
415 case PIPE_PRIM_TRIANGLES:
416 this_count = step = max_verts - (max_verts % 3);
417 break;
418 case PIPE_PRIM_TRIANGLE_STRIP:
419 this_count = max_verts;
420 step = max_verts - 2;
421 break;
422 default:
423 debug_warn_once("unhandled primitive "
424 "max vert count, truncating\n");
425 this_count = step = max_verts;
426 }
427 }
428
429 cl_u8(&bcl, VC4_PACKET_GL_ARRAY_PRIMITIVE);
430 cl_u8(&bcl, info->mode);
431 cl_u32(&bcl, this_count);
432 cl_u32(&bcl, start);
433
434 count -= step;
435 extra_index_bias += start + step;
436 start = 0;
437 }
438 }
439 cl_end(&job->bcl, bcl);
440
441 /* No flushes of the job should have happened between when we started
442 * emitting state for our draw and when we just emitted our draw's
443 * primitives.
444 */
445 assert(start_draw_calls_queued == job->draw_calls_queued);
446
447 if (vc4->zsa && vc4->zsa->base.depth.enabled) {
448 job->resolve |= PIPE_CLEAR_DEPTH;
449 }
450 if (vc4->zsa && vc4->zsa->base.stencil[0].enabled)
451 job->resolve |= PIPE_CLEAR_STENCIL;
452 job->resolve |= PIPE_CLEAR_COLOR0;
453
454 if (vc4_debug & VC4_DEBUG_ALWAYS_FLUSH)
455 vc4_flush(pctx);
456 }
457
458 static uint32_t
459 pack_rgba(enum pipe_format format, const float *rgba)
460 {
461 union util_color uc;
462 util_pack_color(rgba, format, &uc);
463 if (util_format_get_blocksize(format) == 2)
464 return uc.us;
465 else
466 return uc.ui[0];
467 }
468
469 static void
470 vc4_clear(struct pipe_context *pctx, unsigned buffers,
471 const union pipe_color_union *color, double depth, unsigned stencil)
472 {
473 struct vc4_context *vc4 = vc4_context(pctx);
474 struct vc4_job *job = vc4_get_job_for_fbo(vc4);
475
476 /* We can't flag new buffers for clearing once we've queued draws. We
477 * could avoid this by using the 3d engine to clear.
478 */
479 if (job->draw_calls_queued) {
480 perf_debug("Flushing rendering to process new clear.\n");
481 vc4_job_submit(vc4, job);
482 job = vc4_get_job_for_fbo(vc4);
483 }
484
485 /* Clearing ZS will clear both Z and stencil, so if we're trying to
486 * clear just one then we need to draw a quad to do it instead.
487 */
488 if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) != 0 &&
489 (buffers & PIPE_CLEAR_DEPTHSTENCIL) != PIPE_CLEAR_DEPTHSTENCIL &&
490 util_format_is_depth_and_stencil(vc4->framebuffer.zsbuf->format)) {
491 perf_debug("Partial clear of Z+stencil buffer, drawing a quad "
492 "instead of fast clearing");
493 vc4_blitter_save(vc4);
494 util_blitter_clear(vc4->blitter,
495 vc4->framebuffer.width,
496 vc4->framebuffer.height,
497 1,
498 buffers & PIPE_CLEAR_DEPTHSTENCIL,
499 NULL, depth, stencil);
500 buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
501 if (!buffers)
502 return;
503 }
504
505 if (buffers & PIPE_CLEAR_COLOR0) {
506 job->clear_color[0] = job->clear_color[1] =
507 pack_rgba(vc4->framebuffer.cbufs[0]->format,
508 color->f);
509 }
510
511 if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
512 /* Though the depth buffer is stored with Z in the high 24,
513 * for this field we just need to store it in the low 24.
514 */
515 job->clear_depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
516 job->clear_stencil = stencil;
517 }
518
519 job->draw_min_x = 0;
520 job->draw_min_y = 0;
521 job->draw_max_x = vc4->framebuffer.width;
522 job->draw_max_y = vc4->framebuffer.height;
523 job->cleared |= buffers;
524 job->resolve |= buffers;
525
526 vc4_start_draw(vc4, 0);
527 }
528
529 static void
530 vc4_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps,
531 const union pipe_color_union *color,
532 unsigned x, unsigned y, unsigned w, unsigned h,
533 bool render_condition_enabled)
534 {
535 fprintf(stderr, "unimpl: clear RT\n");
536 }
537
538 static void
539 vc4_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps,
540 unsigned buffers, double depth, unsigned stencil,
541 unsigned x, unsigned y, unsigned w, unsigned h,
542 bool render_condition_enabled)
543 {
544 fprintf(stderr, "unimpl: clear DS\n");
545 }
546
547 void
548 vc4_draw_init(struct pipe_context *pctx)
549 {
550 pctx->draw_vbo = vc4_draw_vbo;
551 pctx->clear = vc4_clear;
552 pctx->clear_render_target = vc4_clear_render_target;
553 pctx->clear_depth_stencil = vc4_clear_depth_stencil;
554 }