2 * Copyright (c) 2014 Scott Mansell
3 * Copyright © 2014 Broadcom
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "util/u_blitter.h"
26 #include "util/u_prim.h"
27 #include "util/u_format.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_upload_mgr.h"
30 #include "indices/u_primconvert.h"
32 #include "vc4_context.h"
33 #include "vc4_resource.h"
36 vc4_get_draw_cl_space(struct vc4_job
*job
, int vert_count
)
38 /* The SW-5891 workaround may cause us to emit multiple shader recs
41 int num_draws
= DIV_ROUND_UP(vert_count
, 65535) + 1;
43 /* Binner gets our packet state -- vc4_emit.c contents,
44 * and the primitive itself.
46 cl_ensure_space(&job
->bcl
,
47 256 + (VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE
+
48 VC4_PACKET_GL_SHADER_STATE_SIZE
) * num_draws
);
50 /* Nothing for rcl -- that's covered by vc4_context.c */
52 /* shader_rec gets up to 12 dwords of reloc handles plus a maximally
53 * sized shader_rec (104 bytes base for 8 vattrs plus 32 bytes of
56 cl_ensure_space(&job
->shader_rec
,
57 (12 * sizeof(uint32_t) + 104 + 8 * 32) * num_draws
);
59 /* Uniforms are covered by vc4_write_uniforms(). */
61 /* There could be up to 16 textures per stage, plus misc other
64 cl_ensure_space(&job
->bo_handles
, (2 * 16 + 20) * sizeof(uint32_t));
65 cl_ensure_space(&job
->bo_pointers
,
66 (2 * 16 + 20) * sizeof(struct vc4_bo
*));
70 * Does the initial bining command list setup for drawing to a given FBO.
73 vc4_start_draw(struct vc4_context
*vc4
, int vert_count
)
75 struct vc4_job
*job
= vc4
->job
;
80 vc4_get_draw_cl_space(job
, 0);
82 struct vc4_cl_out
*bcl
= cl_start(&job
->bcl
);
83 // Tile state data is 48 bytes per tile, I think it can be thrown away
84 // as soon as binning is finished.
85 cl_u8(&bcl
, VC4_PACKET_TILE_BINNING_MODE_CONFIG
);
86 cl_u32(&bcl
, 0); /* tile alloc addr, filled by kernel */
87 cl_u32(&bcl
, 0); /* tile alloc size, filled by kernel */
88 cl_u32(&bcl
, 0); /* tile state addr, filled by kernel */
89 cl_u8(&bcl
, job
->draw_tiles_x
);
90 cl_u8(&bcl
, job
->draw_tiles_y
);
91 /* Other flags are filled by kernel. */
92 cl_u8(&bcl
, job
->msaa
? VC4_BIN_CONFIG_MS_MODE_4X
: 0);
94 /* START_TILE_BINNING resets the statechange counters in the hardware,
95 * which are what is used when a primitive is binned to a tile to
96 * figure out what new state packets need to be written to that tile's
99 cl_u8(&bcl
, VC4_PACKET_START_TILE_BINNING
);
101 /* Reset the current compressed primitives format. This gets modified
102 * by VC4_PACKET_GL_INDEXED_PRIMITIVE and
103 * VC4_PACKET_GL_ARRAY_PRIMITIVE, so it needs to be reset at the start
106 cl_u8(&bcl
, VC4_PACKET_PRIMITIVE_LIST_FORMAT
);
107 cl_u8(&bcl
, (VC4_PRIMITIVE_LIST_FORMAT_16_INDEX
|
108 VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES
));
110 job
->needs_flush
= true;
111 job
->draw_calls_queued
++;
112 job
->draw_width
= vc4
->framebuffer
.width
;
113 job
->draw_height
= vc4
->framebuffer
.height
;
115 cl_end(&job
->bcl
, bcl
);
119 vc4_update_shadow_textures(struct pipe_context
*pctx
,
120 struct vc4_texture_stateobj
*stage_tex
)
122 for (int i
= 0; i
< stage_tex
->num_textures
; i
++) {
123 struct pipe_sampler_view
*view
= stage_tex
->textures
[i
];
126 struct vc4_resource
*rsc
= vc4_resource(view
->texture
);
127 if (rsc
->shadow_parent
)
128 vc4_update_shadow_baselevel_texture(pctx
, view
);
133 vc4_emit_gl_shader_state(struct vc4_context
*vc4
,
134 const struct pipe_draw_info
*info
,
135 uint32_t extra_index_bias
)
137 struct vc4_job
*job
= vc4
->job
;
138 /* VC4_DIRTY_VTXSTATE */
139 struct vc4_vertex_stateobj
*vtx
= vc4
->vtx
;
140 /* VC4_DIRTY_VTXBUF */
141 struct vc4_vertexbuf_stateobj
*vertexbuf
= &vc4
->vertexbuf
;
143 /* The simulator throws a fit if VS or CS don't read an attribute, so
144 * we emit a dummy read.
146 uint32_t num_elements_emit
= MAX2(vtx
->num_elements
, 1);
147 /* Emit the shader record. */
148 struct vc4_cl_out
*shader_rec
=
149 cl_start_shader_reloc(&job
->shader_rec
, 3 + num_elements_emit
);
150 /* VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER */
152 VC4_SHADER_FLAG_ENABLE_CLIPPING
|
153 VC4_SHADER_FLAG_FS_SINGLE_THREAD
|
154 ((info
->mode
== PIPE_PRIM_POINTS
&&
155 vc4
->rasterizer
->base
.point_size_per_vertex
) ?
156 VC4_SHADER_FLAG_VS_POINT_SIZE
: 0));
158 /* VC4_DIRTY_COMPILED_FS */
159 cl_u8(&shader_rec
, 0); /* fs num uniforms (unused) */
160 cl_u8(&shader_rec
, vc4
->prog
.fs
->num_inputs
);
161 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, vc4
->prog
.fs
->bo
, 0);
162 cl_u32(&shader_rec
, 0); /* UBO offset written by kernel */
164 /* VC4_DIRTY_COMPILED_VS */
165 cl_u16(&shader_rec
, 0); /* vs num uniforms */
166 cl_u8(&shader_rec
, vc4
->prog
.vs
->vattrs_live
);
167 cl_u8(&shader_rec
, vc4
->prog
.vs
->vattr_offsets
[8]);
168 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, vc4
->prog
.vs
->bo
, 0);
169 cl_u32(&shader_rec
, 0); /* UBO offset written by kernel */
171 /* VC4_DIRTY_COMPILED_CS */
172 cl_u16(&shader_rec
, 0); /* cs num uniforms */
173 cl_u8(&shader_rec
, vc4
->prog
.cs
->vattrs_live
);
174 cl_u8(&shader_rec
, vc4
->prog
.cs
->vattr_offsets
[8]);
175 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, vc4
->prog
.cs
->bo
, 0);
176 cl_u32(&shader_rec
, 0); /* UBO offset written by kernel */
178 uint32_t max_index
= 0xffff;
179 for (int i
= 0; i
< vtx
->num_elements
; i
++) {
180 struct pipe_vertex_element
*elem
= &vtx
->pipe
[i
];
181 struct pipe_vertex_buffer
*vb
=
182 &vertexbuf
->vb
[elem
->vertex_buffer_index
];
183 struct vc4_resource
*rsc
= vc4_resource(vb
->buffer
);
184 /* not vc4->dirty tracked: vc4->last_index_bias */
185 uint32_t offset
= (vb
->buffer_offset
+
187 vb
->stride
* (info
->index_bias
+
189 uint32_t vb_size
= rsc
->bo
->size
- offset
;
191 util_format_get_blocksize(elem
->src_format
);
193 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, rsc
->bo
, offset
);
194 cl_u8(&shader_rec
, elem_size
- 1);
195 cl_u8(&shader_rec
, vb
->stride
);
196 cl_u8(&shader_rec
, vc4
->prog
.vs
->vattr_offsets
[i
]);
197 cl_u8(&shader_rec
, vc4
->prog
.cs
->vattr_offsets
[i
]);
199 if (vb
->stride
> 0) {
200 max_index
= MIN2(max_index
,
201 (vb_size
- elem_size
) / vb
->stride
);
205 if (vtx
->num_elements
== 0) {
206 assert(num_elements_emit
== 1);
207 struct vc4_bo
*bo
= vc4_bo_alloc(vc4
->screen
, 4096, "scratch VBO");
208 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, bo
, 0);
209 cl_u8(&shader_rec
, 16 - 1); /* element size */
210 cl_u8(&shader_rec
, 0); /* stride */
211 cl_u8(&shader_rec
, 0); /* VS VPM offset */
212 cl_u8(&shader_rec
, 0); /* CS VPM offset */
213 vc4_bo_unreference(&bo
);
215 cl_end(&job
->shader_rec
, shader_rec
);
217 struct vc4_cl_out
*bcl
= cl_start(&job
->bcl
);
218 /* the actual draw call. */
219 cl_u8(&bcl
, VC4_PACKET_GL_SHADER_STATE
);
220 assert(vtx
->num_elements
<= 8);
221 /* Note that number of attributes == 0 in the packet means 8
222 * attributes. This field also contains the offset into shader_rec.
224 cl_u32(&bcl
, num_elements_emit
& 0x7);
225 cl_end(&job
->bcl
, bcl
);
227 vc4_write_uniforms(vc4
, vc4
->prog
.fs
,
228 &vc4
->constbuf
[PIPE_SHADER_FRAGMENT
],
230 vc4_write_uniforms(vc4
, vc4
->prog
.vs
,
231 &vc4
->constbuf
[PIPE_SHADER_VERTEX
],
233 vc4_write_uniforms(vc4
, vc4
->prog
.cs
,
234 &vc4
->constbuf
[PIPE_SHADER_VERTEX
],
237 vc4
->last_index_bias
= info
->index_bias
+ extra_index_bias
;
238 vc4
->max_index
= max_index
;
239 job
->shader_rec_count
++;
243 * HW-2116 workaround: Flush the batch before triggering the hardware state
244 * counter wraparound behavior.
246 * State updates are tracked by a global counter which increments at the first
247 * state update after a draw or a START_BINNING. Tiles can then have their
248 * state updated at draw time with a set of cheap checks for whether the
249 * state's copy of the global counter matches the global counter the last time
250 * that state was written to the tile.
252 * The state counters are relatively small and wrap around quickly, so you
253 * could get false negatives for needing to update a particular state in the
254 * tile. To avoid this, the hardware attempts to write all of the state in
255 * the tile at wraparound time. This apparently is broken, so we just flush
256 * everything before that behavior is triggered. A batch flush is sufficient
257 * to get our current contents drawn and reset the counters to 0.
259 * Note that we can't just use VC4_PACKET_FLUSH_ALL, because that caps the
260 * tiles with VC4_PACKET_RETURN_FROM_LIST.
263 vc4_hw_2116_workaround(struct pipe_context
*pctx
)
265 struct vc4_context
*vc4
= vc4_context(pctx
);
266 struct vc4_job
*job
= vc4
->job
;
268 if (job
->draw_calls_queued
== 0x1ef0) {
269 perf_debug("Flushing batch due to HW-2116 workaround "
270 "(too many draw calls per scene\n");
276 vc4_draw_vbo(struct pipe_context
*pctx
, const struct pipe_draw_info
*info
)
278 struct vc4_context
*vc4
= vc4_context(pctx
);
279 struct vc4_job
*job
= vc4
->job
;
281 if (info
->mode
>= PIPE_PRIM_QUADS
) {
282 util_primconvert_save_index_buffer(vc4
->primconvert
, &vc4
->indexbuf
);
283 util_primconvert_save_rasterizer_state(vc4
->primconvert
, &vc4
->rasterizer
->base
);
284 util_primconvert_draw_vbo(vc4
->primconvert
, info
);
285 perf_debug("Fallback conversion for %d %s vertices\n",
286 info
->count
, u_prim_name(info
->mode
));
290 /* Before setting up the draw, do any fixup blits necessary. */
291 vc4_update_shadow_textures(pctx
, &vc4
->verttex
);
292 vc4_update_shadow_textures(pctx
, &vc4
->fragtex
);
294 vc4_hw_2116_workaround(pctx
);
296 vc4_get_draw_cl_space(job
, info
->count
);
298 if (vc4
->prim_mode
!= info
->mode
) {
299 vc4
->prim_mode
= info
->mode
;
300 vc4
->dirty
|= VC4_DIRTY_PRIM_MODE
;
303 vc4_start_draw(vc4
, info
->count
);
304 vc4_update_compiled_shaders(vc4
, info
->mode
);
306 uint32_t start_draw_calls_queued
= job
->draw_calls_queued
;
307 vc4_emit_state(pctx
);
309 if ((vc4
->dirty
& (VC4_DIRTY_VTXBUF
|
311 VC4_DIRTY_PRIM_MODE
|
312 VC4_DIRTY_RASTERIZER
|
313 VC4_DIRTY_COMPILED_CS
|
314 VC4_DIRTY_COMPILED_VS
|
315 VC4_DIRTY_COMPILED_FS
|
316 vc4
->prog
.cs
->uniform_dirty_bits
|
317 vc4
->prog
.vs
->uniform_dirty_bits
|
318 vc4
->prog
.fs
->uniform_dirty_bits
)) ||
319 vc4
->last_index_bias
!= info
->index_bias
) {
320 vc4_emit_gl_shader_state(vc4
, info
, 0);
325 /* Note that the primitive type fields match with OpenGL/gallium
326 * definitions, up to but not including QUADS.
328 struct vc4_cl_out
*bcl
= cl_start(&job
->bcl
);
330 uint32_t offset
= vc4
->indexbuf
.offset
;
331 uint32_t index_size
= vc4
->indexbuf
.index_size
;
332 struct pipe_resource
*prsc
;
333 if (vc4
->indexbuf
.index_size
== 4) {
334 prsc
= vc4_get_shadow_index_buffer(pctx
, &vc4
->indexbuf
,
335 info
->count
, &offset
);
338 if (vc4
->indexbuf
.user_buffer
) {
340 u_upload_data(vc4
->uploader
, 0,
341 info
->count
* index_size
, 4,
342 vc4
->indexbuf
.user_buffer
,
345 prsc
= vc4
->indexbuf
.buffer
;
348 struct vc4_resource
*rsc
= vc4_resource(prsc
);
350 cl_start_reloc(&job
->bcl
, &bcl
, 1);
351 cl_u8(&bcl
, VC4_PACKET_GL_INDEXED_PRIMITIVE
);
355 VC4_INDEX_BUFFER_U16
:
356 VC4_INDEX_BUFFER_U8
));
357 cl_u32(&bcl
, info
->count
);
358 cl_reloc(job
, &job
->bcl
, &bcl
, rsc
->bo
, offset
);
359 cl_u32(&bcl
, vc4
->max_index
);
361 if (vc4
->indexbuf
.index_size
== 4 || vc4
->indexbuf
.user_buffer
)
362 pipe_resource_reference(&prsc
, NULL
);
364 uint32_t count
= info
->count
;
365 uint32_t start
= info
->start
;
366 uint32_t extra_index_bias
= 0;
369 uint32_t this_count
= count
;
370 uint32_t step
= count
;
371 static const uint32_t max_verts
= 65535;
373 /* GFXH-515 / SW-5891: The binner emits 16 bit indices
374 * for drawarrays, which means that if start + count >
375 * 64k it would truncate the top bits. Work around
376 * this by emitting a limited number of primitives at
377 * a time and reemitting the shader state pointing
378 * farther down the vertex attribute arrays.
380 * To do this properly for line loops or trifans, we'd
381 * need to make a new VB containing the first vertex
382 * plus whatever remainder.
384 if (extra_index_bias
) {
385 cl_end(&job
->bcl
, bcl
);
386 vc4_emit_gl_shader_state(vc4
, info
,
388 bcl
= cl_start(&job
->bcl
);
391 if (start
+ count
> max_verts
) {
392 switch (info
->mode
) {
393 case PIPE_PRIM_POINTS
:
394 this_count
= step
= max_verts
;
396 case PIPE_PRIM_LINES
:
397 this_count
= step
= max_verts
- (max_verts
% 2);
399 case PIPE_PRIM_LINE_STRIP
:
400 this_count
= max_verts
;
401 step
= max_verts
- 1;
403 case PIPE_PRIM_LINE_LOOP
:
404 this_count
= max_verts
;
405 step
= max_verts
- 1;
406 debug_warn_once("unhandled line loop "
407 "looping behavior with "
410 case PIPE_PRIM_TRIANGLES
:
411 this_count
= step
= max_verts
- (max_verts
% 3);
413 case PIPE_PRIM_TRIANGLE_STRIP
:
414 this_count
= max_verts
;
415 step
= max_verts
- 2;
418 debug_warn_once("unhandled primitive "
419 "max vert count, truncating\n");
420 this_count
= step
= max_verts
;
424 cl_u8(&bcl
, VC4_PACKET_GL_ARRAY_PRIMITIVE
);
425 cl_u8(&bcl
, info
->mode
);
426 cl_u32(&bcl
, this_count
);
430 extra_index_bias
+= start
+ step
;
434 cl_end(&job
->bcl
, bcl
);
436 /* No flushes of the job should have happened between when we started
437 * emitting state for our draw and when we just emitted our draw's
440 assert(start_draw_calls_queued
== job
->draw_calls_queued
);
442 if (vc4
->zsa
&& vc4
->zsa
->base
.depth
.enabled
) {
443 job
->resolve
|= PIPE_CLEAR_DEPTH
;
445 if (vc4
->zsa
&& vc4
->zsa
->base
.stencil
[0].enabled
)
446 job
->resolve
|= PIPE_CLEAR_STENCIL
;
447 job
->resolve
|= PIPE_CLEAR_COLOR0
;
449 if (vc4_debug
& VC4_DEBUG_ALWAYS_FLUSH
)
454 pack_rgba(enum pipe_format format
, const float *rgba
)
457 util_pack_color(rgba
, format
, &uc
);
458 if (util_format_get_blocksize(format
) == 2)
465 vc4_clear(struct pipe_context
*pctx
, unsigned buffers
,
466 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
468 struct vc4_context
*vc4
= vc4_context(pctx
);
469 struct vc4_job
*job
= vc4
->job
;
471 /* We can't flag new buffers for clearing once we've queued draws. We
472 * could avoid this by using the 3d engine to clear.
474 if (job
->draw_calls_queued
) {
475 perf_debug("Flushing rendering to process new clear.\n");
479 /* Clearing ZS will clear both Z and stencil, so if we're trying to
480 * clear just one then we need to draw a quad to do it instead.
482 if ((buffers
& PIPE_CLEAR_DEPTHSTENCIL
) != 0 &&
483 (buffers
& PIPE_CLEAR_DEPTHSTENCIL
) != PIPE_CLEAR_DEPTHSTENCIL
&&
484 util_format_is_depth_and_stencil(vc4
->framebuffer
.zsbuf
->format
)) {
485 vc4_blitter_save(vc4
);
486 util_blitter_clear(vc4
->blitter
,
487 vc4
->framebuffer
.width
,
488 vc4
->framebuffer
.height
,
490 buffers
& PIPE_CLEAR_DEPTHSTENCIL
,
491 NULL
, depth
, stencil
);
492 buffers
&= ~PIPE_CLEAR_DEPTHSTENCIL
;
497 if (buffers
& PIPE_CLEAR_COLOR0
) {
498 job
->clear_color
[0] = job
->clear_color
[1] =
499 pack_rgba(vc4
->framebuffer
.cbufs
[0]->format
,
503 if (buffers
& PIPE_CLEAR_DEPTHSTENCIL
) {
504 /* Though the depth buffer is stored with Z in the high 24,
505 * for this field we just need to store it in the low 24.
507 job
->clear_depth
= util_pack_z(PIPE_FORMAT_Z24X8_UNORM
, depth
);
508 job
->clear_stencil
= stencil
;
513 job
->draw_max_x
= vc4
->framebuffer
.width
;
514 job
->draw_max_y
= vc4
->framebuffer
.height
;
515 job
->cleared
|= buffers
;
516 job
->resolve
|= buffers
;
518 vc4_start_draw(vc4
, 0);
522 vc4_clear_render_target(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
523 const union pipe_color_union
*color
,
524 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
525 bool render_condition_enabled
)
527 fprintf(stderr
, "unimpl: clear RT\n");
531 vc4_clear_depth_stencil(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
532 unsigned buffers
, double depth
, unsigned stencil
,
533 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
534 bool render_condition_enabled
)
536 fprintf(stderr
, "unimpl: clear DS\n");
540 vc4_draw_init(struct pipe_context
*pctx
)
542 pctx
->draw_vbo
= vc4_draw_vbo
;
543 pctx
->clear
= vc4_clear
;
544 pctx
->clear_render_target
= vc4_clear_render_target
;
545 pctx
->clear_depth_stencil
= vc4_clear_depth_stencil
;