2 * Copyright (c) 2014 Scott Mansell
3 * Copyright © 2014 Broadcom
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "util/u_blitter.h"
26 #include "util/u_prim.h"
27 #include "util/u_format.h"
28 #include "util/u_pack_color.h"
29 #include "util/u_upload_mgr.h"
30 #include "indices/u_primconvert.h"
32 #include "vc4_context.h"
33 #include "vc4_resource.h"
35 #define VC4_HW_2116_COUNT 0x1ef0
38 vc4_get_draw_cl_space(struct vc4_job
*job
, int vert_count
)
40 /* The SW-5891 workaround may cause us to emit multiple shader recs
43 int num_draws
= DIV_ROUND_UP(vert_count
, 65535) + 1;
45 /* Binner gets our packet state -- vc4_emit.c contents,
46 * and the primitive itself.
48 cl_ensure_space(&job
->bcl
,
49 256 + (VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE
+
50 VC4_PACKET_GL_SHADER_STATE_SIZE
) * num_draws
);
52 /* Nothing for rcl -- that's covered by vc4_context.c */
54 /* shader_rec gets up to 12 dwords of reloc handles plus a maximally
55 * sized shader_rec (104 bytes base for 8 vattrs plus 32 bytes of
58 cl_ensure_space(&job
->shader_rec
,
59 (12 * sizeof(uint32_t) + 104 + 8 * 32) * num_draws
);
61 /* Uniforms are covered by vc4_write_uniforms(). */
63 /* There could be up to 16 textures per stage, plus misc other
66 cl_ensure_space(&job
->bo_handles
, (2 * 16 + 20) * sizeof(uint32_t));
67 cl_ensure_space(&job
->bo_pointers
,
68 (2 * 16 + 20) * sizeof(struct vc4_bo
*));
72 * Does the initial bining command list setup for drawing to a given FBO.
75 vc4_start_draw(struct vc4_context
*vc4
)
77 struct vc4_job
*job
= vc4
->job
;
82 vc4_get_draw_cl_space(job
, 0);
84 struct vc4_cl_out
*bcl
= cl_start(&job
->bcl
);
85 // Tile state data is 48 bytes per tile, I think it can be thrown away
86 // as soon as binning is finished.
87 cl_u8(&bcl
, VC4_PACKET_TILE_BINNING_MODE_CONFIG
);
88 cl_u32(&bcl
, 0); /* tile alloc addr, filled by kernel */
89 cl_u32(&bcl
, 0); /* tile alloc size, filled by kernel */
90 cl_u32(&bcl
, 0); /* tile state addr, filled by kernel */
91 cl_u8(&bcl
, job
->draw_tiles_x
);
92 cl_u8(&bcl
, job
->draw_tiles_y
);
93 /* Other flags are filled by kernel. */
94 cl_u8(&bcl
, job
->msaa
? VC4_BIN_CONFIG_MS_MODE_4X
: 0);
96 /* START_TILE_BINNING resets the statechange counters in the hardware,
97 * which are what is used when a primitive is binned to a tile to
98 * figure out what new state packets need to be written to that tile's
101 cl_u8(&bcl
, VC4_PACKET_START_TILE_BINNING
);
103 /* Reset the current compressed primitives format. This gets modified
104 * by VC4_PACKET_GL_INDEXED_PRIMITIVE and
105 * VC4_PACKET_GL_ARRAY_PRIMITIVE, so it needs to be reset at the start
108 cl_u8(&bcl
, VC4_PACKET_PRIMITIVE_LIST_FORMAT
);
109 cl_u8(&bcl
, (VC4_PRIMITIVE_LIST_FORMAT_16_INDEX
|
110 VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES
));
112 job
->needs_flush
= true;
113 job
->draw_width
= vc4
->framebuffer
.width
;
114 job
->draw_height
= vc4
->framebuffer
.height
;
116 cl_end(&job
->bcl
, bcl
);
120 vc4_predraw_check_textures(struct pipe_context
*pctx
,
121 struct vc4_texture_stateobj
*stage_tex
)
123 struct vc4_context
*vc4
= vc4_context(pctx
);
125 for (int i
= 0; i
< stage_tex
->num_textures
; i
++) {
126 struct pipe_sampler_view
*view
= stage_tex
->textures
[i
];
129 struct vc4_resource
*rsc
= vc4_resource(view
->texture
);
130 if (rsc
->shadow_parent
)
131 vc4_update_shadow_baselevel_texture(pctx
, view
);
133 vc4_flush_jobs_writing_resource(vc4
, view
->texture
);
138 vc4_emit_gl_shader_state(struct vc4_context
*vc4
,
139 const struct pipe_draw_info
*info
,
140 uint32_t extra_index_bias
)
142 struct vc4_job
*job
= vc4
->job
;
143 /* VC4_DIRTY_VTXSTATE */
144 struct vc4_vertex_stateobj
*vtx
= vc4
->vtx
;
145 /* VC4_DIRTY_VTXBUF */
146 struct vc4_vertexbuf_stateobj
*vertexbuf
= &vc4
->vertexbuf
;
148 /* The simulator throws a fit if VS or CS don't read an attribute, so
149 * we emit a dummy read.
151 uint32_t num_elements_emit
= MAX2(vtx
->num_elements
, 1);
152 /* Emit the shader record. */
153 struct vc4_cl_out
*shader_rec
=
154 cl_start_shader_reloc(&job
->shader_rec
, 3 + num_elements_emit
);
155 /* VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER */
157 VC4_SHADER_FLAG_ENABLE_CLIPPING
|
158 (vc4
->prog
.fs
->fs_threaded
?
159 0 : VC4_SHADER_FLAG_FS_SINGLE_THREAD
) |
160 ((info
->mode
== PIPE_PRIM_POINTS
&&
161 vc4
->rasterizer
->base
.point_size_per_vertex
) ?
162 VC4_SHADER_FLAG_VS_POINT_SIZE
: 0));
164 /* VC4_DIRTY_COMPILED_FS */
165 cl_u8(&shader_rec
, 0); /* fs num uniforms (unused) */
166 cl_u8(&shader_rec
, vc4
->prog
.fs
->num_inputs
);
167 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, vc4
->prog
.fs
->bo
, 0);
168 cl_u32(&shader_rec
, 0); /* UBO offset written by kernel */
170 /* VC4_DIRTY_COMPILED_VS */
171 cl_u16(&shader_rec
, 0); /* vs num uniforms */
172 cl_u8(&shader_rec
, vc4
->prog
.vs
->vattrs_live
);
173 cl_u8(&shader_rec
, vc4
->prog
.vs
->vattr_offsets
[8]);
174 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, vc4
->prog
.vs
->bo
, 0);
175 cl_u32(&shader_rec
, 0); /* UBO offset written by kernel */
177 /* VC4_DIRTY_COMPILED_CS */
178 cl_u16(&shader_rec
, 0); /* cs num uniforms */
179 cl_u8(&shader_rec
, vc4
->prog
.cs
->vattrs_live
);
180 cl_u8(&shader_rec
, vc4
->prog
.cs
->vattr_offsets
[8]);
181 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, vc4
->prog
.cs
->bo
, 0);
182 cl_u32(&shader_rec
, 0); /* UBO offset written by kernel */
184 uint32_t max_index
= 0xffff;
185 for (int i
= 0; i
< vtx
->num_elements
; i
++) {
186 struct pipe_vertex_element
*elem
= &vtx
->pipe
[i
];
187 struct pipe_vertex_buffer
*vb
=
188 &vertexbuf
->vb
[elem
->vertex_buffer_index
];
189 struct vc4_resource
*rsc
= vc4_resource(vb
->buffer
.resource
);
190 /* not vc4->dirty tracked: vc4->last_index_bias */
191 uint32_t offset
= (vb
->buffer_offset
+
193 vb
->stride
* (info
->index_bias
+
195 uint32_t vb_size
= rsc
->bo
->size
- offset
;
197 util_format_get_blocksize(elem
->src_format
);
199 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, rsc
->bo
, offset
);
200 cl_u8(&shader_rec
, elem_size
- 1);
201 cl_u8(&shader_rec
, vb
->stride
);
202 cl_u8(&shader_rec
, vc4
->prog
.vs
->vattr_offsets
[i
]);
203 cl_u8(&shader_rec
, vc4
->prog
.cs
->vattr_offsets
[i
]);
205 if (vb
->stride
> 0) {
206 max_index
= MIN2(max_index
,
207 (vb_size
- elem_size
) / vb
->stride
);
211 if (vtx
->num_elements
== 0) {
212 assert(num_elements_emit
== 1);
213 struct vc4_bo
*bo
= vc4_bo_alloc(vc4
->screen
, 4096, "scratch VBO");
214 cl_reloc(job
, &job
->shader_rec
, &shader_rec
, bo
, 0);
215 cl_u8(&shader_rec
, 16 - 1); /* element size */
216 cl_u8(&shader_rec
, 0); /* stride */
217 cl_u8(&shader_rec
, 0); /* VS VPM offset */
218 cl_u8(&shader_rec
, 0); /* CS VPM offset */
219 vc4_bo_unreference(&bo
);
221 cl_end(&job
->shader_rec
, shader_rec
);
223 struct vc4_cl_out
*bcl
= cl_start(&job
->bcl
);
224 /* the actual draw call. */
225 cl_u8(&bcl
, VC4_PACKET_GL_SHADER_STATE
);
226 assert(vtx
->num_elements
<= 8);
227 /* Note that number of attributes == 0 in the packet means 8
228 * attributes. This field also contains the offset into shader_rec.
230 cl_u32(&bcl
, num_elements_emit
& 0x7);
231 cl_end(&job
->bcl
, bcl
);
233 vc4_write_uniforms(vc4
, vc4
->prog
.fs
,
234 &vc4
->constbuf
[PIPE_SHADER_FRAGMENT
],
236 vc4_write_uniforms(vc4
, vc4
->prog
.vs
,
237 &vc4
->constbuf
[PIPE_SHADER_VERTEX
],
239 vc4_write_uniforms(vc4
, vc4
->prog
.cs
,
240 &vc4
->constbuf
[PIPE_SHADER_VERTEX
],
243 vc4
->last_index_bias
= info
->index_bias
+ extra_index_bias
;
244 vc4
->max_index
= max_index
;
245 job
->shader_rec_count
++;
249 * HW-2116 workaround: Flush the batch before triggering the hardware state
250 * counter wraparound behavior.
252 * State updates are tracked by a global counter which increments at the first
253 * state update after a draw or a START_BINNING. Tiles can then have their
254 * state updated at draw time with a set of cheap checks for whether the
255 * state's copy of the global counter matches the global counter the last time
256 * that state was written to the tile.
258 * The state counters are relatively small and wrap around quickly, so you
259 * could get false negatives for needing to update a particular state in the
260 * tile. To avoid this, the hardware attempts to write all of the state in
261 * the tile at wraparound time. This apparently is broken, so we just flush
262 * everything before that behavior is triggered. A batch flush is sufficient
263 * to get our current contents drawn and reset the counters to 0.
265 * Note that we can't just use VC4_PACKET_FLUSH_ALL, because that caps the
266 * tiles with VC4_PACKET_RETURN_FROM_LIST.
269 vc4_hw_2116_workaround(struct pipe_context
*pctx
, int vert_count
)
271 struct vc4_context
*vc4
= vc4_context(pctx
);
272 struct vc4_job
*job
= vc4_get_job_for_fbo(vc4
);
274 if (job
->draw_calls_queued
+ vert_count
/ 65535 >= VC4_HW_2116_COUNT
) {
275 perf_debug("Flushing batch due to HW-2116 workaround "
276 "(too many draw calls per scene\n");
277 vc4_job_submit(vc4
, job
);
282 vc4_draw_vbo(struct pipe_context
*pctx
, const struct pipe_draw_info
*info
)
284 struct vc4_context
*vc4
= vc4_context(pctx
);
286 if (!info
->count_from_stream_output
&& !info
->indirect
&&
287 !info
->primitive_restart
&&
288 !u_trim_pipe_prim(info
->mode
, (unsigned*)&info
->count
))
291 if (info
->mode
>= PIPE_PRIM_QUADS
) {
292 util_primconvert_save_index_buffer(vc4
->primconvert
, &vc4
->indexbuf
);
293 util_primconvert_save_rasterizer_state(vc4
->primconvert
, &vc4
->rasterizer
->base
);
294 util_primconvert_draw_vbo(vc4
->primconvert
, info
);
295 perf_debug("Fallback conversion for %d %s vertices\n",
296 info
->count
, u_prim_name(info
->mode
));
300 /* Before setting up the draw, do any fixup blits necessary. */
301 vc4_predraw_check_textures(pctx
, &vc4
->verttex
);
302 vc4_predraw_check_textures(pctx
, &vc4
->fragtex
);
304 vc4_hw_2116_workaround(pctx
, info
->count
);
306 struct vc4_job
*job
= vc4_get_job_for_fbo(vc4
);
308 vc4_get_draw_cl_space(job
, info
->count
);
310 if (vc4
->prim_mode
!= info
->mode
) {
311 vc4
->prim_mode
= info
->mode
;
312 vc4
->dirty
|= VC4_DIRTY_PRIM_MODE
;
316 if (!vc4_update_compiled_shaders(vc4
, info
->mode
)) {
317 debug_warn_once("shader compile failed, skipping draw call.\n");
321 vc4_emit_state(pctx
);
323 if ((vc4
->dirty
& (VC4_DIRTY_VTXBUF
|
325 VC4_DIRTY_PRIM_MODE
|
326 VC4_DIRTY_RASTERIZER
|
327 VC4_DIRTY_COMPILED_CS
|
328 VC4_DIRTY_COMPILED_VS
|
329 VC4_DIRTY_COMPILED_FS
|
330 vc4
->prog
.cs
->uniform_dirty_bits
|
331 vc4
->prog
.vs
->uniform_dirty_bits
|
332 vc4
->prog
.fs
->uniform_dirty_bits
)) ||
333 vc4
->last_index_bias
!= info
->index_bias
) {
334 vc4_emit_gl_shader_state(vc4
, info
, 0);
339 /* Note that the primitive type fields match with OpenGL/gallium
340 * definitions, up to but not including QUADS.
342 struct vc4_cl_out
*bcl
= cl_start(&job
->bcl
);
344 uint32_t offset
= vc4
->indexbuf
.offset
;
345 uint32_t index_size
= vc4
->indexbuf
.index_size
;
346 struct pipe_resource
*prsc
;
347 if (vc4
->indexbuf
.index_size
== 4) {
348 prsc
= vc4_get_shadow_index_buffer(pctx
, &vc4
->indexbuf
,
349 info
->count
, &offset
);
352 if (vc4
->indexbuf
.user_buffer
) {
354 u_upload_data(vc4
->uploader
, 0,
355 info
->count
* index_size
, 4,
356 vc4
->indexbuf
.user_buffer
,
359 prsc
= vc4
->indexbuf
.buffer
;
362 struct vc4_resource
*rsc
= vc4_resource(prsc
);
364 cl_start_reloc(&job
->bcl
, &bcl
, 1);
365 cl_u8(&bcl
, VC4_PACKET_GL_INDEXED_PRIMITIVE
);
369 VC4_INDEX_BUFFER_U16
:
370 VC4_INDEX_BUFFER_U8
));
371 cl_u32(&bcl
, info
->count
);
372 cl_reloc(job
, &job
->bcl
, &bcl
, rsc
->bo
, offset
);
373 cl_u32(&bcl
, vc4
->max_index
);
374 job
->draw_calls_queued
++;
376 if (vc4
->indexbuf
.index_size
== 4 || vc4
->indexbuf
.user_buffer
)
377 pipe_resource_reference(&prsc
, NULL
);
379 uint32_t count
= info
->count
;
380 uint32_t start
= info
->start
;
381 uint32_t extra_index_bias
= 0;
384 uint32_t this_count
= count
;
385 uint32_t step
= count
;
386 static const uint32_t max_verts
= 65535;
388 /* GFXH-515 / SW-5891: The binner emits 16 bit indices
389 * for drawarrays, which means that if start + count >
390 * 64k it would truncate the top bits. Work around
391 * this by emitting a limited number of primitives at
392 * a time and reemitting the shader state pointing
393 * farther down the vertex attribute arrays.
395 * To do this properly for line loops or trifans, we'd
396 * need to make a new VB containing the first vertex
397 * plus whatever remainder.
399 if (extra_index_bias
) {
400 cl_end(&job
->bcl
, bcl
);
401 vc4_emit_gl_shader_state(vc4
, info
,
403 bcl
= cl_start(&job
->bcl
);
406 if (start
+ count
> max_verts
) {
407 switch (info
->mode
) {
408 case PIPE_PRIM_POINTS
:
409 this_count
= step
= max_verts
;
411 case PIPE_PRIM_LINES
:
412 this_count
= step
= max_verts
- (max_verts
% 2);
414 case PIPE_PRIM_LINE_STRIP
:
415 this_count
= max_verts
;
416 step
= max_verts
- 1;
418 case PIPE_PRIM_LINE_LOOP
:
419 this_count
= max_verts
;
420 step
= max_verts
- 1;
421 debug_warn_once("unhandled line loop "
422 "looping behavior with "
425 case PIPE_PRIM_TRIANGLES
:
426 this_count
= step
= max_verts
- (max_verts
% 3);
428 case PIPE_PRIM_TRIANGLE_STRIP
:
429 this_count
= max_verts
;
430 step
= max_verts
- 2;
433 debug_warn_once("unhandled primitive "
434 "max vert count, truncating\n");
435 this_count
= step
= max_verts
;
439 cl_u8(&bcl
, VC4_PACKET_GL_ARRAY_PRIMITIVE
);
440 cl_u8(&bcl
, info
->mode
);
441 cl_u32(&bcl
, this_count
);
443 job
->draw_calls_queued
++;
446 extra_index_bias
+= start
+ step
;
450 cl_end(&job
->bcl
, bcl
);
452 /* We shouldn't have tripped the HW_2116 bug with the GFXH-515
455 assert(job
->draw_calls_queued
<= VC4_HW_2116_COUNT
);
457 if (vc4
->zsa
&& vc4
->framebuffer
.zsbuf
) {
458 struct vc4_resource
*rsc
=
459 vc4_resource(vc4
->framebuffer
.zsbuf
->texture
);
461 if (vc4
->zsa
->base
.depth
.enabled
) {
462 job
->resolve
|= PIPE_CLEAR_DEPTH
;
463 rsc
->initialized_buffers
= PIPE_CLEAR_DEPTH
;
466 if (vc4
->zsa
->base
.stencil
[0].enabled
) {
467 job
->resolve
|= PIPE_CLEAR_STENCIL
;
468 rsc
->initialized_buffers
|= PIPE_CLEAR_STENCIL
;
472 job
->resolve
|= PIPE_CLEAR_COLOR0
;
474 /* If we've used half of the presumably 256MB CMA area, flush the job
475 * so that we don't accumulate a job that will end up not being
478 if (job
->bo_space
> 128 * 1024 * 1024)
481 if (vc4_debug
& VC4_DEBUG_ALWAYS_FLUSH
)
486 pack_rgba(enum pipe_format format
, const float *rgba
)
489 util_pack_color(rgba
, format
, &uc
);
490 if (util_format_get_blocksize(format
) == 2)
497 vc4_clear(struct pipe_context
*pctx
, unsigned buffers
,
498 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
500 struct vc4_context
*vc4
= vc4_context(pctx
);
501 struct vc4_job
*job
= vc4_get_job_for_fbo(vc4
);
503 /* We can't flag new buffers for clearing once we've queued draws. We
504 * could avoid this by using the 3d engine to clear.
506 if (job
->draw_calls_queued
) {
507 perf_debug("Flushing rendering to process new clear.\n");
508 vc4_job_submit(vc4
, job
);
509 job
= vc4_get_job_for_fbo(vc4
);
512 if (buffers
& PIPE_CLEAR_COLOR0
) {
513 struct vc4_resource
*rsc
=
514 vc4_resource(vc4
->framebuffer
.cbufs
[0]->texture
);
515 uint32_t clear_color
;
517 if (vc4_rt_format_is_565(vc4
->framebuffer
.cbufs
[0]->format
)) {
518 /* In 565 mode, the hardware will be packing our color
521 clear_color
= pack_rgba(PIPE_FORMAT_R8G8B8A8_UNORM
,
524 /* Otherwise, we need to do this packing because we
525 * support multiple swizzlings of RGBA8888.
528 pack_rgba(vc4
->framebuffer
.cbufs
[0]->format
,
531 job
->clear_color
[0] = job
->clear_color
[1] = clear_color
;
532 rsc
->initialized_buffers
|= (buffers
& PIPE_CLEAR_COLOR0
);
535 if (buffers
& PIPE_CLEAR_DEPTHSTENCIL
) {
536 struct vc4_resource
*rsc
=
537 vc4_resource(vc4
->framebuffer
.zsbuf
->texture
);
538 unsigned zsclear
= buffers
& PIPE_CLEAR_DEPTHSTENCIL
;
540 /* Clearing ZS will clear both Z and stencil, so if we're
541 * trying to clear just one then we need to draw a quad to do
544 if ((zsclear
== PIPE_CLEAR_DEPTH
||
545 zsclear
== PIPE_CLEAR_STENCIL
) &&
546 (rsc
->initialized_buffers
& ~(zsclear
| job
->cleared
)) &&
547 util_format_is_depth_and_stencil(vc4
->framebuffer
.zsbuf
->format
)) {
548 perf_debug("Partial clear of Z+stencil buffer, "
549 "drawing a quad instead of fast clearing\n");
550 vc4_blitter_save(vc4
);
551 util_blitter_clear(vc4
->blitter
,
552 vc4
->framebuffer
.width
,
553 vc4
->framebuffer
.height
,
556 NULL
, depth
, stencil
);
562 /* Though the depth buffer is stored with Z in the high 24,
563 * for this field we just need to store it in the low 24.
565 if (buffers
& PIPE_CLEAR_DEPTH
) {
566 job
->clear_depth
= util_pack_z(PIPE_FORMAT_Z24X8_UNORM
,
569 if (buffers
& PIPE_CLEAR_STENCIL
)
570 job
->clear_stencil
= stencil
;
572 rsc
->initialized_buffers
|= zsclear
;
577 job
->draw_max_x
= vc4
->framebuffer
.width
;
578 job
->draw_max_y
= vc4
->framebuffer
.height
;
579 job
->cleared
|= buffers
;
580 job
->resolve
|= buffers
;
586 vc4_clear_render_target(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
587 const union pipe_color_union
*color
,
588 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
589 bool render_condition_enabled
)
591 fprintf(stderr
, "unimpl: clear RT\n");
595 vc4_clear_depth_stencil(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
596 unsigned buffers
, double depth
, unsigned stencil
,
597 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
598 bool render_condition_enabled
)
600 fprintf(stderr
, "unimpl: clear DS\n");
604 vc4_draw_init(struct pipe_context
*pctx
)
606 pctx
->draw_vbo
= vc4_draw_vbo
;
607 pctx
->clear
= vc4_clear
;
608 pctx
->clear_render_target
= vc4_clear_render_target
;
609 pctx
->clear_depth_stencil
= vc4_clear_depth_stencil
;