2 * Copyright © 2015 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * Implements most of the fixed function fragment pipeline in shader code.
27 * VC4 doesn't have any hardware support for blending, alpha test, logic ops,
28 * or color mask. Instead, you read the current contents of the destination
29 * from the tile buffer after having waited for the scoreboard (which is
30 * handled by vc4_qpu_emit.c), then do math using your output color and that
31 * destination value, and update the output color appropriately.
35 * Lowers fixed-function blending to a load of the destination color and a
36 * series of ALU operations before the store of the output.
38 #include "util/u_format.h"
40 #include "glsl/nir/nir_builder.h"
41 #include "vc4_context.h"
43 /** Emits a load of the previous fragment color from the tile buffer. */
45 vc4_nir_get_dst_color(nir_builder
*b
)
47 nir_intrinsic_instr
*load
=
48 nir_intrinsic_instr_create(b
->shader
,
49 nir_intrinsic_load_input
);
50 load
->num_components
= 1;
51 load
->const_index
[0] = VC4_NIR_TLB_COLOR_READ_INPUT
;
52 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 1, NULL
);
53 nir_builder_instr_insert(b
, &load
->instr
);
54 return &load
->dest
.ssa
;
58 vc4_nir_srgb_decode(nir_builder
*b
, nir_ssa_def
*srgb
)
60 nir_ssa_def
*is_low
= nir_flt(b
, srgb
, nir_imm_float(b
, 0.04045));
61 nir_ssa_def
*low
= nir_fmul(b
, srgb
, nir_imm_float(b
, 1.0 / 12.92));
62 nir_ssa_def
*high
= nir_fpow(b
,
65 nir_imm_float(b
, 0.055)),
66 nir_imm_float(b
, 1.0 / 1.055)),
67 nir_imm_float(b
, 2.4));
69 return nir_bcsel(b
, is_low
, low
, high
);
73 vc4_nir_srgb_encode(nir_builder
*b
, nir_ssa_def
*linear
)
75 nir_ssa_def
*is_low
= nir_flt(b
, linear
, nir_imm_float(b
, 0.0031308));
76 nir_ssa_def
*low
= nir_fmul(b
, linear
, nir_imm_float(b
, 12.92));
77 nir_ssa_def
*high
= nir_fsub(b
,
79 nir_imm_float(b
, 1.055),
82 nir_imm_float(b
, 0.41666))),
83 nir_imm_float(b
, 0.055));
85 return nir_bcsel(b
, is_low
, low
, high
);
89 vc4_blend_channel(nir_builder
*b
,
96 case PIPE_BLENDFACTOR_ONE
:
97 return nir_imm_float(b
, 1.0);
98 case PIPE_BLENDFACTOR_SRC_COLOR
:
100 case PIPE_BLENDFACTOR_SRC_ALPHA
:
102 case PIPE_BLENDFACTOR_DST_ALPHA
:
104 case PIPE_BLENDFACTOR_DST_COLOR
:
106 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
:
111 nir_imm_float(b
, 1.0),
114 return nir_imm_float(b
, 1.0);
116 case PIPE_BLENDFACTOR_CONST_COLOR
:
117 return vc4_nir_get_state_uniform(b
, QUNIFORM_BLEND_CONST_COLOR_X
+ channel
);
118 case PIPE_BLENDFACTOR_CONST_ALPHA
:
119 return vc4_nir_get_state_uniform(b
, QUNIFORM_BLEND_CONST_COLOR_W
);
120 case PIPE_BLENDFACTOR_ZERO
:
121 return nir_imm_float(b
, 0.0);
122 case PIPE_BLENDFACTOR_INV_SRC_COLOR
:
123 return nir_fsub(b
, nir_imm_float(b
, 1.0), src
[channel
]);
124 case PIPE_BLENDFACTOR_INV_SRC_ALPHA
:
125 return nir_fsub(b
, nir_imm_float(b
, 1.0), src
[3]);
126 case PIPE_BLENDFACTOR_INV_DST_ALPHA
:
127 return nir_fsub(b
, nir_imm_float(b
, 1.0), dst
[3]);
128 case PIPE_BLENDFACTOR_INV_DST_COLOR
:
129 return nir_fsub(b
, nir_imm_float(b
, 1.0), dst
[channel
]);
130 case PIPE_BLENDFACTOR_INV_CONST_COLOR
:
131 return nir_fsub(b
, nir_imm_float(b
, 1.0),
132 vc4_nir_get_state_uniform(b
, QUNIFORM_BLEND_CONST_COLOR_X
+ channel
));
133 case PIPE_BLENDFACTOR_INV_CONST_ALPHA
:
134 return nir_fsub(b
, nir_imm_float(b
, 1.0),
135 vc4_nir_get_state_uniform(b
, QUNIFORM_BLEND_CONST_COLOR_W
));
138 case PIPE_BLENDFACTOR_SRC1_COLOR
:
139 case PIPE_BLENDFACTOR_SRC1_ALPHA
:
140 case PIPE_BLENDFACTOR_INV_SRC1_COLOR
:
141 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA
:
143 fprintf(stderr
, "Unknown blend factor %d\n", factor
);
144 return nir_imm_float(b
, 1.0);
149 vc4_blend_func(nir_builder
*b
, nir_ssa_def
*src
, nir_ssa_def
*dst
,
154 return nir_fadd(b
, src
, dst
);
155 case PIPE_BLEND_SUBTRACT
:
156 return nir_fsub(b
, src
, dst
);
157 case PIPE_BLEND_REVERSE_SUBTRACT
:
158 return nir_fsub(b
, dst
, src
);
160 return nir_fmin(b
, src
, dst
);
162 return nir_fmax(b
, src
, dst
);
166 fprintf(stderr
, "Unknown blend func %d\n", func
);
173 vc4_do_blending(struct vc4_compile
*c
, nir_builder
*b
, nir_ssa_def
**result
,
174 nir_ssa_def
**src_color
, nir_ssa_def
**dst_color
)
176 struct pipe_rt_blend_state
*blend
= &c
->fs_key
->blend
;
178 if (!blend
->blend_enable
) {
179 for (int i
= 0; i
< 4; i
++)
180 result
[i
] = src_color
[i
];
184 /* Clamp the src color to [0, 1]. Dest is already clamped. */
185 for (int i
= 0; i
< 4; i
++)
186 src_color
[i
] = nir_fsat(b
, src_color
[i
]);
188 nir_ssa_def
*src_blend
[4], *dst_blend
[4];
189 for (int i
= 0; i
< 4; i
++) {
190 int src_factor
= ((i
!= 3) ? blend
->rgb_src_factor
:
191 blend
->alpha_src_factor
);
192 int dst_factor
= ((i
!= 3) ? blend
->rgb_dst_factor
:
193 blend
->alpha_dst_factor
);
194 src_blend
[i
] = nir_fmul(b
, src_color
[i
],
196 src_color
, dst_color
,
198 dst_blend
[i
] = nir_fmul(b
, dst_color
[i
],
200 src_color
, dst_color
,
204 for (int i
= 0; i
< 4; i
++) {
205 result
[i
] = vc4_blend_func(b
, src_blend
[i
], dst_blend
[i
],
206 ((i
!= 3) ? blend
->rgb_func
:
212 vc4_logicop(nir_builder
*b
, int logicop_func
,
213 nir_ssa_def
*src
, nir_ssa_def
*dst
)
215 switch (logicop_func
) {
216 case PIPE_LOGICOP_CLEAR
:
217 return nir_imm_int(b
, 0);
218 case PIPE_LOGICOP_NOR
:
219 return nir_inot(b
, nir_ior(b
, src
, dst
));
220 case PIPE_LOGICOP_AND_INVERTED
:
221 return nir_iand(b
, nir_inot(b
, src
), dst
);
222 case PIPE_LOGICOP_COPY_INVERTED
:
223 return nir_inot(b
, src
);
224 case PIPE_LOGICOP_AND_REVERSE
:
225 return nir_iand(b
, src
, nir_inot(b
, dst
));
226 case PIPE_LOGICOP_INVERT
:
227 return nir_inot(b
, dst
);
228 case PIPE_LOGICOP_XOR
:
229 return nir_ixor(b
, src
, dst
);
230 case PIPE_LOGICOP_NAND
:
231 return nir_inot(b
, nir_iand(b
, src
, dst
));
232 case PIPE_LOGICOP_AND
:
233 return nir_iand(b
, src
, dst
);
234 case PIPE_LOGICOP_EQUIV
:
235 return nir_inot(b
, nir_ixor(b
, src
, dst
));
236 case PIPE_LOGICOP_NOOP
:
238 case PIPE_LOGICOP_OR_INVERTED
:
239 return nir_ior(b
, nir_inot(b
, src
), dst
);
240 case PIPE_LOGICOP_OR_REVERSE
:
241 return nir_ior(b
, src
, nir_inot(b
, dst
));
242 case PIPE_LOGICOP_OR
:
243 return nir_ior(b
, src
, dst
);
244 case PIPE_LOGICOP_SET
:
245 return nir_imm_int(b
, ~0);
247 fprintf(stderr
, "Unknown logic op %d\n", logicop_func
);
249 case PIPE_LOGICOP_COPY
:
255 vc4_nir_pipe_compare_func(nir_builder
*b
, int func
,
256 nir_ssa_def
*src0
, nir_ssa_def
*src1
)
260 fprintf(stderr
, "Unknown compare func %d\n", func
);
262 case PIPE_FUNC_NEVER
:
263 return nir_imm_int(b
, 0);
264 case PIPE_FUNC_ALWAYS
:
265 return nir_imm_int(b
, ~0);
266 case PIPE_FUNC_EQUAL
:
267 return nir_feq(b
, src0
, src1
);
268 case PIPE_FUNC_NOTEQUAL
:
269 return nir_fne(b
, src0
, src1
);
270 case PIPE_FUNC_GREATER
:
271 return nir_flt(b
, src1
, src0
);
272 case PIPE_FUNC_GEQUAL
:
273 return nir_fge(b
, src0
, src1
);
275 return nir_flt(b
, src0
, src1
);
276 case PIPE_FUNC_LEQUAL
:
277 return nir_fge(b
, src1
, src0
);
282 vc4_nir_emit_alpha_test_discard(struct vc4_compile
*c
, nir_builder
*b
,
285 if (!c
->fs_key
->alpha_test
)
288 nir_ssa_def
*alpha_ref
=
289 vc4_nir_get_state_uniform(b
, QUNIFORM_ALPHA_REF
);
290 nir_ssa_def
*condition
=
291 vc4_nir_pipe_compare_func(b
, c
->fs_key
->alpha_test_func
,
294 nir_intrinsic_instr
*discard
=
295 nir_intrinsic_instr_create(b
->shader
,
296 nir_intrinsic_discard_if
);
297 discard
->num_components
= 1;
298 discard
->src
[0] = nir_src_for_ssa(nir_inot(b
, condition
));
299 nir_builder_instr_insert(b
, &discard
->instr
);
303 vc4_nir_lower_blend_instr(struct vc4_compile
*c
, nir_builder
*b
,
304 nir_intrinsic_instr
*intr
)
306 enum pipe_format color_format
= c
->fs_key
->color_format
;
307 const uint8_t *format_swiz
= vc4_get_format_swizzle(color_format
);
309 /* Pull out the float src/dst color components. */
310 nir_ssa_def
*packed_dst_color
= vc4_nir_get_dst_color(b
);
311 nir_ssa_def
*dst_vec4
= nir_unpack_unorm_4x8(b
, packed_dst_color
);
312 nir_ssa_def
*src_color
[4], *unpacked_dst_color
[4];
313 for (unsigned i
= 0; i
< 4; i
++) {
314 src_color
[i
] = nir_swizzle(b
, intr
->src
[0].ssa
, &i
, 1, false);
315 unpacked_dst_color
[i
] = nir_swizzle(b
, dst_vec4
, &i
, 1, false);
318 /* Unswizzle the destination color. */
319 nir_ssa_def
*dst_color
[4];
320 for (unsigned i
= 0; i
< 4; i
++) {
321 dst_color
[i
] = vc4_nir_get_swizzled_channel(b
,
326 vc4_nir_emit_alpha_test_discard(c
, b
, src_color
[3]);
328 /* Turn dst color to linear. */
329 if (util_format_is_srgb(color_format
)) {
330 for (int i
= 0; i
< 3; i
++)
331 dst_color
[i
] = vc4_nir_srgb_decode(b
, dst_color
[i
]);
334 nir_ssa_def
*blend_color
[4];
335 vc4_do_blending(c
, b
, blend_color
, src_color
, dst_color
);
337 /* sRGB encode the output color */
338 if (util_format_is_srgb(color_format
)) {
339 for (int i
= 0; i
< 3; i
++)
340 blend_color
[i
] = vc4_nir_srgb_encode(b
, blend_color
[i
]);
343 nir_ssa_def
*swizzled_outputs
[4];
344 for (int i
= 0; i
< 4; i
++) {
345 swizzled_outputs
[i
] =
346 vc4_nir_get_swizzled_channel(b
, blend_color
,
350 nir_ssa_def
*packed_color
=
351 nir_pack_unorm_4x8(b
,
356 swizzled_outputs
[3]));
358 packed_color
= vc4_logicop(b
, c
->fs_key
->logicop_func
,
359 packed_color
, packed_dst_color
);
361 /* If the bit isn't set in the color mask, then just return the
362 * original dst color, instead.
364 uint32_t colormask
= 0xffffffff;
365 for (int i
= 0; i
< 4; i
++) {
366 if (format_swiz
[i
] < 4 &&
367 !(c
->fs_key
->blend
.colormask
& (1 << format_swiz
[i
]))) {
368 colormask
&= ~(0xff << (i
* 8));
371 packed_color
= nir_ior(b
,
372 nir_iand(b
, packed_color
,
373 nir_imm_int(b
, colormask
)),
374 nir_iand(b
, packed_dst_color
,
375 nir_imm_int(b
, ~colormask
)));
377 /* Turn the old vec4 output into a store of the packed color. */
378 nir_instr_rewrite_src(&intr
->instr
, &intr
->src
[0],
379 nir_src_for_ssa(packed_color
));
380 intr
->num_components
= 1;
384 vc4_nir_lower_blend_block(nir_block
*block
, void *state
)
386 struct vc4_compile
*c
= state
;
388 nir_foreach_instr(block
, instr
) {
389 if (instr
->type
!= nir_instr_type_intrinsic
)
391 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
392 if (intr
->intrinsic
!= nir_intrinsic_store_output
)
395 nir_variable
*output_var
= NULL
;
396 nir_foreach_variable(var
, &c
->s
->outputs
) {
397 if (var
->data
.driver_location
== intr
->const_index
[0]) {
404 if (output_var
->data
.location
!= FRAG_RESULT_COLOR
&&
405 output_var
->data
.location
!= FRAG_RESULT_DATA0
) {
409 nir_function_impl
*impl
=
410 nir_cf_node_get_function(&block
->cf_node
);
412 nir_builder_init(&b
, impl
);
413 b
.cursor
= nir_before_instr(&intr
->instr
);
414 vc4_nir_lower_blend_instr(c
, &b
, intr
);
420 vc4_nir_lower_blend(struct vc4_compile
*c
)
422 nir_foreach_overload(c
->s
, overload
) {
423 if (overload
->impl
) {
424 nir_foreach_block(overload
->impl
,
425 vc4_nir_lower_blend_block
, c
);
427 nir_metadata_preserve(overload
->impl
,
428 nir_metadata_block_index
|
429 nir_metadata_dominance
);