src/gallium/drivers/vc4/vc4_nir_lower_txf_ms.c

   1 /*
   2  * Copyright © 2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "vc4_qir.h"
  25 #include "kernel/vc4_packet.h"
  26 #include "compiler/nir/nir_builder.h"
  27
  28 /** @file vc4_nir_lower_txf_ms.c
  29  * Walks the NIR generated by TGSI-to-NIR to lower its nir_texop_txf_ms
  30  * coordinates to do the math necessary and use a plain nir_texop_txf instead.
  31  *
  32  * MSAA textures are laid out as 32x32-aligned blocks of RGBA8888 or Z24S8.
  33  * We can't load them through the normal sampler path because of the lack of
  34  * linear support in the hardware.  So, we treat MSAA textures as a giant UBO
  35  * and do the math in the shader.
  36  */
  37
  38 static void
  39 vc4_nir_lower_txf_ms_instr(struct vc4_compile *c, nir_builder *b,
  40                            nir_tex_instr *txf_ms)
  41 {
  42         if (txf_ms->op != nir_texop_txf_ms)
  43                 return;
  44
  45         b->cursor = nir_before_instr(&txf_ms->instr);
  46
  47         nir_tex_instr *txf = nir_tex_instr_create(c->s, 1);
  48         txf->op = nir_texop_txf;
  49         txf->texture_index = txf_ms->texture_index;
  50         txf->coord_components = txf_ms->coord_components;
  51         txf->is_shadow = txf_ms->is_shadow;
  52         txf->is_new_style_shadow = txf_ms->is_new_style_shadow;
  53
  54         nir_ssa_def *coord = NULL, *sample_index = NULL;
  55         for (int i = 0; i < txf_ms->num_srcs; i++) {
  56                 assert(txf_ms->src[i].src.is_ssa);
  57
  58                 switch (txf_ms->src[i].src_type) {
  59                 case nir_tex_src_coord:
  60                         coord = txf_ms->src[i].src.ssa;
  61                         break;
  62                 case nir_tex_src_ms_index:
  63                         sample_index = txf_ms->src[i].src.ssa;
  64                         break;
  65                 default:
  66                         unreachable("Unknown txf_ms src\n");
  67                 }
  68         }
  69         assert(coord);
  70         assert(sample_index);
  71
  72         nir_ssa_def *x = nir_channel(b, coord, 0);
  73         nir_ssa_def *y = nir_channel(b, coord, 1);
  74
  75         uint32_t tile_w = 32;
  76         uint32_t tile_h = 32;
  77         uint32_t tile_w_shift = 5;
  78         uint32_t tile_h_shift = 5;
  79         uint32_t tile_size = (tile_h * tile_w *
  80                               VC4_MAX_SAMPLES * sizeof(uint32_t));
  81         unsigned unit = txf_ms->texture_index;
  82         uint32_t w = align(c->key->tex[unit].msaa_width, tile_w);
  83         uint32_t w_tiles = w / tile_w;
  84
  85         nir_ssa_def *x_tile = nir_ushr(b, x, nir_imm_int(b, tile_w_shift));
  86         nir_ssa_def *y_tile = nir_ushr(b, y, nir_imm_int(b, tile_h_shift));
  87         nir_ssa_def *tile_addr = nir_iadd(b,
  88                                           nir_imul(b, x_tile,
  89                                                    nir_imm_int(b, tile_size)),
  90                                           nir_imul(b, y_tile,
  91                                                    nir_imm_int(b, (w_tiles *
  92                                                                    tile_size))));
  93         nir_ssa_def *x_subspan = nir_iand(b, x,
  94                                           nir_imm_int(b, (tile_w - 1) & ~1));
  95         nir_ssa_def *y_subspan = nir_iand(b, y,
  96                                           nir_imm_int(b, (tile_h - 1) & ~1));
  97         nir_ssa_def *subspan_addr = nir_iadd(b,
  98                                              nir_imul(b, x_subspan,
  99                                                       nir_imm_int(b, 2 * VC4_MAX_SAMPLES * sizeof(uint32_t))),
 100                                              nir_imul(b, y_subspan,
 101                                                       nir_imm_int(b,
 102                                                                   tile_w *
 103                                                                   VC4_MAX_SAMPLES *
 104                                                                   sizeof(uint32_t))));
 105
 106         nir_ssa_def *pixel_addr = nir_ior(b,
 107                                           nir_iand(b,
 108                                                    nir_ishl(b, x,
 109                                                             nir_imm_int(b, 2)),
 110                                                    nir_imm_int(b, (1 << 2))),
 111                                           nir_iand(b,
 112                                                    nir_ishl(b, y,
 113                                                             nir_imm_int(b, 3)),
 114                                                    nir_imm_int(b, (1 << 3))));
 115
 116         nir_ssa_def *sample_addr = nir_ishl(b, sample_index, nir_imm_int(b, 4));
 117
 118         nir_ssa_def *addr = nir_iadd(b,
 119                                      nir_ior(b, sample_addr, pixel_addr),
 120                                      nir_iadd(b, subspan_addr, tile_addr));
 121
 122         txf->src[0].src_type = nir_tex_src_coord;
 123         txf->src[0].src = nir_src_for_ssa(nir_vec2(b, addr, nir_imm_int(b, 0)));
 124         nir_ssa_dest_init(&txf->instr, &txf->dest, 4, 32, NULL);
 125         nir_builder_instr_insert(b, &txf->instr);
 126         nir_ssa_def_rewrite_uses(&txf_ms->dest.ssa,
 127                                  nir_src_for_ssa(&txf->dest.ssa));
 128         nir_instr_remove(&txf_ms->instr);
 129 }
 130
 131 static bool
 132 vc4_nir_lower_txf_ms_impl(struct vc4_compile *c, nir_function_impl *impl)
 133 {
 134         nir_builder b;
 135         nir_builder_init(&b, impl);
 136
 137         nir_foreach_block(block, impl) {
 138                 nir_foreach_instr_safe(instr, block) {
 139                         if (instr->type == nir_instr_type_tex) {
 140                                 vc4_nir_lower_txf_ms_instr(c, &b,
 141                                                 nir_instr_as_tex(instr));
 142                         }
 143                 }
 144         }
 145
 146         nir_metadata_preserve(impl,
 147                               nir_metadata_block_index |
 148                               nir_metadata_dominance);
 149
 150         return true;
 151 }
 152
 153 void
 154 vc4_nir_lower_txf_ms(nir_shader *s, struct vc4_compile *c)
 155 {
 156         nir_foreach_function(function, s) {
 157                 if (function->impl)
 158                         vc4_nir_lower_txf_ms_impl(c, function->impl);
 159         }
 160 }