freedreno/ir3: drop instr_clone() stuff
[mesa.git] / src / gallium / drivers / vc4 / vc4_packet.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_PACKET_H
25 #define VC4_PACKET_H
26
27 enum vc4_packet {
28 VC4_PACKET_HALT = 0,
29 VC4_PACKET_NOP = 1,
30
31 VC4_PACKET_FLUSH = 4,
32 VC4_PACKET_FLUSH_ALL = 5,
33 VC4_PACKET_START_TILE_BINNING = 6,
34 VC4_PACKET_INCREMENT_SEMAPHORE = 7,
35 VC4_PACKET_WAIT_ON_SEMAPHORE = 8,
36
37 VC4_PACKET_BRANCH = 16,
38 VC4_PACKET_BRANCH_TO_SUB_LIST = 17,
39
40 VC4_PACKET_STORE_MS_TILE_BUFFER = 24,
41 VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF = 25,
42 VC4_PACKET_STORE_FULL_RES_TILE_BUFFER = 26,
43 VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER = 27,
44 VC4_PACKET_STORE_TILE_BUFFER_GENERAL = 28,
45 VC4_PACKET_LOAD_TILE_BUFFER_GENERAL = 29,
46
47 VC4_PACKET_GL_INDEXED_PRIMITIVE = 32,
48 VC4_PACKET_GL_ARRAY_PRIMITIVE = 33,
49
50 VC4_PACKET_COMPRESSED_PRIMITIVE = 48,
51 VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE = 49,
52
53 VC4_PACKET_PRIMITIVE_LIST_FORMAT = 56,
54
55 VC4_PACKET_GL_SHADER_STATE = 64,
56 VC4_PACKET_NV_SHADER_STATE = 65,
57 VC4_PACKET_VG_SHADER_STATE = 66,
58
59 VC4_PACKET_CONFIGURATION_BITS = 96,
60 VC4_PACKET_FLAT_SHADE_FLAGS = 97,
61 VC4_PACKET_POINT_SIZE = 98,
62 VC4_PACKET_LINE_WIDTH = 99,
63 VC4_PACKET_RHT_X_BOUNDARY = 100,
64 VC4_PACKET_DEPTH_OFFSET = 101,
65 VC4_PACKET_CLIP_WINDOW = 102,
66 VC4_PACKET_VIEWPORT_OFFSET = 103,
67 VC4_PACKET_Z_CLIPPING = 104,
68 VC4_PACKET_CLIPPER_XY_SCALING = 105,
69 VC4_PACKET_CLIPPER_Z_SCALING = 106,
70
71 VC4_PACKET_TILE_BINNING_MODE_CONFIG = 112,
72 VC4_PACKET_TILE_RENDERING_MODE_CONFIG = 113,
73 VC4_PACKET_CLEAR_COLORS = 114,
74 VC4_PACKET_TILE_COORDINATES = 115,
75
76 /* Not an actual hardware packet -- this is what we use to put
77 * references to GEM bos in the command stream, since we need the u32
78 * int the actual address packet in order to store the offset from the
79 * start of the BO.
80 */
81 VC4_PACKET_GEM_HANDLES = 254,
82 } __attribute__ ((__packed__));
83
84
85 #define VC4_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low))
86 /* Using the GNU statement expression extension */
87 #define VC4_SET_FIELD(value, field) \
88 ({ \
89 uint32_t fieldval = (value) << field ## _SHIFT; \
90 assert((fieldval & ~ field ## _MASK) == 0); \
91 fieldval & field ## _MASK; \
92 })
93
94 #define VC4_GET_FIELD(word, field) (((word) & field ## _MASK) >> field ## _SHIFT)
95
96 /** @{
97 * Bits used by packets like VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
98 * VC4_PACKET_TILE_RENDERING_MODE_CONFIG.
99 */
100 #define VC4_TILING_FORMAT_LINEAR 0
101 #define VC4_TILING_FORMAT_T 1
102 #define VC4_TILING_FORMAT_LT 2
103 /** @} */
104
105 /** @{
106 *
107 * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
108 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address)
109 */
110
111 #define VC4_LOADSTORE_TILE_BUFFER_EOF (1 << 3)
112 #define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_VG_MASK (1 << 2)
113 #define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_ZS (1 << 1)
114 #define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_COLOR (1 << 0)
115
116 /** @} */
117
118 /** @{
119 *
120 * byte 1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
121 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
122 */
123 #define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 7)
124 #define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR (1 << 6)
125 #define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR (1 << 5)
126 #define VC4_STORE_TILE_BUFFER_DISABLE_SWAP (1 << 4)
127
128 #define VC4_LOADSTORE_TILE_BUFFER_RGBA8888 (0 << 0)
129 #define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER (1 << 0)
130 #define VC4_LOADSTORE_TILE_BUFFER_BGR565 (2 << 0)
131 #define VC4_LOADSTORE_TILE_BUFFER_MASK (3 << 0)
132 /** @} */
133
134 /** @{
135 *
136 * byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
137 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
138 */
139 #define VC4_STORE_TILE_BUFFER_MODE_SAMPLE0 (0 << 6)
140 #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4 (1 << 6)
141 #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16 (2 << 6)
142
143 /** The values of the field are VC4_TILING_FORMAT_* */
144 #define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK (3 << 4)
145 #define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT 4
146
147
148 #define VC4_LOADSTORE_TILE_BUFFER_NONE (0 << 0)
149 #define VC4_LOADSTORE_TILE_BUFFER_COLOR (1 << 0)
150 #define VC4_LOADSTORE_TILE_BUFFER_ZS (2 << 0)
151 #define VC4_LOADSTORE_TILE_BUFFER_Z (3 << 0)
152 #define VC4_LOADSTORE_TILE_BUFFER_VG_MASK (4 << 0)
153 #define VC4_LOADSTORE_TILE_BUFFER_FULL (5 << 0)
154 /** @} */
155
156 #define VC4_INDEX_BUFFER_U8 (0 << 4)
157 #define VC4_INDEX_BUFFER_U16 (1 << 4)
158
159 /* This flag is only present in NV shader state. */
160 #define VC4_SHADER_FLAG_SHADED_CLIP_COORDS (1 << 3)
161 #define VC4_SHADER_FLAG_ENABLE_CLIPPING (1 << 2)
162 #define VC4_SHADER_FLAG_VS_POINT_SIZE (1 << 1)
163 #define VC4_SHADER_FLAG_FS_SINGLE_THREAD (1 << 0)
164
165 /** @{ byte 2 of config bits. */
166 #define VC4_CONFIG_BITS_EARLY_Z_UPDATE (1 << 1)
167 #define VC4_CONFIG_BITS_EARLY_Z (1 << 0)
168 /** @} */
169
170 /** @{ byte 1 of config bits. */
171 #define VC4_CONFIG_BITS_Z_UPDATE (1 << 7)
172 /** same values in this 3-bit field as PIPE_FUNC_* */
173 #define VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT 4
174 #define VC4_CONFIG_BITS_COVERAGE_READ_LEAVE (1 << 3)
175
176 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_NONZERO (0 << 1)
177 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_ODD (1 << 1)
178 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_OR (2 << 1)
179 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_ZERO (3 << 1)
180
181 #define VC4_CONFIG_BITS_COVERAGE_PIPE_SELECT (1 << 0)
182 /** @} */
183
184 /** @{ byte 0 of config bits. */
185 #define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_NONE (0 << 6)
186 #define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X (1 << 6)
187 #define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_16X (2 << 6)
188
189 #define VC4_CONFIG_BITS_AA_POINTS_AND_LINES (1 << 4)
190 #define VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET (1 << 3)
191 #define VC4_CONFIG_BITS_CW_PRIMITIVES (1 << 2)
192 #define VC4_CONFIG_BITS_ENABLE_PRIM_BACK (1 << 1)
193 #define VC4_CONFIG_BITS_ENABLE_PRIM_FRONT (1 << 0)
194 /** @} */
195
196 /** @{ bits in the last u8 of VC4_PACKET_TILE_BINNING_MODE_CONFIG */
197 #define VC4_BIN_CONFIG_DB_NON_MS (1 << 7)
198
199 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32 (0 << 5)
200 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_64 (1 << 5)
201 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_128 (2 << 5)
202 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_256 (3 << 5)
203
204 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_32 (0 << 3)
205 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_64 (1 << 3)
206 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_128 (2 << 3)
207 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_256 (3 << 3)
208
209 #define VC4_BIN_CONFIG_AUTO_INIT_TSDA (1 << 2)
210 #define VC4_BIN_CONFIG_TILE_BUFFER_64BIT (1 << 1)
211 #define VC4_BIN_CONFIG_MS_MODE_4X (1 << 0)
212 /** @} */
213
214 /** @{ bits in the last u16 of VC4_PACKET_TILE_RENDERING_MODE_CONFIG */
215 #define VC4_RENDER_CONFIG_DB_NON_MS (1 << 12)
216 #define VC4_RENDER_CONFIG_EARLY_Z_COVERAGE_DISABLE (1 << 11)
217 #define VC4_RENDER_CONFIG_EARLY_Z_DIRECTION_G (1 << 10)
218 #define VC4_RENDER_CONFIG_COVERAGE_MODE (1 << 9)
219 #define VC4_RENDER_CONFIG_ENABLE_VG_MASK (1 << 8)
220
221 /** The values of the field are VC4_TILING_FORMAT_* */
222 #define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK (3 << 6)
223 #define VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT 6
224
225 #define VC4_RENDER_CONFIG_DECIMATE_MODE_1X (0 << 4)
226 #define VC4_RENDER_CONFIG_DECIMATE_MODE_4X (1 << 4)
227 #define VC4_RENDER_CONFIG_DECIMATE_MODE_16X (2 << 4)
228
229 #define VC4_RENDER_CONFIG_FORMAT_BGR565_DITHERED (0 << 2)
230 #define VC4_RENDER_CONFIG_FORMAT_RGBA8888 (1 << 2)
231 #define VC4_RENDER_CONFIG_FORMAT_BGR565 (2 << 2)
232 #define VC4_RENDER_CONFIG_FORMAT_MASK (3 << 2)
233
234 #define VC4_RENDER_CONFIG_TILE_BUFFER_64BIT (1 << 1)
235 #define VC4_RENDER_CONFIG_MS_MODE_4X (1 << 0)
236
237 #define VC4_PRIMITIVE_LIST_FORMAT_16_INDEX (1 << 4)
238 #define VC4_PRIMITIVE_LIST_FORMAT_32_XY (3 << 4)
239 #define VC4_PRIMITIVE_LIST_FORMAT_TYPE_POINTS (0 << 0)
240 #define VC4_PRIMITIVE_LIST_FORMAT_TYPE_LINES (1 << 0)
241 #define VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES (2 << 0)
242 #define VC4_PRIMITIVE_LIST_FORMAT_TYPE_RHT (3 << 0)
243
244 enum vc4_texture_data_type {
245 VC4_TEXTURE_TYPE_RGBA8888 = 0,
246 VC4_TEXTURE_TYPE_RGBX8888 = 1,
247 VC4_TEXTURE_TYPE_RGBA4444 = 2,
248 VC4_TEXTURE_TYPE_RGBA5551 = 3,
249 VC4_TEXTURE_TYPE_RGB565 = 4,
250 VC4_TEXTURE_TYPE_LUMINANCE = 5,
251 VC4_TEXTURE_TYPE_ALPHA = 6,
252 VC4_TEXTURE_TYPE_LUMALPHA = 7,
253 VC4_TEXTURE_TYPE_ETC1 = 8,
254 VC4_TEXTURE_TYPE_S16F = 9,
255 VC4_TEXTURE_TYPE_S8 = 10,
256 VC4_TEXTURE_TYPE_S16 = 11,
257 VC4_TEXTURE_TYPE_BW1 = 12,
258 VC4_TEXTURE_TYPE_A4 = 13,
259 VC4_TEXTURE_TYPE_A1 = 14,
260 VC4_TEXTURE_TYPE_RGBA64 = 15,
261 VC4_TEXTURE_TYPE_RGBA32R = 16,
262 VC4_TEXTURE_TYPE_YUV422R = 17,
263 };
264
265 #define VC4_TEX_P0_OFFSET_MASK VC4_MASK(31, 12)
266 #define VC4_TEX_P0_OFFSET_SHIFT 12
267 #define VC4_TEX_P0_CSWIZ_MASK VC4_MASK(11, 10)
268 #define VC4_TEX_P0_CSWIZ_SHIFT 10
269 #define VC4_TEX_P0_CMMODE_MASK VC4_MASK(9, 9)
270 #define VC4_TEX_P0_CMMODE_SHIFT 9
271 #define VC4_TEX_P0_FLIPY_MASK VC4_MASK(8, 8)
272 #define VC4_TEX_P0_FLIPY_SHIFT 8
273 #define VC4_TEX_P0_TYPE_MASK VC4_MASK(7, 4)
274 #define VC4_TEX_P0_TYPE_SHIFT 4
275 #define VC4_TEX_P0_MIPLVLS_MASK VC4_MASK(3, 0)
276 #define VC4_TEX_P0_MIPLVLS_SHIFT 0
277
278 #define VC4_TEX_P1_TYPE4_MASK VC4_MASK(31, 31)
279 #define VC4_TEX_P1_TYPE4_SHIFT 31
280 #define VC4_TEX_P1_HEIGHT_MASK VC4_MASK(30, 20)
281 #define VC4_TEX_P1_HEIGHT_SHIFT 20
282 #define VC4_TEX_P1_ETCFLIP_MASK VC4_MASK(19, 19)
283 #define VC4_TEX_P1_ETCFLIP_SHIFT 19
284 #define VC4_TEX_P1_WIDTH_MASK VC4_MASK(18, 8)
285 #define VC4_TEX_P1_WIDTH_SHIFT 8
286
287 #define VC4_TEX_P1_MAGFILT_MASK VC4_MASK(7, 7)
288 #define VC4_TEX_P1_MAGFILT_SHIFT 7
289 # define VC4_TEX_P1_MAGFILT_LINEAR 0
290 # define VC4_TEX_P1_MAGFILT_NEAREST 1
291
292 #define VC4_TEX_P1_MINFILT_MASK VC4_MASK(6, 4)
293 #define VC4_TEX_P1_MINFILT_SHIFT 4
294 # define VC4_TEX_P1_MINFILT_LINEAR 0
295 # define VC4_TEX_P1_MINFILT_NEAREST 1
296 # define VC4_TEX_P1_MINFILT_NEAR_MIP_NEAR 2
297 # define VC4_TEX_P1_MINFILT_NEAR_MIP_LIN 3
298 # define VC4_TEX_P1_MINFILT_LIN_MIP_NEAR 4
299 # define VC4_TEX_P1_MINFILT_LIN_MIP_LIN 5
300
301 #define VC4_TEX_P1_WRAP_T_MASK VC4_MASK(3, 2)
302 #define VC4_TEX_P1_WRAP_T_SHIFT 2
303 #define VC4_TEX_P1_WRAP_S_MASK VC4_MASK(1, 0)
304 #define VC4_TEX_P1_WRAP_S_SHIFT 0
305 # define VC4_TEX_P1_WRAP_REPEAT 0
306 # define VC4_TEX_P1_WRAP_CLAMP 1
307 # define VC4_TEX_P1_WRAP_MIRROR 2
308 # define VC4_TEX_P1_WRAP_BORDER 3
309
310 #define VC4_TEX_P2_PTYPE_MASK VC4_MASK(31, 30)
311 #define VC4_TEX_P2_PTYPE_SHIFT 30
312 # define VC4_TEX_P2_PTYPE_IGNORED 0
313 # define VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE 1
314 # define VC4_TEX_P2_PTYPE_CHILD_IMAGE_DIMENSIONS 2
315 # define VC4_TEX_P2_PTYPE_CHILD_IMAGE_OFFSETS 3
316
317 /* VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE bits */
318 #define VC4_TEX_P2_CMST_MASK VC4_MASK(29, 12)
319 #define VC4_TEX_P2_CMST_SHIFT 12
320 #define VC4_TEX_P2_BSLOD_MASK VC4_MASK(0, 0)
321 #define VC4_TEX_P2_BSLOD_SHIFT 0
322
323 /* VC4_TEX_P2_PTYPE_CHILD_IMAGE_DIMENSIONS */
324 #define VC4_TEX_P2_CHEIGHT_MASK VC4_MASK(22, 12)
325 #define VC4_TEX_P2_CHEIGHT_SHIFT 12
326 #define VC4_TEX_P2_CWIDTH_MASK VC4_MASK(10, 0)
327 #define VC4_TEX_P2_CWIDTH_SHIFT 0
328
329 /* VC4_TEX_P2_PTYPE_CHILD_IMAGE_OFFSETS */
330 #define VC4_TEX_P2_CYOFF_MASK VC4_MASK(22, 12)
331 #define VC4_TEX_P2_CYOFF_SHIFT 12
332 #define VC4_TEX_P2_CXOFF_MASK VC4_MASK(10, 0)
333 #define VC4_TEX_P2_CXOFF_SHIFT 0
334
335 #endif /* VC4_PACKET_H */