src/gallium/drivers/vc4/vc4_packet.h

   1 /*
   2  * Copyright © 2014 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef VC4_PACKET_H
  25 #define VC4_PACKET_H
  26
  27 enum vc4_packet {
  28         VC4_PACKET_HALT = 0,
  29         VC4_PACKET_NOP = 1,
  30
  31         VC4_PACKET_FLUSH = 4,
  32         VC4_PACKET_FLUSH_ALL = 5,
  33         VC4_PACKET_START_TILE_BINNING = 6,
  34         VC4_PACKET_INCREMENT_SEMAPHORE = 7,
  35         VC4_PACKET_WAIT_ON_SEMAPHORE = 8,
  36
  37         VC4_PACKET_BRANCH = 16,
  38         VC4_PACKET_BRANCH_TO_SUB_LIST = 17,
  39
  40         VC4_PACKET_STORE_MS_TILE_BUFFER = 24,
  41         VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF = 25,
  42         VC4_PACKET_STORE_FULL_RES_TILE_BUFFER = 26,
  43         VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER = 27,
  44         VC4_PACKET_STORE_TILE_BUFFER_GENERAL = 28,
  45         VC4_PACKET_LOAD_TILE_BUFFER_GENERAL = 29,
  46
  47         VC4_PACKET_GL_INDEXED_PRIMITIVE = 32,
  48         VC4_PACKET_GL_ARRAY_PRIMITIVE = 33,
  49
  50         VC4_PACKET_COMPRESSED_PRIMITIVE = 48,
  51         VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE = 49,
  52
  53         VC4_PACKET_PRIMITIVE_LIST_FORMAT = 56,
  54
  55         VC4_PACKET_GL_SHADER_STATE = 64,
  56         VC4_PACKET_NV_SHADER_STATE = 65,
  57         VC4_PACKET_VG_SHADER_STATE = 66,
  58
  59         VC4_PACKET_CONFIGURATION_BITS = 96,
  60         VC4_PACKET_FLAT_SHADE_FLAGS = 97,
  61         VC4_PACKET_POINT_SIZE = 98,
  62         VC4_PACKET_LINE_WIDTH = 99,
  63         VC4_PACKET_RHT_X_BOUNDARY = 100,
  64         VC4_PACKET_DEPTH_OFFSET = 101,
  65         VC4_PACKET_CLIP_WINDOW = 102,
  66         VC4_PACKET_VIEWPORT_OFFSET = 103,
  67         VC4_PACKET_Z_CLIPPING = 104,
  68         VC4_PACKET_CLIPPER_XY_SCALING = 105,
  69         VC4_PACKET_CLIPPER_Z_SCALING = 106,
  70
  71         VC4_PACKET_TILE_BINNING_MODE_CONFIG = 112,
  72         VC4_PACKET_TILE_RENDERING_MODE_CONFIG = 113,
  73         VC4_PACKET_CLEAR_COLORS = 114,
  74         VC4_PACKET_TILE_COORDINATES = 115,
  75
  76         /* Not an actual hardware packet -- this is what we use to put
  77          * references to GEM bos in the command stream, since we need the u32
  78          * int the actual address packet in order to store the offset from the
  79          * start of the BO.
  80          */
  81         VC4_PACKET_GEM_HANDLES = 254,
  82 } __attribute__ ((__packed__));
  83
  84 /** @{
  85  * Bits used by packets like VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
  86  * VC4_PACKET_TILE_RENDERING_MODE_CONFIG.
  87 */
  88 #define VC4_TILING_FORMAT_LINEAR    0
  89 #define VC4_TILING_FORMAT_T         1
  90 #define VC4_TILING_FORMAT_LT        2
  91 /** @} */
  92
  93 /** @{
  94  *
  95  * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
  96  * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address)
  97  */
  98
  99 #define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_VG_MASK (1 << 2)
 100 #define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_ZS      (1 << 1)
 101 #define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_COLOR   (1 << 0)
 102
 103 /** @} */
 104
 105 /** @{
 106  *
 107  * byte 1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
 108  * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
 109  */
 110 #define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 7)
 111 #define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR     (1 << 6)
 112 #define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR  (1 << 5)
 113 #define VC4_STORE_TILE_BUFFER_DISABLE_SWAP         (1 << 4)
 114
 115 #define VC4_LOADSTORE_TILE_BUFFER_RGBA8888         (0 << 0)
 116 #define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER    (1 << 0)
 117 #define VC4_LOADSTORE_TILE_BUFFER_BGR565           (2 << 0)
 118 #define VC4_LOADSTORE_TILE_BUFFER_MASK             (3 << 0)
 119 /** @} */
 120
 121 /** @{
 122  *
 123  * byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
 124  * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
 125  */
 126 #define VC4_STORE_TILE_BUFFER_MODE_SAMPLE0         (0 << 6)
 127 #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4     (1 << 6)
 128 #define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16    (2 << 6)
 129
 130 /** The values of the field are VC4_TILING_FORMAT_* */
 131 #define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK      (3 << 4)
 132 #define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT     4
 133
 134
 135 #define VC4_LOADSTORE_TILE_BUFFER_NONE             (0 << 0)
 136 #define VC4_LOADSTORE_TILE_BUFFER_COLOR            (1 << 0)
 137 #define VC4_LOADSTORE_TILE_BUFFER_ZS               (2 << 0)
 138 #define VC4_LOADSTORE_TILE_BUFFER_Z                (3 << 0)
 139 #define VC4_LOADSTORE_TILE_BUFFER_VG_MASK          (4 << 0)
 140 #define VC4_LOADSTORE_TILE_BUFFER_FULL             (5 << 0)
 141 /** @} */
 142
 143 #define VC4_INDEX_BUFFER_U8                        (0 << 4)
 144 #define VC4_INDEX_BUFFER_U16                       (1 << 4)
 145
 146 /* This flag is only present in NV shader state. */
 147 #define VC4_SHADER_FLAG_SHADED_CLIP_COORDS         (1 << 3)
 148 #define VC4_SHADER_FLAG_ENABLE_CLIPPING            (1 << 2)
 149 #define VC4_SHADER_FLAG_VS_POINT_SIZE              (1 << 1)
 150 #define VC4_SHADER_FLAG_FS_SINGLE_THREAD           (1 << 0)
 151
 152 /** @{ byte 2 of config bits. */
 153 #define VC4_CONFIG_BITS_EARLY_Z_UPDATE             (1 << 1)
 154 #define VC4_CONFIG_BITS_EARLY_Z                    (1 << 0)
 155 /** @} */
 156
 157 /** @{ byte 1 of config bits. */
 158 #define VC4_CONFIG_BITS_Z_UPDATE                   (1 << 7)
 159 /** same values in this 3-bit field as PIPE_FUNC_* */
 160 #define VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT           4
 161 #define VC4_CONFIG_BITS_COVERAGE_READ_LEAVE        (1 << 3)
 162
 163 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_NONZERO    (0 << 1)
 164 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_ODD        (1 << 1)
 165 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_OR         (2 << 1)
 166 #define VC4_CONFIG_BITS_COVERAGE_UPDATE_ZERO       (3 << 1)
 167
 168 #define VC4_CONFIG_BITS_COVERAGE_PIPE_SELECT       (1 << 0)
 169 /** @} */
 170
 171 /** @{ byte 0 of config bits. */
 172 #define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_NONE (0 << 6)
 173 #define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X   (1 << 6)
 174 #define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_16X  (2 << 6)
 175
 176 #define VC4_CONFIG_BITS_AA_POINTS_AND_LINES        (1 << 4)
 177 #define VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET        (1 << 3)
 178 #define VC4_CONFIG_BITS_CW_PRIMITIVES              (1 << 2)
 179 #define VC4_CONFIG_BITS_ENABLE_PRIM_BACK           (1 << 1)
 180 #define VC4_CONFIG_BITS_ENABLE_PRIM_FRONT          (1 << 0)
 181 /** @} */
 182
 183 /** @{ bits in the last u8 of VC4_PACKET_TILE_BINNING_MODE_CONFIG */
 184 #define VC4_BIN_CONFIG_DB_NON_MS                   (1 << 7)
 185
 186 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32         (0 << 5)
 187 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_64         (1 << 5)
 188 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_128        (2 << 5)
 189 #define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_256        (3 << 5)
 190
 191 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_32    (0 << 3)
 192 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_64    (1 << 3)
 193 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_128   (2 << 3)
 194 #define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_256   (3 << 3)
 195
 196 #define VC4_BIN_CONFIG_AUTO_INIT_TSDA              (1 << 2)
 197 #define VC4_BIN_CONFIG_TILE_BUFFER_64BIT           (1 << 1)
 198 #define VC4_BIN_CONFIG_MS_MODE_4X                  (1 << 0)
 199 /** @} */
 200
 201 /** @{ bits in the last u16 of VC4_PACKET_TILE_RENDERING_MODE_CONFIG */
 202 #define VC4_RENDER_CONFIG_DB_NON_MS                (1 << 12)
 203 #define VC4_RENDER_CONFIG_EARLY_Z_COVERAGE_DISABLE (1 << 11)
 204 #define VC4_RENDER_CONFIG_EARLY_Z_DIRECTION_G      (1 << 10)
 205 #define VC4_RENDER_CONFIG_COVERAGE_MODE            (1 << 9)
 206 #define VC4_RENDER_CONFIG_ENABLE_VG_MASK           (1 << 8)
 207
 208 /** The values of the field are VC4_TILING_FORMAT_* */
 209 #define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK       (3 << 6)
 210 #define VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT      6
 211
 212 #define VC4_RENDER_CONFIG_DECIMATE_MODE_1X         (0 << 4)
 213 #define VC4_RENDER_CONFIG_DECIMATE_MODE_4X         (1 << 4)
 214 #define VC4_RENDER_CONFIG_DECIMATE_MODE_16X        (2 << 4)
 215
 216 #define VC4_RENDER_CONFIG_FORMAT_BGR565            (0 << 2)
 217 #define VC4_RENDER_CONFIG_FORMAT_RGBA8888          (1 << 2)
 218 #define VC4_RENDER_CONFIG_FORMAT_BGR565_DITHERED   (2 << 2)
 219 #define VC4_RENDER_CONFIG_FORMAT_MASK              (3 << 2)
 220
 221 #define VC4_RENDER_CONFIG_TILE_BUFFER_64BIT        (1 << 1)
 222 #define VC4_RENDER_CONFIG_MS_MODE_4X               (1 << 0)
 223
 224 #endif /* VC4_PACKET_H */