077a55ad6fcc05953188dea59fb1aeba38c5eae2
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdbool.h>
30 #include <stdint.h>
31 #include <string.h>
32
33 #include "util/u_simple_list.h"
34 #include "tgsi/tgsi_parse.h"
35
36 enum qfile {
37 QFILE_NULL,
38 QFILE_TEMP,
39 QFILE_VARY,
40 QFILE_UNIF,
41 };
42
43 struct qreg {
44 enum qfile file;
45 uint32_t index;
46 };
47
48 enum qop {
49 QOP_UNDEF,
50 QOP_MOV,
51 QOP_FADD,
52 QOP_FSUB,
53 QOP_FMUL,
54 QOP_MUL24,
55 QOP_FMIN,
56 QOP_FMAX,
57 QOP_FMINABS,
58 QOP_FMAXABS,
59 QOP_ADD,
60 QOP_SUB,
61 QOP_SHL,
62 QOP_SHR,
63 QOP_ASR,
64 QOP_MIN,
65 QOP_MAX,
66 QOP_AND,
67 QOP_OR,
68 QOP_XOR,
69 QOP_NOT,
70
71 /* Sets the flag register according to src. */
72 QOP_SF,
73
74 /* Note: Orderings of these compares must be the same as in
75 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
76 * otherwise 0. */
77 QOP_SEL_X_0_ZS,
78 QOP_SEL_X_0_ZC,
79 QOP_SEL_X_0_NS,
80 QOP_SEL_X_0_NC,
81 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
82 QOP_SEL_X_Y_ZS,
83 QOP_SEL_X_Y_ZC,
84 QOP_SEL_X_Y_NS,
85 QOP_SEL_X_Y_NC,
86
87 QOP_FTOI,
88 QOP_ITOF,
89 QOP_RCP,
90 QOP_RSQ,
91 QOP_EXP2,
92 QOP_LOG2,
93 QOP_VW_SETUP,
94 QOP_VR_SETUP,
95 QOP_PACK_SCALED,
96 QOP_PACK_COLORS,
97 QOP_VPM_WRITE,
98 QOP_VPM_READ,
99 QOP_TLB_DISCARD_SETUP,
100 QOP_TLB_STENCIL_SETUP,
101 QOP_TLB_Z_WRITE,
102 QOP_TLB_COLOR_WRITE,
103 QOP_TLB_COLOR_READ,
104 QOP_VARY_ADD_C,
105
106 QOP_FRAG_X,
107 QOP_FRAG_Y,
108 QOP_FRAG_Z,
109 QOP_FRAG_W,
110 QOP_FRAG_REV_FLAG,
111
112 QOP_UNPACK_8A,
113 QOP_UNPACK_8B,
114 QOP_UNPACK_8C,
115 QOP_UNPACK_8D,
116
117 /** Texture x coordinate parameter write */
118 QOP_TEX_S,
119 /** Texture y coordinate parameter write */
120 QOP_TEX_T,
121 /** Texture border color parameter or cube map z coordinate write */
122 QOP_TEX_R,
123 /** Texture LOD bias parameter write */
124 QOP_TEX_B,
125 /**
126 * Signal of texture read being necessary and then reading r4 into
127 * the destination
128 */
129 QOP_TEX_RESULT,
130 QOP_R4_UNPACK_A,
131 QOP_R4_UNPACK_B,
132 QOP_R4_UNPACK_C,
133 QOP_R4_UNPACK_D
134 };
135
136 struct simple_node {
137 struct simple_node *next;
138 struct simple_node *prev;
139 };
140
141 struct qinst {
142 struct simple_node link;
143
144 enum qop op;
145 struct qreg dst;
146 struct qreg *src;
147 };
148
149 enum qstage {
150 /**
151 * Coordinate shader, runs during binning, before the VS, and just
152 * outputs position.
153 */
154 QSTAGE_COORD,
155 QSTAGE_VERT,
156 QSTAGE_FRAG,
157 };
158
159 enum quniform_contents {
160 /**
161 * Indicates that a constant 32-bit value is copied from the program's
162 * uniform contents.
163 */
164 QUNIFORM_CONSTANT,
165 /**
166 * Indicates that the program's uniform contents are used as an index
167 * into the GL uniform storage.
168 */
169 QUNIFORM_UNIFORM,
170
171 /** @{
172 * Scaling factors from clip coordinates to relative to the viewport
173 * center.
174 *
175 * This is used by the coordinate and vertex shaders to produce the
176 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
177 * point offsets from the viewport ccenter.
178 */
179 QUNIFORM_VIEWPORT_X_SCALE,
180 QUNIFORM_VIEWPORT_Y_SCALE,
181 /** @} */
182
183 QUNIFORM_VIEWPORT_Z_OFFSET,
184 QUNIFORM_VIEWPORT_Z_SCALE,
185
186 QUNIFORM_USER_CLIP_PLANE,
187
188 /**
189 * A reference to a texture config parameter 0 uniform.
190 *
191 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
192 * defines texture type, miplevels, and such. It will be found as a
193 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
194 */
195 QUNIFORM_TEXTURE_CONFIG_P0,
196
197 /**
198 * A reference to a texture config parameter 1 uniform.
199 *
200 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
201 * defines texture width, height, filters, and wrap modes. It will be
202 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
203 * sequence.
204 */
205 QUNIFORM_TEXTURE_CONFIG_P1,
206
207 /** A reference to a texture config parameter 2 cubemap stride uniform */
208 QUNIFORM_TEXTURE_CONFIG_P2,
209
210 QUNIFORM_TEXRECT_SCALE_X,
211 QUNIFORM_TEXRECT_SCALE_Y,
212
213 QUNIFORM_TEXTURE_BORDER_COLOR,
214
215 QUNIFORM_BLEND_CONST_COLOR,
216 QUNIFORM_STENCIL,
217
218 QUNIFORM_ALPHA_REF,
219 };
220
221 struct vc4_varying_semantic {
222 uint8_t semantic;
223 uint8_t index;
224 uint8_t swizzle;
225 };
226
227 struct vc4_compile {
228 struct vc4_context *vc4;
229 struct tgsi_parse_context parser;
230 struct qreg *temps;
231 /**
232 * Inputs to the shader, arranged by TGSI declaration order.
233 *
234 * Not all fragment shader QFILE_VARY reads are present in this array.
235 */
236 struct qreg *inputs;
237 struct qreg *outputs;
238 struct qreg *consts;
239 uint32_t temps_array_size;
240 uint32_t inputs_array_size;
241 uint32_t outputs_array_size;
242 uint32_t uniforms_array_size;
243 uint32_t consts_array_size;
244 uint32_t num_consts;
245 struct qreg line_x, point_x, point_y;
246 struct qreg discard;
247
248 /**
249 * Array of the TGSI semantics of all FS QFILE_VARY reads.
250 *
251 * This includes those that aren't part of the VPM varyings, like
252 * point/line coordinates.
253 */
254 struct vc4_varying_semantic *input_semantics;
255 uint32_t num_input_semantics;
256 uint32_t input_semantics_array_size;
257
258 /**
259 * An entry per outputs[] in the VS indicating what the semantic of
260 * the output is. Used to emit from the VS in the order that the FS
261 * needs.
262 */
263 struct vc4_varying_semantic *output_semantics;
264
265 struct pipe_shader_state *shader_state;
266 struct vc4_key *key;
267 struct vc4_fs_key *fs_key;
268 struct vc4_vs_key *vs_key;
269
270 uint32_t *uniform_data;
271 enum quniform_contents *uniform_contents;
272 uint32_t uniform_array_size;
273 uint32_t num_uniforms;
274 uint32_t num_outputs;
275 uint32_t num_texture_samples;
276 uint32_t output_position_index;
277 uint32_t output_clipvertex_index;
278 uint32_t output_color_index;
279 uint32_t output_point_size_index;
280
281 struct qreg undef;
282 enum qstage stage;
283 uint32_t num_temps;
284 struct simple_node instructions;
285 uint32_t immediates[1024];
286
287 struct simple_node qpu_inst_list;
288 uint64_t *qpu_insts;
289 uint32_t qpu_inst_count;
290 uint32_t qpu_inst_size;
291 uint32_t num_inputs;
292
293 uint32_t program_id;
294 uint32_t variant_id;
295 };
296
297 struct vc4_compile *qir_compile_init(void);
298 void qir_compile_destroy(struct vc4_compile *c);
299 struct qinst *qir_inst(enum qop op, struct qreg dst,
300 struct qreg src0, struct qreg src1);
301 struct qinst *qir_inst4(enum qop op, struct qreg dst,
302 struct qreg a,
303 struct qreg b,
304 struct qreg c,
305 struct qreg d);
306 void qir_remove_instruction(struct qinst *qinst);
307 void qir_reorder_uniforms(struct vc4_compile *c);
308 void qir_emit(struct vc4_compile *c, struct qinst *inst);
309 struct qreg qir_get_temp(struct vc4_compile *c);
310 int qir_get_op_nsrc(enum qop qop);
311 bool qir_reg_equals(struct qreg a, struct qreg b);
312 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
313 bool qir_depends_on_flags(struct qinst *inst);
314 bool qir_writes_r4(struct qinst *inst);
315 bool qir_reads_r4(struct qinst *inst);
316
317 void qir_dump(struct vc4_compile *c);
318 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
319 const char *qir_get_stage_name(enum qstage stage);
320
321 void qir_optimize(struct vc4_compile *c);
322 bool qir_opt_algebraic(struct vc4_compile *c);
323 bool qir_opt_copy_propagation(struct vc4_compile *c);
324 bool qir_opt_cse(struct vc4_compile *c);
325 bool qir_opt_dead_code(struct vc4_compile *c);
326
327 #define QIR_ALU0(name) \
328 static inline struct qreg \
329 qir_##name(struct vc4_compile *c) \
330 { \
331 struct qreg t = qir_get_temp(c); \
332 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
333 return t; \
334 }
335
336 #define QIR_ALU1(name) \
337 static inline struct qreg \
338 qir_##name(struct vc4_compile *c, struct qreg a) \
339 { \
340 struct qreg t = qir_get_temp(c); \
341 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
342 return t; \
343 }
344
345 #define QIR_ALU2(name) \
346 static inline struct qreg \
347 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
348 { \
349 struct qreg t = qir_get_temp(c); \
350 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
351 return t; \
352 }
353
354 #define QIR_NODST_1(name) \
355 static inline void \
356 qir_##name(struct vc4_compile *c, struct qreg a) \
357 { \
358 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
359 }
360
361 #define QIR_NODST_2(name) \
362 static inline void \
363 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
364 { \
365 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
366 }
367
368 QIR_ALU1(MOV)
369 QIR_ALU2(FADD)
370 QIR_ALU2(FSUB)
371 QIR_ALU2(FMUL)
372 QIR_ALU2(MUL24)
373 QIR_NODST_1(SF)
374 QIR_ALU1(SEL_X_0_ZS)
375 QIR_ALU1(SEL_X_0_ZC)
376 QIR_ALU1(SEL_X_0_NS)
377 QIR_ALU1(SEL_X_0_NC)
378 QIR_ALU2(SEL_X_Y_ZS)
379 QIR_ALU2(SEL_X_Y_ZC)
380 QIR_ALU2(SEL_X_Y_NS)
381 QIR_ALU2(SEL_X_Y_NC)
382 QIR_ALU2(FMIN)
383 QIR_ALU2(FMAX)
384 QIR_ALU2(FMINABS)
385 QIR_ALU2(FMAXABS)
386 QIR_ALU1(FTOI)
387 QIR_ALU1(ITOF)
388
389 QIR_ALU2(ADD)
390 QIR_ALU2(SUB)
391 QIR_ALU2(SHL)
392 QIR_ALU2(SHR)
393 QIR_ALU2(ASR)
394 QIR_ALU2(MIN)
395 QIR_ALU2(MAX)
396 QIR_ALU2(AND)
397 QIR_ALU2(OR)
398 QIR_ALU2(XOR)
399 QIR_ALU1(NOT)
400
401 QIR_ALU1(RCP)
402 QIR_ALU1(RSQ)
403 QIR_ALU1(EXP2)
404 QIR_ALU1(LOG2)
405 QIR_ALU2(PACK_SCALED)
406 QIR_ALU1(VARY_ADD_C)
407 QIR_NODST_1(VPM_WRITE)
408 QIR_NODST_2(TEX_S)
409 QIR_NODST_2(TEX_T)
410 QIR_NODST_2(TEX_R)
411 QIR_NODST_2(TEX_B)
412 QIR_ALU0(FRAG_X)
413 QIR_ALU0(FRAG_Y)
414 QIR_ALU0(FRAG_Z)
415 QIR_ALU0(FRAG_W)
416 QIR_ALU0(FRAG_REV_FLAG)
417 QIR_ALU0(TEX_RESULT)
418 QIR_ALU0(TLB_COLOR_READ)
419 QIR_NODST_1(TLB_Z_WRITE)
420 QIR_NODST_1(TLB_DISCARD_SETUP)
421 QIR_NODST_1(TLB_STENCIL_SETUP)
422
423 static inline struct qreg
424 qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
425 {
426 struct qreg t = qir_get_temp(c);
427 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
428 return t;
429 }
430
431 static inline struct qreg
432 qir_SEL_X_0_COND(struct vc4_compile *c, int i)
433 {
434 struct qreg t = qir_get_temp(c);
435 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
436 return t;
437 }
438
439 static inline struct qreg
440 qir_UNPACK_8(struct vc4_compile *c, struct qreg src, int i)
441 {
442 struct qreg t = qir_get_temp(c);
443 qir_emit(c, qir_inst(QOP_UNPACK_8A + i, t, src, c->undef));
444 return t;
445 }
446
447 static inline struct qreg
448 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
449 {
450 return qir_EXP2(c, qir_FMUL(c,
451 y,
452 qir_LOG2(c, x)));
453 }
454
455 #endif /* VC4_QIR_H */