2 * Copyright © 2014 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
33 #include "util/u_simple_list.h"
34 #include "tgsi/tgsi_parse.h"
71 /* Sets the flag register according to src. */
74 /* Note: Orderings of these compares must be the same as in
75 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
81 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
99 QOP_TLB_DISCARD_SETUP
,
100 QOP_TLB_STENCIL_SETUP
,
117 /** Texture x coordinate parameter write */
119 /** Texture y coordinate parameter write */
121 /** Texture border color parameter or cube map z coordinate write */
123 /** Texture LOD bias parameter write */
127 * Texture-unit 4-byte read with address provided direct in S
130 * The first operand is the offset from the start of the UBO, and the
131 * second is the uniform that has the UBO's base pointer.
136 * Signal of texture read being necessary and then reading r4 into
147 struct simple_node
*next
;
148 struct simple_node
*prev
;
151 struct queued_qpu_inst
{
152 struct simple_node link
;
157 struct simple_node link
;
166 * Coordinate shader, runs during binning, before the VS, and just
174 enum quniform_contents
{
176 * Indicates that a constant 32-bit value is copied from the program's
181 * Indicates that the program's uniform contents are used as an index
182 * into the GL uniform storage.
187 * Scaling factors from clip coordinates to relative to the viewport
190 * This is used by the coordinate and vertex shaders to produce the
191 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
192 * point offsets from the viewport ccenter.
194 QUNIFORM_VIEWPORT_X_SCALE
,
195 QUNIFORM_VIEWPORT_Y_SCALE
,
198 QUNIFORM_VIEWPORT_Z_OFFSET
,
199 QUNIFORM_VIEWPORT_Z_SCALE
,
201 QUNIFORM_USER_CLIP_PLANE
,
204 * A reference to a texture config parameter 0 uniform.
206 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
207 * defines texture type, miplevels, and such. It will be found as a
208 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
210 QUNIFORM_TEXTURE_CONFIG_P0
,
213 * A reference to a texture config parameter 1 uniform.
215 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
216 * defines texture width, height, filters, and wrap modes. It will be
217 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
220 QUNIFORM_TEXTURE_CONFIG_P1
,
222 /** A reference to a texture config parameter 2 cubemap stride uniform */
223 QUNIFORM_TEXTURE_CONFIG_P2
,
227 QUNIFORM_TEXRECT_SCALE_X
,
228 QUNIFORM_TEXRECT_SCALE_Y
,
230 QUNIFORM_TEXTURE_BORDER_COLOR
,
232 QUNIFORM_BLEND_CONST_COLOR
,
238 struct vc4_varying_semantic
{
244 struct vc4_compiler_ubo_range
{
246 * offset in bytes from the start of the ubo where this range is
249 * Only set once used is set.
254 * offset in bytes from the start of the gallium uniforms where the
259 /** size in bytes of this ubo range */
263 * Set if this range is used by the shader for indirect uniforms
270 struct vc4_context
*vc4
;
271 struct tgsi_parse_context parser
;
274 * Inputs to the shader, arranged by TGSI declaration order.
276 * Not all fragment shader QFILE_VARY reads are present in this array.
279 struct qreg
*outputs
;
281 struct qreg addr
[4]; /* TGSI ARL destination. */
282 uint32_t temps_array_size
;
283 uint32_t inputs_array_size
;
284 uint32_t outputs_array_size
;
285 uint32_t uniforms_array_size
;
286 uint32_t consts_array_size
;
289 struct vc4_compiler_ubo_range
*ubo_ranges
;
290 uint32_t ubo_ranges_array_size
;
291 uint32_t num_ubo_ranges
;
292 uint32_t next_ubo_dst_offset
;
294 struct qreg line_x
, point_x
, point_y
;
298 * Array of the TGSI semantics of all FS QFILE_VARY reads.
300 * This includes those that aren't part of the VPM varyings, like
301 * point/line coordinates.
303 struct vc4_varying_semantic
*input_semantics
;
304 uint32_t num_input_semantics
;
305 uint32_t input_semantics_array_size
;
308 * An entry per outputs[] in the VS indicating what the semantic of
309 * the output is. Used to emit from the VS in the order that the FS
312 struct vc4_varying_semantic
*output_semantics
;
314 struct pipe_shader_state
*shader_state
;
316 struct vc4_fs_key
*fs_key
;
317 struct vc4_vs_key
*vs_key
;
319 uint32_t *uniform_data
;
320 enum quniform_contents
*uniform_contents
;
321 uint32_t uniform_array_size
;
322 uint32_t num_uniforms
;
323 uint32_t num_outputs
;
324 uint32_t num_texture_samples
;
325 uint32_t output_position_index
;
326 uint32_t output_clipvertex_index
;
327 uint32_t output_color_index
;
328 uint32_t output_point_size_index
;
333 struct simple_node instructions
;
334 uint32_t immediates
[1024];
336 struct simple_node qpu_inst_list
;
338 uint32_t qpu_inst_count
;
339 uint32_t qpu_inst_size
;
346 struct vc4_compile
*qir_compile_init(void);
347 void qir_compile_destroy(struct vc4_compile
*c
);
348 struct qinst
*qir_inst(enum qop op
, struct qreg dst
,
349 struct qreg src0
, struct qreg src1
);
350 struct qinst
*qir_inst4(enum qop op
, struct qreg dst
,
355 void qir_remove_instruction(struct qinst
*qinst
);
356 void qir_reorder_uniforms(struct vc4_compile
*c
);
357 void qir_emit(struct vc4_compile
*c
, struct qinst
*inst
);
358 struct qreg
qir_get_temp(struct vc4_compile
*c
);
359 int qir_get_op_nsrc(enum qop qop
);
360 bool qir_reg_equals(struct qreg a
, struct qreg b
);
361 bool qir_has_side_effects(struct vc4_compile
*c
, struct qinst
*inst
);
362 bool qir_depends_on_flags(struct qinst
*inst
);
363 bool qir_writes_r4(struct qinst
*inst
);
364 bool qir_reads_r4(struct qinst
*inst
);
366 void qir_dump(struct vc4_compile
*c
);
367 void qir_dump_inst(struct vc4_compile
*c
, struct qinst
*inst
);
368 const char *qir_get_stage_name(enum qstage stage
);
370 void qir_optimize(struct vc4_compile
*c
);
371 bool qir_opt_algebraic(struct vc4_compile
*c
);
372 bool qir_opt_copy_propagation(struct vc4_compile
*c
);
373 bool qir_opt_cse(struct vc4_compile
*c
);
374 bool qir_opt_dead_code(struct vc4_compile
*c
);
376 void qpu_schedule_instructions(struct vc4_compile
*c
);
378 #define QIR_ALU0(name) \
379 static inline struct qreg \
380 qir_##name(struct vc4_compile *c) \
382 struct qreg t = qir_get_temp(c); \
383 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
387 #define QIR_ALU1(name) \
388 static inline struct qreg \
389 qir_##name(struct vc4_compile *c, struct qreg a) \
391 struct qreg t = qir_get_temp(c); \
392 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
396 #define QIR_ALU2(name) \
397 static inline struct qreg \
398 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
400 struct qreg t = qir_get_temp(c); \
401 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
405 #define QIR_NODST_1(name) \
407 qir_##name(struct vc4_compile *c, struct qreg a) \
409 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
412 #define QIR_NODST_2(name) \
414 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
416 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
456 QIR_ALU2(PACK_SCALED
)
458 QIR_NODST_1(VPM_WRITE
)
463 QIR_NODST_2(TEX_DIRECT
)
468 QIR_ALU0(FRAG_REV_FLAG
)
470 QIR_ALU0(TLB_COLOR_READ
)
471 QIR_NODST_1(TLB_Z_WRITE
)
472 QIR_NODST_1(TLB_DISCARD_SETUP
)
473 QIR_NODST_1(TLB_STENCIL_SETUP
)
475 static inline struct qreg
476 qir_R4_UNPACK(struct vc4_compile
*c
, struct qreg r4
, int i
)
478 struct qreg t
= qir_get_temp(c
);
479 qir_emit(c
, qir_inst(QOP_R4_UNPACK_A
+ i
, t
, r4
, c
->undef
));
483 static inline struct qreg
484 qir_SEL_X_0_COND(struct vc4_compile
*c
, int i
)
486 struct qreg t
= qir_get_temp(c
);
487 qir_emit(c
, qir_inst(QOP_R4_UNPACK_A
+ i
, t
, c
->undef
, c
->undef
));
491 static inline struct qreg
492 qir_UNPACK_8(struct vc4_compile
*c
, struct qreg src
, int i
)
494 struct qreg t
= qir_get_temp(c
);
495 qir_emit(c
, qir_inst(QOP_UNPACK_8A
+ i
, t
, src
, c
->undef
));
499 static inline struct qreg
500 qir_POW(struct vc4_compile
*c
, struct qreg x
, struct qreg y
)
502 return qir_EXP2(c
, qir_FMUL(c
,
507 #endif /* VC4_QIR_H */