vc4: Switch to using native integers.
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdbool.h>
30 #include <stdint.h>
31
32 #include "util/u_simple_list.h"
33
34 enum qfile {
35 QFILE_NULL,
36 QFILE_TEMP,
37 QFILE_VARY,
38 QFILE_UNIF,
39 };
40
41 struct qreg {
42 enum qfile file;
43 uint32_t index;
44 };
45
46 enum qop {
47 QOP_UNDEF,
48 QOP_MOV,
49 QOP_FADD,
50 QOP_FSUB,
51 QOP_FMUL,
52 QOP_MUL24,
53 QOP_FMIN,
54 QOP_FMAX,
55 QOP_FMINABS,
56 QOP_FMAXABS,
57 QOP_ADD,
58 QOP_SUB,
59 QOP_SHL,
60 QOP_SHR,
61 QOP_ASR,
62 QOP_MIN,
63 QOP_MAX,
64 QOP_AND,
65 QOP_OR,
66 QOP_XOR,
67 QOP_NOT,
68
69 /* Sets the flag register according to src. */
70 QOP_SF,
71
72 /* Note: Orderings of these compares must be the same as in
73 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
74 * otherwise 0. */
75 QOP_SEL_X_0_ZS,
76 QOP_SEL_X_0_ZC,
77 QOP_SEL_X_0_NS,
78 QOP_SEL_X_0_NC,
79 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
80 QOP_SEL_X_Y_ZS,
81 QOP_SEL_X_Y_ZC,
82 QOP_SEL_X_Y_NS,
83 QOP_SEL_X_Y_NC,
84
85 QOP_FTOI,
86 QOP_ITOF,
87 QOP_RCP,
88 QOP_RSQ,
89 QOP_EXP2,
90 QOP_LOG2,
91 QOP_VW_SETUP,
92 QOP_VR_SETUP,
93 QOP_PACK_SCALED,
94 QOP_PACK_COLORS,
95 QOP_VPM_WRITE,
96 QOP_VPM_READ,
97 QOP_TLB_DISCARD_SETUP,
98 QOP_TLB_PASSTHROUGH_Z_WRITE,
99 QOP_TLB_COLOR_WRITE,
100 QOP_TLB_COLOR_READ,
101 QOP_VARY_ADD_C,
102
103 QOP_FRAG_X,
104 QOP_FRAG_Y,
105 QOP_FRAG_Z,
106 QOP_FRAG_RCP_W,
107
108 /** Texture x coordinate parameter write */
109 QOP_TEX_S,
110 /** Texture y coordinate parameter write */
111 QOP_TEX_T,
112 /** Texture border color parameter or cube map z coordinate write */
113 QOP_TEX_R,
114 /** Texture LOD bias parameter write */
115 QOP_TEX_B,
116 /**
117 * Signal of texture read being necessary and then reading r4 into
118 * the destination
119 */
120 QOP_TEX_RESULT,
121 QOP_R4_UNPACK_A,
122 QOP_R4_UNPACK_B,
123 QOP_R4_UNPACK_C,
124 QOP_R4_UNPACK_D
125 };
126
127 struct simple_node {
128 struct simple_node *next;
129 struct simple_node *prev;
130 };
131
132 struct qinst {
133 struct simple_node link;
134
135 enum qop op;
136 struct qreg dst;
137 struct qreg *src;
138 };
139
140 enum qstage {
141 /**
142 * Coordinate shader, runs during binning, before the VS, and just
143 * outputs position.
144 */
145 QSTAGE_COORD,
146 QSTAGE_VERT,
147 QSTAGE_FRAG,
148 };
149
150 enum quniform_contents {
151 /**
152 * Indicates that a constant 32-bit value is copied from the program's
153 * uniform contents.
154 */
155 QUNIFORM_CONSTANT,
156 /**
157 * Indicates that the program's uniform contents are used as an index
158 * into the GL uniform storage.
159 */
160 QUNIFORM_UNIFORM,
161
162 /** @{
163 * Scaling factors from clip coordinates to relative to the viewport
164 * center.
165 *
166 * This is used by the coordinate and vertex shaders to produce the
167 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
168 * point offsets from the viewport ccenter.
169 */
170 QUNIFORM_VIEWPORT_X_SCALE,
171 QUNIFORM_VIEWPORT_Y_SCALE,
172 /** @} */
173
174 QUNIFORM_VIEWPORT_Z_OFFSET,
175 QUNIFORM_VIEWPORT_Z_SCALE,
176
177 /**
178 * A reference to a texture config parameter 0 uniform.
179 *
180 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
181 * defines texture type, miplevels, and such. It will be found as a
182 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
183 */
184 QUNIFORM_TEXTURE_CONFIG_P0,
185
186 /**
187 * A reference to a texture config parameter 1 uniform.
188 *
189 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
190 * defines texture width, height, filters, and wrap modes. It will be
191 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
192 * sequence.
193 */
194 QUNIFORM_TEXTURE_CONFIG_P1,
195
196 QUNIFORM_TEXRECT_SCALE_X,
197 QUNIFORM_TEXRECT_SCALE_Y,
198
199 QUNIFORM_BLEND_CONST_COLOR,
200 };
201
202 struct qcompile {
203 struct qreg undef;
204 enum qstage stage;
205 uint32_t num_temps;
206 struct simple_node instructions;
207 uint32_t immediates[1024];
208
209 struct simple_node qpu_inst_list;
210 uint64_t *qpu_insts;
211 uint32_t qpu_inst_count;
212 uint32_t qpu_inst_size;
213 uint32_t num_inputs;
214 };
215
216 struct qcompile *qir_compile_init(void);
217 void qir_compile_destroy(struct qcompile *c);
218 struct qinst *qir_inst(enum qop op, struct qreg dst,
219 struct qreg src0, struct qreg src1);
220 struct qinst *qir_inst4(enum qop op, struct qreg dst,
221 struct qreg a,
222 struct qreg b,
223 struct qreg c,
224 struct qreg d);
225 void qir_emit(struct qcompile *c, struct qinst *inst);
226 struct qreg qir_get_temp(struct qcompile *c);
227 int qir_get_op_nsrc(enum qop qop);
228 bool qir_reg_equals(struct qreg a, struct qreg b);
229 bool qir_has_side_effects(struct qinst *inst);
230
231 void qir_dump(struct qcompile *c);
232 void qir_dump_inst(struct qinst *inst);
233 const char *qir_get_stage_name(enum qstage stage);
234
235 void qir_optimize(struct qcompile *c);
236 bool qir_opt_algebraic(struct qcompile *c);
237 bool qir_opt_copy_propagation(struct qcompile *c);
238 bool qir_opt_dead_code(struct qcompile *c);
239
240 #define QIR_ALU0(name) \
241 static inline struct qreg \
242 qir_##name(struct qcompile *c) \
243 { \
244 struct qreg t = qir_get_temp(c); \
245 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
246 return t; \
247 }
248
249 #define QIR_ALU1(name) \
250 static inline struct qreg \
251 qir_##name(struct qcompile *c, struct qreg a) \
252 { \
253 struct qreg t = qir_get_temp(c); \
254 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
255 return t; \
256 }
257
258 #define QIR_ALU2(name) \
259 static inline struct qreg \
260 qir_##name(struct qcompile *c, struct qreg a, struct qreg b) \
261 { \
262 struct qreg t = qir_get_temp(c); \
263 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
264 return t; \
265 }
266
267 #define QIR_NODST_1(name) \
268 static inline void \
269 qir_##name(struct qcompile *c, struct qreg a) \
270 { \
271 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
272 }
273
274 #define QIR_NODST_2(name) \
275 static inline void \
276 qir_##name(struct qcompile *c, struct qreg a, struct qreg b) \
277 { \
278 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
279 }
280
281 QIR_ALU1(MOV)
282 QIR_ALU2(FADD)
283 QIR_ALU2(FSUB)
284 QIR_ALU2(FMUL)
285 QIR_ALU2(MUL24)
286 QIR_NODST_1(SF)
287 QIR_ALU1(SEL_X_0_ZS)
288 QIR_ALU1(SEL_X_0_ZC)
289 QIR_ALU1(SEL_X_0_NS)
290 QIR_ALU1(SEL_X_0_NC)
291 QIR_ALU2(SEL_X_Y_ZS)
292 QIR_ALU2(SEL_X_Y_ZC)
293 QIR_ALU2(SEL_X_Y_NS)
294 QIR_ALU2(SEL_X_Y_NC)
295 QIR_ALU2(FMIN)
296 QIR_ALU2(FMAX)
297 QIR_ALU2(FMINABS)
298 QIR_ALU2(FMAXABS)
299 QIR_ALU1(FTOI)
300 QIR_ALU1(ITOF)
301
302 QIR_ALU2(ADD)
303 QIR_ALU2(SUB)
304 QIR_ALU2(SHL)
305 QIR_ALU2(SHR)
306 QIR_ALU2(ASR)
307 QIR_ALU2(MIN)
308 QIR_ALU2(MAX)
309 QIR_ALU2(AND)
310 QIR_ALU2(OR)
311 QIR_ALU2(XOR)
312 QIR_ALU1(NOT)
313
314 QIR_ALU1(RCP)
315 QIR_ALU1(RSQ)
316 QIR_ALU1(EXP2)
317 QIR_ALU1(LOG2)
318 QIR_ALU2(PACK_SCALED)
319 QIR_ALU1(VARY_ADD_C)
320 QIR_NODST_1(VPM_WRITE)
321 QIR_NODST_2(TEX_S)
322 QIR_NODST_2(TEX_T)
323 QIR_NODST_2(TEX_R)
324 QIR_NODST_2(TEX_B)
325 QIR_ALU0(FRAG_X)
326 QIR_ALU0(FRAG_Y)
327 QIR_ALU0(FRAG_Z)
328 QIR_ALU0(FRAG_RCP_W)
329 QIR_NODST_1(TLB_DISCARD_SETUP)
330
331 static inline struct qreg
332 qir_R4_UNPACK(struct qcompile *c, int i)
333 {
334 struct qreg t = qir_get_temp(c);
335 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
336 return t;
337 }
338
339 static inline struct qreg
340 qir_SEL_X_0_COND(struct qcompile *c, int i)
341 {
342 struct qreg t = qir_get_temp(c);
343 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
344 return t;
345 }
346
347 #endif /* VC4_QIR_H */