307a79f77c679d89a911c7a0022c5d419359f200
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdbool.h>
30 #include <stdint.h>
31 #include <string.h>
32
33 #include "util/macros.h"
34 #include "util/u_simple_list.h"
35 #include "tgsi/tgsi_parse.h"
36
37 enum qfile {
38 QFILE_NULL,
39 QFILE_TEMP,
40 QFILE_VARY,
41 QFILE_UNIF,
42 QFILE_VPM,
43
44 /**
45 * Stores an immediate value in the index field that can be turned
46 * into a small immediate field by qpu_encode_small_immediate().
47 */
48 QFILE_SMALL_IMM,
49 };
50
51 struct qreg {
52 enum qfile file;
53 uint32_t index;
54 };
55
56 enum qop {
57 QOP_UNDEF,
58 QOP_MOV,
59 QOP_FADD,
60 QOP_FSUB,
61 QOP_FMUL,
62 QOP_MUL24,
63 QOP_FMIN,
64 QOP_FMAX,
65 QOP_FMINABS,
66 QOP_FMAXABS,
67 QOP_ADD,
68 QOP_SUB,
69 QOP_SHL,
70 QOP_SHR,
71 QOP_ASR,
72 QOP_MIN,
73 QOP_MAX,
74 QOP_AND,
75 QOP_OR,
76 QOP_XOR,
77 QOP_NOT,
78
79 /* Sets the flag register according to src. */
80 QOP_SF,
81
82 /* Note: Orderings of these compares must be the same as in
83 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
84 * otherwise 0. */
85 QOP_SEL_X_0_ZS,
86 QOP_SEL_X_0_ZC,
87 QOP_SEL_X_0_NS,
88 QOP_SEL_X_0_NC,
89 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
90 QOP_SEL_X_Y_ZS,
91 QOP_SEL_X_Y_ZC,
92 QOP_SEL_X_Y_NS,
93 QOP_SEL_X_Y_NC,
94
95 QOP_FTOI,
96 QOP_ITOF,
97 QOP_RCP,
98 QOP_RSQ,
99 QOP_EXP2,
100 QOP_LOG2,
101 QOP_VW_SETUP,
102 QOP_VR_SETUP,
103 QOP_PACK_SCALED,
104 QOP_PACK_8888_F,
105 QOP_PACK_8A_F,
106 QOP_PACK_8B_F,
107 QOP_PACK_8C_F,
108 QOP_PACK_8D_F,
109 QOP_TLB_DISCARD_SETUP,
110 QOP_TLB_STENCIL_SETUP,
111 QOP_TLB_Z_WRITE,
112 QOP_TLB_COLOR_WRITE,
113 QOP_TLB_COLOR_READ,
114 QOP_VARY_ADD_C,
115
116 QOP_FRAG_X,
117 QOP_FRAG_Y,
118 QOP_FRAG_Z,
119 QOP_FRAG_W,
120 QOP_FRAG_REV_FLAG,
121
122 QOP_UNPACK_8A_F,
123 QOP_UNPACK_8B_F,
124 QOP_UNPACK_8C_F,
125 QOP_UNPACK_8D_F,
126 QOP_UNPACK_16A_F,
127 QOP_UNPACK_16B_F,
128
129 QOP_UNPACK_8A_I,
130 QOP_UNPACK_8B_I,
131 QOP_UNPACK_8C_I,
132 QOP_UNPACK_8D_I,
133 QOP_UNPACK_16A_I,
134 QOP_UNPACK_16B_I,
135
136 /** Texture x coordinate parameter write */
137 QOP_TEX_S,
138 /** Texture y coordinate parameter write */
139 QOP_TEX_T,
140 /** Texture border color parameter or cube map z coordinate write */
141 QOP_TEX_R,
142 /** Texture LOD bias parameter write */
143 QOP_TEX_B,
144
145 /**
146 * Texture-unit 4-byte read with address provided direct in S
147 * cooordinate.
148 *
149 * The first operand is the offset from the start of the UBO, and the
150 * second is the uniform that has the UBO's base pointer.
151 */
152 QOP_TEX_DIRECT,
153
154 /**
155 * Signal of texture read being necessary and then reading r4 into
156 * the destination
157 */
158 QOP_TEX_RESULT,
159 QOP_R4_UNPACK_A,
160 QOP_R4_UNPACK_B,
161 QOP_R4_UNPACK_C,
162 QOP_R4_UNPACK_D
163 };
164
165 struct simple_node {
166 struct simple_node *next;
167 struct simple_node *prev;
168 };
169
170 struct queued_qpu_inst {
171 struct simple_node link;
172 uint64_t inst;
173 };
174
175 struct qinst {
176 struct simple_node link;
177
178 enum qop op;
179 struct qreg dst;
180 struct qreg *src;
181 };
182
183 enum qstage {
184 /**
185 * Coordinate shader, runs during binning, before the VS, and just
186 * outputs position.
187 */
188 QSTAGE_COORD,
189 QSTAGE_VERT,
190 QSTAGE_FRAG,
191 };
192
193 enum quniform_contents {
194 /**
195 * Indicates that a constant 32-bit value is copied from the program's
196 * uniform contents.
197 */
198 QUNIFORM_CONSTANT,
199 /**
200 * Indicates that the program's uniform contents are used as an index
201 * into the GL uniform storage.
202 */
203 QUNIFORM_UNIFORM,
204
205 /** @{
206 * Scaling factors from clip coordinates to relative to the viewport
207 * center.
208 *
209 * This is used by the coordinate and vertex shaders to produce the
210 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
211 * point offsets from the viewport ccenter.
212 */
213 QUNIFORM_VIEWPORT_X_SCALE,
214 QUNIFORM_VIEWPORT_Y_SCALE,
215 /** @} */
216
217 QUNIFORM_VIEWPORT_Z_OFFSET,
218 QUNIFORM_VIEWPORT_Z_SCALE,
219
220 QUNIFORM_USER_CLIP_PLANE,
221
222 /**
223 * A reference to a texture config parameter 0 uniform.
224 *
225 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
226 * defines texture type, miplevels, and such. It will be found as a
227 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
228 */
229 QUNIFORM_TEXTURE_CONFIG_P0,
230
231 /**
232 * A reference to a texture config parameter 1 uniform.
233 *
234 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
235 * defines texture width, height, filters, and wrap modes. It will be
236 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
237 * sequence.
238 */
239 QUNIFORM_TEXTURE_CONFIG_P1,
240
241 /** A reference to a texture config parameter 2 cubemap stride uniform */
242 QUNIFORM_TEXTURE_CONFIG_P2,
243
244 QUNIFORM_UBO_ADDR,
245
246 QUNIFORM_TEXRECT_SCALE_X,
247 QUNIFORM_TEXRECT_SCALE_Y,
248
249 QUNIFORM_TEXTURE_BORDER_COLOR,
250
251 QUNIFORM_BLEND_CONST_COLOR,
252 QUNIFORM_STENCIL,
253
254 QUNIFORM_ALPHA_REF,
255 };
256
257 struct vc4_varying_semantic {
258 uint8_t semantic;
259 uint8_t index;
260 uint8_t swizzle;
261 };
262
263 struct vc4_compiler_ubo_range {
264 /**
265 * offset in bytes from the start of the ubo where this range is
266 * uploaded.
267 *
268 * Only set once used is set.
269 */
270 uint32_t dst_offset;
271
272 /**
273 * offset in bytes from the start of the gallium uniforms where the
274 * data comes from.
275 */
276 uint32_t src_offset;
277
278 /** size in bytes of this ubo range */
279 uint32_t size;
280
281 /**
282 * Set if this range is used by the shader for indirect uniforms
283 * access.
284 */
285 bool used;
286 };
287
288 struct vc4_compile {
289 struct vc4_context *vc4;
290 struct tgsi_parse_context parser;
291 struct qreg *temps;
292 /**
293 * Inputs to the shader, arranged by TGSI declaration order.
294 *
295 * Not all fragment shader QFILE_VARY reads are present in this array.
296 */
297 struct qreg *inputs;
298 struct qreg *outputs;
299 struct qreg *consts;
300 struct qreg addr[4]; /* TGSI ARL destination. */
301 uint32_t temps_array_size;
302 uint32_t inputs_array_size;
303 uint32_t outputs_array_size;
304 uint32_t uniforms_array_size;
305 uint32_t consts_array_size;
306 uint32_t num_consts;
307
308 struct vc4_compiler_ubo_range *ubo_ranges;
309 uint32_t ubo_ranges_array_size;
310 uint32_t num_ubo_ranges;
311 uint32_t next_ubo_dst_offset;
312
313 struct qreg line_x, point_x, point_y;
314 struct qreg discard;
315
316 uint8_t vattr_sizes[8];
317
318 /**
319 * Array of the TGSI semantics of all FS QFILE_VARY reads.
320 *
321 * This includes those that aren't part of the VPM varyings, like
322 * point/line coordinates.
323 */
324 struct vc4_varying_semantic *input_semantics;
325 uint32_t num_input_semantics;
326 uint32_t input_semantics_array_size;
327
328 /**
329 * An entry per outputs[] in the VS indicating what the semantic of
330 * the output is. Used to emit from the VS in the order that the FS
331 * needs.
332 */
333 struct vc4_varying_semantic *output_semantics;
334
335 struct pipe_shader_state *shader_state;
336 struct vc4_key *key;
337 struct vc4_fs_key *fs_key;
338 struct vc4_vs_key *vs_key;
339
340 uint32_t *uniform_data;
341 enum quniform_contents *uniform_contents;
342 uint32_t uniform_array_size;
343 uint32_t num_uniforms;
344 uint32_t num_outputs;
345 uint32_t num_texture_samples;
346 uint32_t output_position_index;
347 uint32_t output_clipvertex_index;
348 uint32_t output_color_index;
349 uint32_t output_point_size_index;
350
351 struct qreg undef;
352 enum qstage stage;
353 uint32_t num_temps;
354 struct simple_node instructions;
355 uint32_t immediates[1024];
356
357 struct simple_node qpu_inst_list;
358 uint64_t *qpu_insts;
359 uint32_t qpu_inst_count;
360 uint32_t qpu_inst_size;
361 uint32_t num_inputs;
362
363 uint32_t program_id;
364 uint32_t variant_id;
365 };
366
367 struct vc4_compile *qir_compile_init(void);
368 void qir_compile_destroy(struct vc4_compile *c);
369 struct qinst *qir_inst(enum qop op, struct qreg dst,
370 struct qreg src0, struct qreg src1);
371 struct qinst *qir_inst4(enum qop op, struct qreg dst,
372 struct qreg a,
373 struct qreg b,
374 struct qreg c,
375 struct qreg d);
376 void qir_remove_instruction(struct qinst *qinst);
377 void qir_reorder_uniforms(struct vc4_compile *c);
378 void qir_emit(struct vc4_compile *c, struct qinst *inst);
379 struct qreg qir_get_temp(struct vc4_compile *c);
380 int qir_get_op_nsrc(enum qop qop);
381 bool qir_reg_equals(struct qreg a, struct qreg b);
382 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
383 bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst);
384 bool qir_is_multi_instruction(struct qinst *inst);
385 bool qir_depends_on_flags(struct qinst *inst);
386 bool qir_writes_r4(struct qinst *inst);
387 bool qir_reads_r4(struct qinst *inst);
388 struct qreg qir_follow_movs(struct qinst **defs, struct qreg reg);
389
390 void qir_dump(struct vc4_compile *c);
391 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
392 const char *qir_get_stage_name(enum qstage stage);
393
394 void qir_optimize(struct vc4_compile *c);
395 bool qir_opt_algebraic(struct vc4_compile *c);
396 bool qir_opt_copy_propagation(struct vc4_compile *c);
397 bool qir_opt_cse(struct vc4_compile *c);
398 bool qir_opt_dead_code(struct vc4_compile *c);
399 bool qir_opt_small_immediates(struct vc4_compile *c);
400 bool qir_opt_vpm_writes(struct vc4_compile *c);
401
402 void qpu_schedule_instructions(struct vc4_compile *c);
403
404 #define QIR_ALU0(name) \
405 static inline struct qreg \
406 qir_##name(struct vc4_compile *c) \
407 { \
408 struct qreg t = qir_get_temp(c); \
409 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
410 return t; \
411 }
412
413 #define QIR_ALU1(name) \
414 static inline struct qreg \
415 qir_##name(struct vc4_compile *c, struct qreg a) \
416 { \
417 struct qreg t = qir_get_temp(c); \
418 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
419 return t; \
420 }
421
422 #define QIR_ALU2(name) \
423 static inline struct qreg \
424 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
425 { \
426 struct qreg t = qir_get_temp(c); \
427 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
428 return t; \
429 }
430
431 #define QIR_NODST_1(name) \
432 static inline void \
433 qir_##name(struct vc4_compile *c, struct qreg a) \
434 { \
435 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
436 }
437
438 #define QIR_NODST_2(name) \
439 static inline void \
440 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
441 { \
442 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
443 }
444
445 QIR_ALU1(MOV)
446 QIR_ALU2(FADD)
447 QIR_ALU2(FSUB)
448 QIR_ALU2(FMUL)
449 QIR_ALU2(MUL24)
450 QIR_NODST_1(SF)
451 QIR_ALU1(SEL_X_0_ZS)
452 QIR_ALU1(SEL_X_0_ZC)
453 QIR_ALU1(SEL_X_0_NS)
454 QIR_ALU1(SEL_X_0_NC)
455 QIR_ALU2(SEL_X_Y_ZS)
456 QIR_ALU2(SEL_X_Y_ZC)
457 QIR_ALU2(SEL_X_Y_NS)
458 QIR_ALU2(SEL_X_Y_NC)
459 QIR_ALU2(FMIN)
460 QIR_ALU2(FMAX)
461 QIR_ALU2(FMINABS)
462 QIR_ALU2(FMAXABS)
463 QIR_ALU1(FTOI)
464 QIR_ALU1(ITOF)
465
466 QIR_ALU2(ADD)
467 QIR_ALU2(SUB)
468 QIR_ALU2(SHL)
469 QIR_ALU2(SHR)
470 QIR_ALU2(ASR)
471 QIR_ALU2(MIN)
472 QIR_ALU2(MAX)
473 QIR_ALU2(AND)
474 QIR_ALU2(OR)
475 QIR_ALU2(XOR)
476 QIR_ALU1(NOT)
477
478 QIR_ALU1(RCP)
479 QIR_ALU1(RSQ)
480 QIR_ALU1(EXP2)
481 QIR_ALU1(LOG2)
482 QIR_ALU2(PACK_SCALED)
483 QIR_ALU1(PACK_8888_F)
484 QIR_ALU2(PACK_8A_F)
485 QIR_ALU2(PACK_8B_F)
486 QIR_ALU2(PACK_8C_F)
487 QIR_ALU2(PACK_8D_F)
488 QIR_ALU1(VARY_ADD_C)
489 QIR_NODST_2(TEX_S)
490 QIR_NODST_2(TEX_T)
491 QIR_NODST_2(TEX_R)
492 QIR_NODST_2(TEX_B)
493 QIR_NODST_2(TEX_DIRECT)
494 QIR_ALU0(FRAG_X)
495 QIR_ALU0(FRAG_Y)
496 QIR_ALU0(FRAG_Z)
497 QIR_ALU0(FRAG_W)
498 QIR_ALU0(FRAG_REV_FLAG)
499 QIR_ALU0(TEX_RESULT)
500 QIR_ALU0(TLB_COLOR_READ)
501 QIR_NODST_1(TLB_Z_WRITE)
502 QIR_NODST_1(TLB_DISCARD_SETUP)
503 QIR_NODST_1(TLB_STENCIL_SETUP)
504
505 static inline struct qreg
506 qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
507 {
508 struct qreg t = qir_get_temp(c);
509 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
510 return t;
511 }
512
513 static inline struct qreg
514 qir_SEL_X_0_COND(struct vc4_compile *c, int i)
515 {
516 struct qreg t = qir_get_temp(c);
517 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
518 return t;
519 }
520
521 static inline struct qreg
522 qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
523 {
524 struct qreg t = qir_get_temp(c);
525 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef));
526 return t;
527 }
528
529 static inline struct qreg
530 qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
531 {
532 struct qreg t = qir_get_temp(c);
533 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef));
534 return t;
535 }
536
537 static inline struct qreg
538 qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
539 {
540 struct qreg t = qir_get_temp(c);
541 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef));
542 return t;
543 }
544
545 static inline struct qreg
546 qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
547 {
548 struct qreg t = qir_get_temp(c);
549 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef));
550 return t;
551 }
552
553 static inline struct qreg
554 qir_PACK_8_F(struct vc4_compile *c, struct qreg rest, struct qreg val, int chan)
555 {
556 struct qreg t = qir_get_temp(c);
557 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, t, rest, val));
558 return t;
559 }
560
561 static inline struct qreg
562 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
563 {
564 return qir_EXP2(c, qir_FMUL(c,
565 y,
566 qir_LOG2(c, x)));
567 }
568
569 static inline void
570 qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
571 {
572 static const struct qreg vpm = { QFILE_VPM, 0 };
573 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
574 }
575
576 #endif /* VC4_QIR_H */