5e23420f8e502ddc46f2509d0c06d6910733f559
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <assert.h>
28 #include <stdio.h>
29 #include <stdlib.h>
30 #include <stdbool.h>
31 #include <stdint.h>
32 #include <string.h>
33
34 #include "util/macros.h"
35 #include "glsl/nir/nir.h"
36 #include "util/list.h"
37 #include "util/u_math.h"
38
39 #include "vc4_screen.h"
40 #include "pipe/p_state.h"
41
42 struct nir_builder;
43
44 enum qfile {
45 QFILE_NULL,
46 QFILE_TEMP,
47 QFILE_VARY,
48 QFILE_UNIF,
49 QFILE_VPM,
50
51 /**
52 * Stores an immediate value in the index field that can be turned
53 * into a small immediate field by qpu_encode_small_immediate().
54 */
55 QFILE_SMALL_IMM,
56 };
57
58 struct qreg {
59 enum qfile file;
60 uint32_t index;
61 };
62
63 enum qop {
64 QOP_UNDEF,
65 QOP_MOV,
66 QOP_FADD,
67 QOP_FSUB,
68 QOP_FMUL,
69 QOP_MUL24,
70 QOP_FMIN,
71 QOP_FMAX,
72 QOP_FMINABS,
73 QOP_FMAXABS,
74 QOP_ADD,
75 QOP_SUB,
76 QOP_SHL,
77 QOP_SHR,
78 QOP_ASR,
79 QOP_MIN,
80 QOP_MAX,
81 QOP_AND,
82 QOP_OR,
83 QOP_XOR,
84 QOP_NOT,
85
86 /* Note: Orderings of these compares must be the same as in
87 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
88 * otherwise 0. */
89 QOP_SEL_X_0_ZS,
90 QOP_SEL_X_0_ZC,
91 QOP_SEL_X_0_NS,
92 QOP_SEL_X_0_NC,
93 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
94 QOP_SEL_X_Y_ZS,
95 QOP_SEL_X_Y_ZC,
96 QOP_SEL_X_Y_NS,
97 QOP_SEL_X_Y_NC,
98
99 QOP_FTOI,
100 QOP_ITOF,
101 QOP_RCP,
102 QOP_RSQ,
103 QOP_EXP2,
104 QOP_LOG2,
105 QOP_VW_SETUP,
106 QOP_VR_SETUP,
107 QOP_PACK_8888_F,
108 QOP_PACK_8A_F,
109 QOP_PACK_8B_F,
110 QOP_PACK_8C_F,
111 QOP_PACK_8D_F,
112 QOP_PACK_16A_I,
113 QOP_PACK_16B_I,
114 QOP_TLB_DISCARD_SETUP,
115 QOP_TLB_STENCIL_SETUP,
116 QOP_TLB_Z_WRITE,
117 QOP_TLB_COLOR_WRITE,
118 QOP_TLB_COLOR_READ,
119 QOP_VARY_ADD_C,
120
121 QOP_FRAG_X,
122 QOP_FRAG_Y,
123 QOP_FRAG_Z,
124 QOP_FRAG_W,
125 QOP_FRAG_REV_FLAG,
126
127 QOP_UNPACK_8A_F,
128 QOP_UNPACK_8B_F,
129 QOP_UNPACK_8C_F,
130 QOP_UNPACK_8D_F,
131 QOP_UNPACK_16A_F,
132 QOP_UNPACK_16B_F,
133
134 QOP_UNPACK_8A_I,
135 QOP_UNPACK_8B_I,
136 QOP_UNPACK_8C_I,
137 QOP_UNPACK_8D_I,
138 QOP_UNPACK_16A_I,
139 QOP_UNPACK_16B_I,
140
141 /** Texture x coordinate parameter write */
142 QOP_TEX_S,
143 /** Texture y coordinate parameter write */
144 QOP_TEX_T,
145 /** Texture border color parameter or cube map z coordinate write */
146 QOP_TEX_R,
147 /** Texture LOD bias parameter write */
148 QOP_TEX_B,
149
150 /**
151 * Texture-unit 4-byte read with address provided direct in S
152 * cooordinate.
153 *
154 * The first operand is the offset from the start of the UBO, and the
155 * second is the uniform that has the UBO's base pointer.
156 */
157 QOP_TEX_DIRECT,
158
159 /**
160 * Signal of texture read being necessary and then reading r4 into
161 * the destination
162 */
163 QOP_TEX_RESULT,
164 };
165
166 struct queued_qpu_inst {
167 struct list_head link;
168 uint64_t inst;
169 };
170
171 struct qinst {
172 struct list_head link;
173
174 enum qop op;
175 struct qreg dst;
176 struct qreg *src;
177 bool sf;
178 };
179
180 enum qstage {
181 /**
182 * Coordinate shader, runs during binning, before the VS, and just
183 * outputs position.
184 */
185 QSTAGE_COORD,
186 QSTAGE_VERT,
187 QSTAGE_FRAG,
188 };
189
190 enum quniform_contents {
191 /**
192 * Indicates that a constant 32-bit value is copied from the program's
193 * uniform contents.
194 */
195 QUNIFORM_CONSTANT,
196 /**
197 * Indicates that the program's uniform contents are used as an index
198 * into the GL uniform storage.
199 */
200 QUNIFORM_UNIFORM,
201
202 /** @{
203 * Scaling factors from clip coordinates to relative to the viewport
204 * center.
205 *
206 * This is used by the coordinate and vertex shaders to produce the
207 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
208 * point offsets from the viewport ccenter.
209 */
210 QUNIFORM_VIEWPORT_X_SCALE,
211 QUNIFORM_VIEWPORT_Y_SCALE,
212 /** @} */
213
214 QUNIFORM_VIEWPORT_Z_OFFSET,
215 QUNIFORM_VIEWPORT_Z_SCALE,
216
217 QUNIFORM_USER_CLIP_PLANE,
218
219 /**
220 * A reference to a texture config parameter 0 uniform.
221 *
222 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
223 * defines texture type, miplevels, and such. It will be found as a
224 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
225 */
226 QUNIFORM_TEXTURE_CONFIG_P0,
227
228 /**
229 * A reference to a texture config parameter 1 uniform.
230 *
231 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
232 * defines texture width, height, filters, and wrap modes. It will be
233 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
234 * sequence.
235 */
236 QUNIFORM_TEXTURE_CONFIG_P1,
237
238 /** A reference to a texture config parameter 2 cubemap stride uniform */
239 QUNIFORM_TEXTURE_CONFIG_P2,
240
241 QUNIFORM_UBO_ADDR,
242
243 QUNIFORM_TEXRECT_SCALE_X,
244 QUNIFORM_TEXRECT_SCALE_Y,
245
246 QUNIFORM_TEXTURE_BORDER_COLOR,
247
248 QUNIFORM_BLEND_CONST_COLOR_X,
249 QUNIFORM_BLEND_CONST_COLOR_Y,
250 QUNIFORM_BLEND_CONST_COLOR_Z,
251 QUNIFORM_BLEND_CONST_COLOR_W,
252
253 QUNIFORM_STENCIL,
254
255 QUNIFORM_ALPHA_REF,
256 };
257
258 struct vc4_varying_semantic {
259 uint8_t semantic;
260 uint8_t index;
261 uint8_t swizzle;
262 };
263
264 struct vc4_compiler_ubo_range {
265 /**
266 * offset in bytes from the start of the ubo where this range is
267 * uploaded.
268 *
269 * Only set once used is set.
270 */
271 uint32_t dst_offset;
272
273 /**
274 * offset in bytes from the start of the gallium uniforms where the
275 * data comes from.
276 */
277 uint32_t src_offset;
278
279 /** size in bytes of this ubo range */
280 uint32_t size;
281
282 /**
283 * Set if this range is used by the shader for indirect uniforms
284 * access.
285 */
286 bool used;
287 };
288
289 struct vc4_key {
290 struct vc4_uncompiled_shader *shader_state;
291 struct {
292 enum pipe_format format;
293 unsigned compare_mode:1;
294 unsigned compare_func:3;
295 unsigned wrap_s:3;
296 unsigned wrap_t:3;
297 uint8_t swizzle[4];
298 } tex[VC4_MAX_TEXTURE_SAMPLERS];
299 uint8_t ucp_enables;
300 };
301
302 struct vc4_fs_key {
303 struct vc4_key base;
304 enum pipe_format color_format;
305 bool depth_enabled;
306 bool stencil_enabled;
307 bool stencil_twoside;
308 bool stencil_full_writemasks;
309 bool is_points;
310 bool is_lines;
311 bool alpha_test;
312 bool point_coord_upper_left;
313 bool light_twoside;
314 uint8_t alpha_test_func;
315 uint8_t logicop_func;
316 uint32_t point_sprite_mask;
317
318 struct pipe_rt_blend_state blend;
319 };
320
321 struct vc4_vs_key {
322 struct vc4_key base;
323
324 /**
325 * This is a proxy for the array of FS input semantics, which is
326 * larger than we would want to put in the key.
327 */
328 uint64_t compiled_fs_id;
329
330 enum pipe_format attr_formats[8];
331 bool is_coord;
332 bool per_vertex_point_size;
333 };
334
335 struct vc4_compile {
336 struct vc4_context *vc4;
337 nir_shader *s;
338 nir_function_impl *impl;
339 struct exec_list *cf_node_list;
340
341 /**
342 * Mapping from nir_register * or nir_ssa_def * to array of struct
343 * qreg for the values.
344 */
345 struct hash_table *def_ht;
346
347 /* For each temp, the instruction generating its value. */
348 struct qinst **defs;
349 uint32_t defs_array_size;
350
351 /**
352 * Inputs to the shader, arranged by TGSI declaration order.
353 *
354 * Not all fragment shader QFILE_VARY reads are present in this array.
355 */
356 struct qreg *inputs;
357 struct qreg *outputs;
358 uint32_t inputs_array_size;
359 uint32_t outputs_array_size;
360 uint32_t uniforms_array_size;
361
362 struct vc4_compiler_ubo_range *ubo_ranges;
363 uint32_t ubo_ranges_array_size;
364 /** Number of uniform areas declared in ubo_ranges. */
365 uint32_t num_uniform_ranges;
366 /** Number of uniform areas used for indirect addressed loads. */
367 uint32_t num_ubo_ranges;
368 uint32_t next_ubo_dst_offset;
369
370 struct qreg line_x, point_x, point_y;
371 struct qreg discard;
372
373 uint8_t vattr_sizes[8];
374
375 /**
376 * Array of the TGSI semantics of all FS QFILE_VARY reads.
377 *
378 * This includes those that aren't part of the VPM varyings, like
379 * point/line coordinates.
380 */
381 struct vc4_varying_semantic *input_semantics;
382 uint32_t num_input_semantics;
383 uint32_t input_semantics_array_size;
384
385 /**
386 * An entry per outputs[] in the VS indicating what the semantic of
387 * the output is. Used to emit from the VS in the order that the FS
388 * needs.
389 */
390 struct vc4_varying_semantic *output_semantics;
391
392 struct pipe_shader_state *shader_state;
393 struct vc4_key *key;
394 struct vc4_fs_key *fs_key;
395 struct vc4_vs_key *vs_key;
396
397 uint32_t *uniform_data;
398 enum quniform_contents *uniform_contents;
399 uint32_t uniform_array_size;
400 uint32_t num_uniforms;
401 uint32_t num_outputs;
402 uint32_t num_texture_samples;
403 uint32_t output_position_index;
404 uint32_t output_clipvertex_index;
405 uint32_t output_color_index;
406 uint32_t output_point_size_index;
407
408 struct qreg undef;
409 enum qstage stage;
410 uint32_t num_temps;
411 struct list_head instructions;
412 uint32_t immediates[1024];
413
414 struct list_head qpu_inst_list;
415 uint64_t *qpu_insts;
416 uint32_t qpu_inst_count;
417 uint32_t qpu_inst_size;
418 uint32_t num_inputs;
419
420 uint32_t program_id;
421 uint32_t variant_id;
422 };
423
424 /* Special nir_load_input intrinsic index for loading the current TLB
425 * destination color.
426 */
427 #define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000
428
429 /* Special offset for nir_load_uniform values to get a QUNIFORM_*
430 * state-dependent value.
431 */
432 #define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000
433
434 struct vc4_compile *qir_compile_init(void);
435 void qir_compile_destroy(struct vc4_compile *c);
436 struct qinst *qir_inst(enum qop op, struct qreg dst,
437 struct qreg src0, struct qreg src1);
438 struct qinst *qir_inst4(enum qop op, struct qreg dst,
439 struct qreg a,
440 struct qreg b,
441 struct qreg c,
442 struct qreg d);
443 void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst);
444 struct qreg qir_uniform(struct vc4_compile *c,
445 enum quniform_contents contents,
446 uint32_t data);
447 void qir_reorder_uniforms(struct vc4_compile *c);
448 void qir_emit(struct vc4_compile *c, struct qinst *inst);
449 struct qreg qir_get_temp(struct vc4_compile *c);
450 int qir_get_op_nsrc(enum qop qop);
451 bool qir_reg_equals(struct qreg a, struct qreg b);
452 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
453 bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst);
454 bool qir_is_multi_instruction(struct qinst *inst);
455 bool qir_is_tex(struct qinst *inst);
456 bool qir_depends_on_flags(struct qinst *inst);
457 bool qir_writes_r4(struct qinst *inst);
458 bool qir_src_needs_a_file(struct qinst *inst);
459 struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg);
460
461 void qir_dump(struct vc4_compile *c);
462 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
463 const char *qir_get_stage_name(enum qstage stage);
464
465 void qir_optimize(struct vc4_compile *c);
466 bool qir_opt_algebraic(struct vc4_compile *c);
467 bool qir_opt_constant_folding(struct vc4_compile *c);
468 bool qir_opt_copy_propagation(struct vc4_compile *c);
469 bool qir_opt_cse(struct vc4_compile *c);
470 bool qir_opt_dead_code(struct vc4_compile *c);
471 bool qir_opt_small_immediates(struct vc4_compile *c);
472 bool qir_opt_vpm_writes(struct vc4_compile *c);
473 void vc4_nir_lower_blend(struct vc4_compile *c);
474 void vc4_nir_lower_io(struct vc4_compile *c);
475 nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b,
476 enum quniform_contents contents);
477 nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b,
478 nir_ssa_def **srcs, int swiz);
479 void qir_lower_uniforms(struct vc4_compile *c);
480
481 void qpu_schedule_instructions(struct vc4_compile *c);
482
483 void qir_SF(struct vc4_compile *c, struct qreg src);
484
485 static inline struct qreg
486 qir_uniform_ui(struct vc4_compile *c, uint32_t ui)
487 {
488 return qir_uniform(c, QUNIFORM_CONSTANT, ui);
489 }
490
491 static inline struct qreg
492 qir_uniform_f(struct vc4_compile *c, float f)
493 {
494 return qir_uniform(c, QUNIFORM_CONSTANT, fui(f));
495 }
496
497 #define QIR_ALU0(name) \
498 static inline struct qreg \
499 qir_##name(struct vc4_compile *c) \
500 { \
501 struct qreg t = qir_get_temp(c); \
502 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
503 return t; \
504 }
505
506 #define QIR_ALU1(name) \
507 static inline struct qreg \
508 qir_##name(struct vc4_compile *c, struct qreg a) \
509 { \
510 struct qreg t = qir_get_temp(c); \
511 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
512 return t; \
513 }
514
515 #define QIR_ALU2(name) \
516 static inline struct qreg \
517 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
518 { \
519 struct qreg t = qir_get_temp(c); \
520 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
521 return t; \
522 }
523
524 #define QIR_NODST_1(name) \
525 static inline void \
526 qir_##name(struct vc4_compile *c, struct qreg a) \
527 { \
528 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
529 }
530
531 #define QIR_NODST_2(name) \
532 static inline void \
533 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
534 { \
535 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
536 }
537
538 #define QIR_PACK(name) \
539 static inline struct qreg \
540 qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \
541 { \
542 qir_emit(c, qir_inst(QOP_##name, dest, a, c->undef)); \
543 if (dest.file == QFILE_TEMP) \
544 c->defs[dest.index] = NULL; \
545 return dest; \
546 }
547
548 QIR_ALU1(MOV)
549 QIR_ALU2(FADD)
550 QIR_ALU2(FSUB)
551 QIR_ALU2(FMUL)
552 QIR_ALU2(MUL24)
553 QIR_ALU1(SEL_X_0_ZS)
554 QIR_ALU1(SEL_X_0_ZC)
555 QIR_ALU1(SEL_X_0_NS)
556 QIR_ALU1(SEL_X_0_NC)
557 QIR_ALU2(SEL_X_Y_ZS)
558 QIR_ALU2(SEL_X_Y_ZC)
559 QIR_ALU2(SEL_X_Y_NS)
560 QIR_ALU2(SEL_X_Y_NC)
561 QIR_ALU2(FMIN)
562 QIR_ALU2(FMAX)
563 QIR_ALU2(FMINABS)
564 QIR_ALU2(FMAXABS)
565 QIR_ALU1(FTOI)
566 QIR_ALU1(ITOF)
567
568 QIR_ALU2(ADD)
569 QIR_ALU2(SUB)
570 QIR_ALU2(SHL)
571 QIR_ALU2(SHR)
572 QIR_ALU2(ASR)
573 QIR_ALU2(MIN)
574 QIR_ALU2(MAX)
575 QIR_ALU2(AND)
576 QIR_ALU2(OR)
577 QIR_ALU2(XOR)
578 QIR_ALU1(NOT)
579
580 QIR_ALU1(RCP)
581 QIR_ALU1(RSQ)
582 QIR_ALU1(EXP2)
583 QIR_ALU1(LOG2)
584 QIR_ALU1(PACK_8888_F)
585 QIR_PACK(PACK_8A_F)
586 QIR_PACK(PACK_8B_F)
587 QIR_PACK(PACK_8C_F)
588 QIR_PACK(PACK_8D_F)
589 QIR_PACK(PACK_16A_I)
590 QIR_PACK(PACK_16B_I)
591 QIR_ALU1(VARY_ADD_C)
592 QIR_NODST_2(TEX_S)
593 QIR_NODST_2(TEX_T)
594 QIR_NODST_2(TEX_R)
595 QIR_NODST_2(TEX_B)
596 QIR_NODST_2(TEX_DIRECT)
597 QIR_ALU0(FRAG_X)
598 QIR_ALU0(FRAG_Y)
599 QIR_ALU0(FRAG_Z)
600 QIR_ALU0(FRAG_W)
601 QIR_ALU0(FRAG_REV_FLAG)
602 QIR_ALU0(TEX_RESULT)
603 QIR_ALU0(TLB_COLOR_READ)
604 QIR_NODST_1(TLB_COLOR_WRITE)
605 QIR_NODST_1(TLB_Z_WRITE)
606 QIR_NODST_1(TLB_DISCARD_SETUP)
607 QIR_NODST_1(TLB_STENCIL_SETUP)
608
609 static inline struct qreg
610 qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
611 {
612 struct qreg t = qir_get_temp(c);
613 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef));
614 return t;
615 }
616
617 static inline struct qreg
618 qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
619 {
620 struct qreg t = qir_get_temp(c);
621 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef));
622 return t;
623 }
624
625 static inline struct qreg
626 qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
627 {
628 struct qreg t = qir_get_temp(c);
629 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef));
630 return t;
631 }
632
633 static inline struct qreg
634 qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
635 {
636 struct qreg t = qir_get_temp(c);
637 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef));
638 return t;
639 }
640
641 static inline struct qreg
642 qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan)
643 {
644 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, dest, val, c->undef));
645 if (dest.file == QFILE_TEMP)
646 c->defs[dest.index] = NULL;
647 return dest;
648 }
649
650 static inline struct qreg
651 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
652 {
653 return qir_EXP2(c, qir_FMUL(c,
654 y,
655 qir_LOG2(c, x)));
656 }
657
658 static inline void
659 qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
660 {
661 static const struct qreg vpm = { QFILE_VPM, 0 };
662 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
663 }
664
665 #endif /* VC4_QIR_H */