2 * Copyright © 2014 Broadcom
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
34 #include "util/macros.h"
35 #include "glsl/nir/nir.h"
36 #include "util/list.h"
37 #include "util/u_math.h"
39 #include "vc4_screen.h"
40 #include "vc4_qpu_defines.h"
41 #include "pipe/p_state.h"
53 * Stores an immediate value in the index field that can be turned
54 * into a small immediate field by qpu_encode_small_immediate().
95 /* Note: Orderings of these compares must be the same as in
96 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
104 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
120 QOP_TLB_DISCARD_SETUP
,
121 QOP_TLB_STENCIL_SETUP
,
134 /** Texture x coordinate parameter write */
136 /** Texture y coordinate parameter write */
138 /** Texture border color parameter or cube map z coordinate write */
140 /** Texture LOD bias parameter write */
144 * Texture-unit 4-byte read with address provided direct in S
147 * The first operand is the offset from the start of the UBO, and the
148 * second is the uniform that has the UBO's base pointer.
153 * Signal of texture read being necessary and then reading r4 into
159 struct queued_qpu_inst
{
160 struct list_head link
;
165 struct list_head link
;
175 * Coordinate shader, runs during binning, before the VS, and just
183 enum quniform_contents
{
185 * Indicates that a constant 32-bit value is copied from the program's
190 * Indicates that the program's uniform contents are used as an index
191 * into the GL uniform storage.
196 * Scaling factors from clip coordinates to relative to the viewport
199 * This is used by the coordinate and vertex shaders to produce the
200 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
201 * point offsets from the viewport ccenter.
203 QUNIFORM_VIEWPORT_X_SCALE
,
204 QUNIFORM_VIEWPORT_Y_SCALE
,
207 QUNIFORM_VIEWPORT_Z_OFFSET
,
208 QUNIFORM_VIEWPORT_Z_SCALE
,
210 QUNIFORM_USER_CLIP_PLANE
,
213 * A reference to a texture config parameter 0 uniform.
215 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
216 * defines texture type, miplevels, and such. It will be found as a
217 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
219 QUNIFORM_TEXTURE_CONFIG_P0
,
222 * A reference to a texture config parameter 1 uniform.
224 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
225 * defines texture width, height, filters, and wrap modes. It will be
226 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
229 QUNIFORM_TEXTURE_CONFIG_P1
,
231 /** A reference to a texture config parameter 2 cubemap stride uniform */
232 QUNIFORM_TEXTURE_CONFIG_P2
,
236 QUNIFORM_TEXRECT_SCALE_X
,
237 QUNIFORM_TEXRECT_SCALE_Y
,
239 QUNIFORM_TEXTURE_BORDER_COLOR
,
241 QUNIFORM_BLEND_CONST_COLOR_X
,
242 QUNIFORM_BLEND_CONST_COLOR_Y
,
243 QUNIFORM_BLEND_CONST_COLOR_Z
,
244 QUNIFORM_BLEND_CONST_COLOR_W
,
245 QUNIFORM_BLEND_CONST_COLOR_RGBA
,
246 QUNIFORM_BLEND_CONST_COLOR_AAAA
,
251 QUNIFORM_SAMPLE_MASK
,
254 struct vc4_varying_slot
{
259 struct vc4_compiler_ubo_range
{
261 * offset in bytes from the start of the ubo where this range is
264 * Only set once used is set.
269 * offset in bytes from the start of the gallium uniforms where the
274 /** size in bytes of this ubo range */
278 * Set if this range is used by the shader for indirect uniforms
285 struct vc4_uncompiled_shader
*shader_state
;
287 enum pipe_format format
;
288 unsigned compare_mode
:1;
289 unsigned compare_func
:3;
293 } tex
[VC4_MAX_TEXTURE_SAMPLERS
];
299 enum pipe_format color_format
;
301 bool stencil_enabled
;
302 bool stencil_twoside
;
303 bool stencil_full_writemasks
;
307 bool point_coord_upper_left
;
309 uint8_t alpha_test_func
;
310 uint8_t logicop_func
;
311 uint32_t point_sprite_mask
;
313 struct pipe_rt_blend_state blend
;
320 * This is a proxy for the array of FS input semantics, which is
321 * larger than we would want to put in the key.
323 uint64_t compiled_fs_id
;
325 enum pipe_format attr_formats
[8];
327 bool per_vertex_point_size
;
331 struct vc4_context
*vc4
;
333 nir_function_impl
*impl
;
334 struct exec_list
*cf_node_list
;
337 * Mapping from nir_register * or nir_ssa_def * to array of struct
338 * qreg for the values.
340 struct hash_table
*def_ht
;
342 /* For each temp, the instruction generating its value. */
344 uint32_t defs_array_size
;
347 * Inputs to the shader, arranged by TGSI declaration order.
349 * Not all fragment shader QFILE_VARY reads are present in this array.
352 struct qreg
*outputs
;
353 uint32_t inputs_array_size
;
354 uint32_t outputs_array_size
;
355 uint32_t uniforms_array_size
;
357 struct vc4_compiler_ubo_range
*ubo_ranges
;
358 uint32_t ubo_ranges_array_size
;
359 /** Number of uniform areas declared in ubo_ranges. */
360 uint32_t num_uniform_ranges
;
361 /** Number of uniform areas used for indirect addressed loads. */
362 uint32_t num_ubo_ranges
;
363 uint32_t next_ubo_dst_offset
;
365 struct qreg line_x
, point_x
, point_y
;
368 uint8_t vattr_sizes
[8];
371 * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads.
373 * This includes those that aren't part of the VPM varyings, like
374 * point/line coordinates.
376 struct vc4_varying_slot
*input_slots
;
377 uint32_t num_input_slots
;
378 uint32_t input_slots_array_size
;
381 * An entry per outputs[] in the VS indicating what the VARYING_SLOT_*
382 * of the output is. Used to emit from the VS in the order that the
385 struct vc4_varying_slot
*output_slots
;
387 struct pipe_shader_state
*shader_state
;
389 struct vc4_fs_key
*fs_key
;
390 struct vc4_vs_key
*vs_key
;
392 uint32_t *uniform_data
;
393 enum quniform_contents
*uniform_contents
;
394 uint32_t uniform_array_size
;
395 uint32_t num_uniforms
;
396 uint32_t num_outputs
;
397 uint32_t num_texture_samples
;
398 uint32_t output_position_index
;
399 uint32_t output_color_index
;
400 uint32_t output_point_size_index
;
401 uint32_t output_sample_mask_index
;
406 struct list_head instructions
;
407 uint32_t immediates
[1024];
409 struct list_head qpu_inst_list
;
411 uint32_t qpu_inst_count
;
412 uint32_t qpu_inst_size
;
419 /* Special nir_load_input intrinsic index for loading the current TLB
422 #define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000
424 /* Special offset for nir_load_uniform values to get a QUNIFORM_*
425 * state-dependent value.
427 #define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000
429 struct vc4_compile
*qir_compile_init(void);
430 void qir_compile_destroy(struct vc4_compile
*c
);
431 struct qinst
*qir_inst(enum qop op
, struct qreg dst
,
432 struct qreg src0
, struct qreg src1
);
433 struct qinst
*qir_inst4(enum qop op
, struct qreg dst
,
438 void qir_remove_instruction(struct vc4_compile
*c
, struct qinst
*qinst
);
439 struct qreg
qir_uniform(struct vc4_compile
*c
,
440 enum quniform_contents contents
,
442 void qir_reorder_uniforms(struct vc4_compile
*c
);
444 void qir_emit(struct vc4_compile
*c
, struct qinst
*inst
);
445 static inline void qir_emit_nodef(struct vc4_compile
*c
, struct qinst
*inst
)
447 list_addtail(&inst
->link
, &c
->instructions
);
450 struct qreg
qir_get_temp(struct vc4_compile
*c
);
451 int qir_get_op_nsrc(enum qop qop
);
452 bool qir_reg_equals(struct qreg a
, struct qreg b
);
453 bool qir_has_side_effects(struct vc4_compile
*c
, struct qinst
*inst
);
454 bool qir_has_side_effect_reads(struct vc4_compile
*c
, struct qinst
*inst
);
455 bool qir_is_multi_instruction(struct qinst
*inst
);
456 bool qir_is_mul(struct qinst
*inst
);
457 bool qir_is_raw_mov(struct qinst
*inst
);
458 bool qir_is_tex(struct qinst
*inst
);
459 bool qir_is_float_input(struct qinst
*inst
);
460 bool qir_depends_on_flags(struct qinst
*inst
);
461 bool qir_writes_r4(struct qinst
*inst
);
462 struct qreg
qir_follow_movs(struct vc4_compile
*c
, struct qreg reg
);
464 void qir_dump(struct vc4_compile
*c
);
465 void qir_dump_inst(struct vc4_compile
*c
, struct qinst
*inst
);
466 const char *qir_get_stage_name(enum qstage stage
);
468 void qir_optimize(struct vc4_compile
*c
);
469 bool qir_opt_algebraic(struct vc4_compile
*c
);
470 bool qir_opt_constant_folding(struct vc4_compile
*c
);
471 bool qir_opt_copy_propagation(struct vc4_compile
*c
);
472 bool qir_opt_cse(struct vc4_compile
*c
);
473 bool qir_opt_dead_code(struct vc4_compile
*c
);
474 bool qir_opt_small_immediates(struct vc4_compile
*c
);
475 bool qir_opt_vpm_writes(struct vc4_compile
*c
);
476 void vc4_nir_lower_blend(struct vc4_compile
*c
);
477 void vc4_nir_lower_io(struct vc4_compile
*c
);
478 nir_ssa_def
*vc4_nir_get_state_uniform(struct nir_builder
*b
,
479 enum quniform_contents contents
);
480 nir_ssa_def
*vc4_nir_get_swizzled_channel(struct nir_builder
*b
,
481 nir_ssa_def
**srcs
, int swiz
);
482 void qir_lower_uniforms(struct vc4_compile
*c
);
484 void qpu_schedule_instructions(struct vc4_compile
*c
);
486 void qir_SF(struct vc4_compile
*c
, struct qreg src
);
488 static inline struct qreg
489 qir_uniform_ui(struct vc4_compile
*c
, uint32_t ui
)
491 return qir_uniform(c
, QUNIFORM_CONSTANT
, ui
);
494 static inline struct qreg
495 qir_uniform_f(struct vc4_compile
*c
, float f
)
497 return qir_uniform(c
, QUNIFORM_CONSTANT
, fui(f
));
500 #define QIR_ALU0(name) \
501 static inline struct qreg \
502 qir_##name(struct vc4_compile *c) \
504 struct qreg t = qir_get_temp(c); \
505 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
509 #define QIR_ALU1(name) \
510 static inline struct qreg \
511 qir_##name(struct vc4_compile *c, struct qreg a) \
513 struct qreg t = qir_get_temp(c); \
514 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
518 qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
521 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
524 #define QIR_ALU2(name) \
525 static inline struct qreg \
526 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
528 struct qreg t = qir_get_temp(c); \
529 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
533 qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
534 struct qreg a, struct qreg b) \
536 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \
539 #define QIR_NODST_1(name) \
541 qir_##name(struct vc4_compile *c, struct qreg a) \
543 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
546 #define QIR_NODST_2(name) \
548 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
550 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
553 #define QIR_PACK(name) \
554 static inline struct qreg \
555 qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \
557 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
613 QIR_NODST_2(TEX_DIRECT
)
618 QIR_ALU0(FRAG_REV_FLAG
)
620 QIR_ALU0(TLB_COLOR_READ
)
621 QIR_NODST_1(TLB_COLOR_WRITE
)
622 QIR_NODST_1(TLB_Z_WRITE
)
623 QIR_NODST_1(TLB_DISCARD_SETUP
)
624 QIR_NODST_1(TLB_STENCIL_SETUP
)
627 static inline struct qreg
628 qir_UNPACK_8_F(struct vc4_compile
*c
, struct qreg src
, int i
)
630 struct qreg t
= qir_FMOV(c
, src
);
631 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_8A
+ i
;
635 static inline struct qreg
636 qir_UNPACK_8_I(struct vc4_compile
*c
, struct qreg src
, int i
)
638 struct qreg t
= qir_MOV(c
, src
);
639 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_8A
+ i
;
643 static inline struct qreg
644 qir_UNPACK_16_F(struct vc4_compile
*c
, struct qreg src
, int i
)
646 struct qreg t
= qir_FMOV(c
, src
);
647 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_16A
+ i
;
651 static inline struct qreg
652 qir_UNPACK_16_I(struct vc4_compile
*c
, struct qreg src
, int i
)
654 struct qreg t
= qir_MOV(c
, src
);
655 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_16A
+ i
;
660 qir_PACK_8_F(struct vc4_compile
*c
, struct qreg dest
, struct qreg val
, int chan
)
663 dest
.pack
= QPU_PACK_MUL_8A
+ chan
;
664 qir_emit(c
, qir_inst(QOP_MMOV
, dest
, val
, c
->undef
));
665 if (dest
.file
== QFILE_TEMP
)
666 c
->defs
[dest
.index
] = NULL
;
669 static inline struct qreg
670 qir_PACK_8888_F(struct vc4_compile
*c
, struct qreg val
)
672 struct qreg dest
= qir_MMOV(c
, val
);
673 c
->defs
[dest
.index
]->dst
.pack
= QPU_PACK_MUL_8888
;
677 static inline struct qreg
678 qir_POW(struct vc4_compile
*c
, struct qreg x
, struct qreg y
)
680 return qir_EXP2(c
, qir_FMUL(c
,
686 qir_VPM_WRITE(struct vc4_compile
*c
, struct qreg val
)
688 static const struct qreg vpm
= { QFILE_VPM
, 0 };
689 qir_emit(c
, qir_inst(QOP_MOV
, vpm
, val
, c
->undef
));
692 #endif /* VC4_QIR_H */