d8f9babef4ce4457eb3f212bb8931b2730043e3c
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdbool.h>
30 #include <stdint.h>
31 #include <string.h>
32
33 #include "util/u_simple_list.h"
34 #include "tgsi/tgsi_parse.h"
35
36 enum qfile {
37 QFILE_NULL,
38 QFILE_TEMP,
39 QFILE_VARY,
40 QFILE_UNIF,
41 QFILE_VPM,
42
43 /**
44 * Stores an immediate value in the index field that can be turned
45 * into a small immediate field by qpu_encode_small_immediate().
46 */
47 QFILE_SMALL_IMM,
48 };
49
50 struct qreg {
51 enum qfile file;
52 uint32_t index;
53 };
54
55 enum qop {
56 QOP_UNDEF,
57 QOP_MOV,
58 QOP_FADD,
59 QOP_FSUB,
60 QOP_FMUL,
61 QOP_MUL24,
62 QOP_FMIN,
63 QOP_FMAX,
64 QOP_FMINABS,
65 QOP_FMAXABS,
66 QOP_ADD,
67 QOP_SUB,
68 QOP_SHL,
69 QOP_SHR,
70 QOP_ASR,
71 QOP_MIN,
72 QOP_MAX,
73 QOP_AND,
74 QOP_OR,
75 QOP_XOR,
76 QOP_NOT,
77
78 /* Sets the flag register according to src. */
79 QOP_SF,
80
81 /* Note: Orderings of these compares must be the same as in
82 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
83 * otherwise 0. */
84 QOP_SEL_X_0_ZS,
85 QOP_SEL_X_0_ZC,
86 QOP_SEL_X_0_NS,
87 QOP_SEL_X_0_NC,
88 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
89 QOP_SEL_X_Y_ZS,
90 QOP_SEL_X_Y_ZC,
91 QOP_SEL_X_Y_NS,
92 QOP_SEL_X_Y_NC,
93
94 QOP_FTOI,
95 QOP_ITOF,
96 QOP_RCP,
97 QOP_RSQ,
98 QOP_EXP2,
99 QOP_LOG2,
100 QOP_VW_SETUP,
101 QOP_VR_SETUP,
102 QOP_PACK_SCALED,
103 QOP_PACK_8888_F,
104 QOP_PACK_8A_F,
105 QOP_PACK_8B_F,
106 QOP_PACK_8C_F,
107 QOP_PACK_8D_F,
108 QOP_VPM_READ,
109 QOP_TLB_DISCARD_SETUP,
110 QOP_TLB_STENCIL_SETUP,
111 QOP_TLB_Z_WRITE,
112 QOP_TLB_COLOR_WRITE,
113 QOP_TLB_COLOR_READ,
114 QOP_VARY_ADD_C,
115
116 QOP_FRAG_X,
117 QOP_FRAG_Y,
118 QOP_FRAG_Z,
119 QOP_FRAG_W,
120 QOP_FRAG_REV_FLAG,
121
122 QOP_UNPACK_8A_F,
123 QOP_UNPACK_8B_F,
124 QOP_UNPACK_8C_F,
125 QOP_UNPACK_8D_F,
126 QOP_UNPACK_16A_F,
127 QOP_UNPACK_16B_F,
128
129 QOP_UNPACK_8A_I,
130 QOP_UNPACK_8B_I,
131 QOP_UNPACK_8C_I,
132 QOP_UNPACK_8D_I,
133 QOP_UNPACK_16A_I,
134 QOP_UNPACK_16B_I,
135
136 /** Texture x coordinate parameter write */
137 QOP_TEX_S,
138 /** Texture y coordinate parameter write */
139 QOP_TEX_T,
140 /** Texture border color parameter or cube map z coordinate write */
141 QOP_TEX_R,
142 /** Texture LOD bias parameter write */
143 QOP_TEX_B,
144
145 /**
146 * Texture-unit 4-byte read with address provided direct in S
147 * cooordinate.
148 *
149 * The first operand is the offset from the start of the UBO, and the
150 * second is the uniform that has the UBO's base pointer.
151 */
152 QOP_TEX_DIRECT,
153
154 /**
155 * Signal of texture read being necessary and then reading r4 into
156 * the destination
157 */
158 QOP_TEX_RESULT,
159 QOP_R4_UNPACK_A,
160 QOP_R4_UNPACK_B,
161 QOP_R4_UNPACK_C,
162 QOP_R4_UNPACK_D
163 };
164
165 struct simple_node {
166 struct simple_node *next;
167 struct simple_node *prev;
168 };
169
170 struct queued_qpu_inst {
171 struct simple_node link;
172 uint64_t inst;
173 };
174
175 struct qinst {
176 struct simple_node link;
177
178 enum qop op;
179 struct qreg dst;
180 struct qreg *src;
181 };
182
183 enum qstage {
184 /**
185 * Coordinate shader, runs during binning, before the VS, and just
186 * outputs position.
187 */
188 QSTAGE_COORD,
189 QSTAGE_VERT,
190 QSTAGE_FRAG,
191 };
192
193 enum quniform_contents {
194 /**
195 * Indicates that a constant 32-bit value is copied from the program's
196 * uniform contents.
197 */
198 QUNIFORM_CONSTANT,
199 /**
200 * Indicates that the program's uniform contents are used as an index
201 * into the GL uniform storage.
202 */
203 QUNIFORM_UNIFORM,
204
205 /** @{
206 * Scaling factors from clip coordinates to relative to the viewport
207 * center.
208 *
209 * This is used by the coordinate and vertex shaders to produce the
210 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
211 * point offsets from the viewport ccenter.
212 */
213 QUNIFORM_VIEWPORT_X_SCALE,
214 QUNIFORM_VIEWPORT_Y_SCALE,
215 /** @} */
216
217 QUNIFORM_VIEWPORT_Z_OFFSET,
218 QUNIFORM_VIEWPORT_Z_SCALE,
219
220 QUNIFORM_USER_CLIP_PLANE,
221
222 /**
223 * A reference to a texture config parameter 0 uniform.
224 *
225 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
226 * defines texture type, miplevels, and such. It will be found as a
227 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
228 */
229 QUNIFORM_TEXTURE_CONFIG_P0,
230
231 /**
232 * A reference to a texture config parameter 1 uniform.
233 *
234 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
235 * defines texture width, height, filters, and wrap modes. It will be
236 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
237 * sequence.
238 */
239 QUNIFORM_TEXTURE_CONFIG_P1,
240
241 /** A reference to a texture config parameter 2 cubemap stride uniform */
242 QUNIFORM_TEXTURE_CONFIG_P2,
243
244 QUNIFORM_UBO_ADDR,
245
246 QUNIFORM_TEXRECT_SCALE_X,
247 QUNIFORM_TEXRECT_SCALE_Y,
248
249 QUNIFORM_TEXTURE_BORDER_COLOR,
250
251 QUNIFORM_BLEND_CONST_COLOR,
252 QUNIFORM_STENCIL,
253
254 QUNIFORM_ALPHA_REF,
255 };
256
257 struct vc4_varying_semantic {
258 uint8_t semantic;
259 uint8_t index;
260 uint8_t swizzle;
261 };
262
263 struct vc4_compiler_ubo_range {
264 /**
265 * offset in bytes from the start of the ubo where this range is
266 * uploaded.
267 *
268 * Only set once used is set.
269 */
270 uint32_t dst_offset;
271
272 /**
273 * offset in bytes from the start of the gallium uniforms where the
274 * data comes from.
275 */
276 uint32_t src_offset;
277
278 /** size in bytes of this ubo range */
279 uint32_t size;
280
281 /**
282 * Set if this range is used by the shader for indirect uniforms
283 * access.
284 */
285 bool used;
286 };
287
288 struct vc4_compile {
289 struct vc4_context *vc4;
290 struct tgsi_parse_context parser;
291 struct qreg *temps;
292 /**
293 * Inputs to the shader, arranged by TGSI declaration order.
294 *
295 * Not all fragment shader QFILE_VARY reads are present in this array.
296 */
297 struct qreg *inputs;
298 struct qreg *outputs;
299 struct qreg *consts;
300 struct qreg addr[4]; /* TGSI ARL destination. */
301 uint32_t temps_array_size;
302 uint32_t inputs_array_size;
303 uint32_t outputs_array_size;
304 uint32_t uniforms_array_size;
305 uint32_t consts_array_size;
306 uint32_t num_consts;
307
308 struct vc4_compiler_ubo_range *ubo_ranges;
309 uint32_t ubo_ranges_array_size;
310 uint32_t num_ubo_ranges;
311 uint32_t next_ubo_dst_offset;
312
313 struct qreg line_x, point_x, point_y;
314 struct qreg discard;
315
316 /**
317 * Array of the TGSI semantics of all FS QFILE_VARY reads.
318 *
319 * This includes those that aren't part of the VPM varyings, like
320 * point/line coordinates.
321 */
322 struct vc4_varying_semantic *input_semantics;
323 uint32_t num_input_semantics;
324 uint32_t input_semantics_array_size;
325
326 /**
327 * An entry per outputs[] in the VS indicating what the semantic of
328 * the output is. Used to emit from the VS in the order that the FS
329 * needs.
330 */
331 struct vc4_varying_semantic *output_semantics;
332
333 struct pipe_shader_state *shader_state;
334 struct vc4_key *key;
335 struct vc4_fs_key *fs_key;
336 struct vc4_vs_key *vs_key;
337
338 uint32_t *uniform_data;
339 enum quniform_contents *uniform_contents;
340 uint32_t uniform_array_size;
341 uint32_t num_uniforms;
342 uint32_t num_outputs;
343 uint32_t num_texture_samples;
344 uint32_t output_position_index;
345 uint32_t output_clipvertex_index;
346 uint32_t output_color_index;
347 uint32_t output_point_size_index;
348
349 struct qreg undef;
350 enum qstage stage;
351 uint32_t num_temps;
352 struct simple_node instructions;
353 uint32_t immediates[1024];
354
355 struct simple_node qpu_inst_list;
356 uint64_t *qpu_insts;
357 uint32_t qpu_inst_count;
358 uint32_t qpu_inst_size;
359 uint32_t num_inputs;
360
361 uint32_t program_id;
362 uint32_t variant_id;
363 };
364
365 struct vc4_compile *qir_compile_init(void);
366 void qir_compile_destroy(struct vc4_compile *c);
367 struct qinst *qir_inst(enum qop op, struct qreg dst,
368 struct qreg src0, struct qreg src1);
369 struct qinst *qir_inst4(enum qop op, struct qreg dst,
370 struct qreg a,
371 struct qreg b,
372 struct qreg c,
373 struct qreg d);
374 void qir_remove_instruction(struct qinst *qinst);
375 void qir_reorder_uniforms(struct vc4_compile *c);
376 void qir_emit(struct vc4_compile *c, struct qinst *inst);
377 struct qreg qir_get_temp(struct vc4_compile *c);
378 int qir_get_op_nsrc(enum qop qop);
379 bool qir_reg_equals(struct qreg a, struct qreg b);
380 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
381 bool qir_is_multi_instruction(struct qinst *inst);
382 bool qir_depends_on_flags(struct qinst *inst);
383 bool qir_writes_r4(struct qinst *inst);
384 bool qir_reads_r4(struct qinst *inst);
385 struct qreg qir_follow_movs(struct qinst **defs, struct qreg reg);
386
387 void qir_dump(struct vc4_compile *c);
388 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
389 const char *qir_get_stage_name(enum qstage stage);
390
391 void qir_optimize(struct vc4_compile *c);
392 bool qir_opt_algebraic(struct vc4_compile *c);
393 bool qir_opt_copy_propagation(struct vc4_compile *c);
394 bool qir_opt_cse(struct vc4_compile *c);
395 bool qir_opt_dead_code(struct vc4_compile *c);
396 bool qir_opt_small_immediates(struct vc4_compile *c);
397 bool qir_opt_vpm_writes(struct vc4_compile *c);
398
399 void qpu_schedule_instructions(struct vc4_compile *c);
400
401 #define QIR_ALU0(name) \
402 static inline struct qreg \
403 qir_##name(struct vc4_compile *c) \
404 { \
405 struct qreg t = qir_get_temp(c); \
406 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
407 return t; \
408 }
409
410 #define QIR_ALU1(name) \
411 static inline struct qreg \
412 qir_##name(struct vc4_compile *c, struct qreg a) \
413 { \
414 struct qreg t = qir_get_temp(c); \
415 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
416 return t; \
417 }
418
419 #define QIR_ALU2(name) \
420 static inline struct qreg \
421 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
422 { \
423 struct qreg t = qir_get_temp(c); \
424 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
425 return t; \
426 }
427
428 #define QIR_NODST_1(name) \
429 static inline void \
430 qir_##name(struct vc4_compile *c, struct qreg a) \
431 { \
432 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
433 }
434
435 #define QIR_NODST_2(name) \
436 static inline void \
437 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
438 { \
439 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
440 }
441
442 QIR_ALU1(MOV)
443 QIR_ALU2(FADD)
444 QIR_ALU2(FSUB)
445 QIR_ALU2(FMUL)
446 QIR_ALU2(MUL24)
447 QIR_NODST_1(SF)
448 QIR_ALU1(SEL_X_0_ZS)
449 QIR_ALU1(SEL_X_0_ZC)
450 QIR_ALU1(SEL_X_0_NS)
451 QIR_ALU1(SEL_X_0_NC)
452 QIR_ALU2(SEL_X_Y_ZS)
453 QIR_ALU2(SEL_X_Y_ZC)
454 QIR_ALU2(SEL_X_Y_NS)
455 QIR_ALU2(SEL_X_Y_NC)
456 QIR_ALU2(FMIN)
457 QIR_ALU2(FMAX)
458 QIR_ALU2(FMINABS)
459 QIR_ALU2(FMAXABS)
460 QIR_ALU1(FTOI)
461 QIR_ALU1(ITOF)
462
463 QIR_ALU2(ADD)
464 QIR_ALU2(SUB)
465 QIR_ALU2(SHL)
466 QIR_ALU2(SHR)
467 QIR_ALU2(ASR)
468 QIR_ALU2(MIN)
469 QIR_ALU2(MAX)
470 QIR_ALU2(AND)
471 QIR_ALU2(OR)
472 QIR_ALU2(XOR)
473 QIR_ALU1(NOT)
474
475 QIR_ALU1(RCP)
476 QIR_ALU1(RSQ)
477 QIR_ALU1(EXP2)
478 QIR_ALU1(LOG2)
479 QIR_ALU2(PACK_SCALED)
480 QIR_ALU1(PACK_8888_F)
481 QIR_ALU2(PACK_8A_F)
482 QIR_ALU2(PACK_8B_F)
483 QIR_ALU2(PACK_8C_F)
484 QIR_ALU2(PACK_8D_F)
485 QIR_ALU1(VARY_ADD_C)
486 QIR_NODST_2(TEX_S)
487 QIR_NODST_2(TEX_T)
488 QIR_NODST_2(TEX_R)
489 QIR_NODST_2(TEX_B)
490 QIR_NODST_2(TEX_DIRECT)
491 QIR_ALU0(FRAG_X)
492 QIR_ALU0(FRAG_Y)
493 QIR_ALU0(FRAG_Z)
494 QIR_ALU0(FRAG_W)
495 QIR_ALU0(FRAG_REV_FLAG)
496 QIR_ALU0(TEX_RESULT)
497 QIR_ALU0(TLB_COLOR_READ)
498 QIR_ALU0(VPM_READ)
499 QIR_NODST_1(TLB_Z_WRITE)
500 QIR_NODST_1(TLB_DISCARD_SETUP)
501 QIR_NODST_1(TLB_STENCIL_SETUP)
502
503 static inline struct qreg
504 qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
505 {
506 struct qreg t = qir_get_temp(c);
507 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
508 return t;
509 }
510
511 static inline struct qreg
512 qir_SEL_X_0_COND(struct vc4_compile *c, int i)
513 {
514 struct qreg t = qir_get_temp(c);
515 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
516 return t;
517 }
518
519 static inline struct qreg
520 qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
521 {
522 struct qreg t = qir_get_temp(c);
523 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef));
524 return t;
525 }
526
527 static inline struct qreg
528 qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
529 {
530 struct qreg t = qir_get_temp(c);
531 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef));
532 return t;
533 }
534
535 static inline struct qreg
536 qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
537 {
538 struct qreg t = qir_get_temp(c);
539 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef));
540 return t;
541 }
542
543 static inline struct qreg
544 qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
545 {
546 struct qreg t = qir_get_temp(c);
547 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef));
548 return t;
549 }
550
551 static inline struct qreg
552 qir_PACK_8_F(struct vc4_compile *c, struct qreg rest, struct qreg val, int chan)
553 {
554 struct qreg t = qir_get_temp(c);
555 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, t, rest, val));
556 return t;
557 }
558
559 static inline struct qreg
560 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
561 {
562 return qir_EXP2(c, qir_FMUL(c,
563 y,
564 qir_LOG2(c, x)));
565 }
566
567 static inline void
568 qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
569 {
570 static const struct qreg vpm = { QFILE_VPM, 0 };
571 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
572 }
573
574 #endif /* VC4_QIR_H */