src/gallium/drivers/vc4/vc4_qir.h

   1 /*
   2  * Copyright © 2014 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef VC4_QIR_H
  25 #define VC4_QIR_H
  26
  27 #include <stdio.h>
  28 #include <stdlib.h>
  29 #include <stdbool.h>
  30 #include <stdint.h>
  31 #include <string.h>
  32
  33 #include "util/u_simple_list.h"
  34 #include "tgsi/tgsi_parse.h"
  35
  36 enum qfile {
  37         QFILE_NULL,
  38         QFILE_TEMP,
  39         QFILE_VARY,
  40         QFILE_UNIF,
  41 };
  42
  43 struct qreg {
  44         enum qfile file;
  45         uint32_t index;
  46 };
  47
  48 enum qop {
  49         QOP_UNDEF,
  50         QOP_MOV,
  51         QOP_FADD,
  52         QOP_FSUB,
  53         QOP_FMUL,
  54         QOP_MUL24,
  55         QOP_FMIN,
  56         QOP_FMAX,
  57         QOP_FMINABS,
  58         QOP_FMAXABS,
  59         QOP_ADD,
  60         QOP_SUB,
  61         QOP_SHL,
  62         QOP_SHR,
  63         QOP_ASR,
  64         QOP_MIN,
  65         QOP_MAX,
  66         QOP_AND,
  67         QOP_OR,
  68         QOP_XOR,
  69         QOP_NOT,
  70
  71         /* Sets the flag register according to src. */
  72         QOP_SF,
  73
  74         /* Note: Orderings of these compares must be the same as in
  75          * qpu_defines.h.  Selects the src[0] if the ns flag bit is set,
  76          * otherwise 0. */
  77         QOP_SEL_X_0_ZS,
  78         QOP_SEL_X_0_ZC,
  79         QOP_SEL_X_0_NS,
  80         QOP_SEL_X_0_NC,
  81         /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
  82         QOP_SEL_X_Y_ZS,
  83         QOP_SEL_X_Y_ZC,
  84         QOP_SEL_X_Y_NS,
  85         QOP_SEL_X_Y_NC,
  86
  87         QOP_FTOI,
  88         QOP_ITOF,
  89         QOP_RCP,
  90         QOP_RSQ,
  91         QOP_EXP2,
  92         QOP_LOG2,
  93         QOP_VW_SETUP,
  94         QOP_VR_SETUP,
  95         QOP_PACK_SCALED,
  96         QOP_PACK_COLORS,
  97         QOP_VPM_WRITE,
  98         QOP_VPM_READ,
  99         QOP_TLB_DISCARD_SETUP,
 100         QOP_TLB_STENCIL_SETUP,
 101         QOP_TLB_Z_WRITE,
 102         QOP_TLB_COLOR_WRITE,
 103         QOP_TLB_COLOR_READ,
 104         QOP_VARY_ADD_C,
 105
 106         QOP_FRAG_X,
 107         QOP_FRAG_Y,
 108         QOP_FRAG_Z,
 109         QOP_FRAG_W,
 110
 111         /** Texture x coordinate parameter write */
 112         QOP_TEX_S,
 113         /** Texture y coordinate parameter write */
 114         QOP_TEX_T,
 115         /** Texture border color parameter or cube map z coordinate write */
 116         QOP_TEX_R,
 117         /** Texture LOD bias parameter write */
 118         QOP_TEX_B,
 119         /**
 120          * Signal of texture read being necessary and then reading r4 into
 121          * the destination
 122          */
 123         QOP_TEX_RESULT,
 124         QOP_R4_UNPACK_A,
 125         QOP_R4_UNPACK_B,
 126         QOP_R4_UNPACK_C,
 127         QOP_R4_UNPACK_D
 128 };
 129
 130 struct simple_node {
 131         struct simple_node *next;
 132         struct simple_node *prev;
 133 };
 134
 135 struct qinst {
 136         struct simple_node link;
 137
 138         enum qop op;
 139         struct qreg dst;
 140         struct qreg *src;
 141 };
 142
 143 enum qstage {
 144         /**
 145          * Coordinate shader, runs during binning, before the VS, and just
 146          * outputs position.
 147          */
 148         QSTAGE_COORD,
 149         QSTAGE_VERT,
 150         QSTAGE_FRAG,
 151 };
 152
 153 enum quniform_contents {
 154         /**
 155          * Indicates that a constant 32-bit value is copied from the program's
 156          * uniform contents.
 157          */
 158         QUNIFORM_CONSTANT,
 159         /**
 160          * Indicates that the program's uniform contents are used as an index
 161          * into the GL uniform storage.
 162          */
 163         QUNIFORM_UNIFORM,
 164
 165         /** @{
 166          * Scaling factors from clip coordinates to relative to the viewport
 167          * center.
 168          *
 169          * This is used by the coordinate and vertex shaders to produce the
 170          * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
 171          * point offsets from the viewport ccenter.
 172          */
 173         QUNIFORM_VIEWPORT_X_SCALE,
 174         QUNIFORM_VIEWPORT_Y_SCALE,
 175         /** @} */
 176
 177         QUNIFORM_VIEWPORT_Z_OFFSET,
 178         QUNIFORM_VIEWPORT_Z_SCALE,
 179
 180         /**
 181          * A reference to a texture config parameter 0 uniform.
 182          *
 183          * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
 184          * defines texture type, miplevels, and such.  It will be found as a
 185          * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
 186          */
 187         QUNIFORM_TEXTURE_CONFIG_P0,
 188
 189         /**
 190          * A reference to a texture config parameter 1 uniform.
 191          *
 192          * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
 193          * defines texture width, height, filters, and wrap modes.  It will be
 194          * found as a parameter to the second QOP_TEX_[STRB] instruction in a
 195          * sequence.
 196          */
 197         QUNIFORM_TEXTURE_CONFIG_P1,
 198
 199         QUNIFORM_TEXRECT_SCALE_X,
 200         QUNIFORM_TEXRECT_SCALE_Y,
 201
 202         QUNIFORM_BLEND_CONST_COLOR,
 203         QUNIFORM_STENCIL,
 204 };
 205
 206 struct vc4_compile {
 207         struct tgsi_parse_context parser;
 208         struct qreg *temps;
 209         struct qreg *inputs;
 210         struct qreg *outputs;
 211         struct qreg *uniforms;
 212         struct qreg *consts;
 213         uint32_t temps_array_size;
 214         uint32_t inputs_array_size;
 215         uint32_t outputs_array_size;
 216         uint32_t uniforms_array_size;
 217         uint32_t consts_array_size;
 218         uint32_t num_consts;
 219         struct qreg line_x, point_x, point_y;
 220         struct qreg discard;
 221
 222         struct pipe_shader_state *shader_state;
 223         struct vc4_key *key;
 224         struct vc4_fs_key *fs_key;
 225         struct vc4_vs_key *vs_key;
 226
 227         uint32_t *uniform_data;
 228         enum quniform_contents *uniform_contents;
 229         uint32_t num_uniforms;
 230         uint32_t num_outputs;
 231         uint32_t num_texture_samples;
 232         uint32_t output_position_index;
 233         uint32_t output_color_index;
 234
 235         struct qreg undef;
 236         enum qstage stage;
 237         uint32_t num_temps;
 238         struct simple_node instructions;
 239         uint32_t immediates[1024];
 240
 241         struct simple_node qpu_inst_list;
 242         uint64_t *qpu_insts;
 243         uint32_t qpu_inst_count;
 244         uint32_t qpu_inst_size;
 245         uint32_t num_inputs;
 246 };
 247
 248 struct vc4_compile *qir_compile_init(void);
 249 void qir_compile_destroy(struct vc4_compile *c);
 250 struct qinst *qir_inst(enum qop op, struct qreg dst,
 251                        struct qreg src0, struct qreg src1);
 252 struct qinst *qir_inst4(enum qop op, struct qreg dst,
 253                         struct qreg a,
 254                         struct qreg b,
 255                         struct qreg c,
 256                         struct qreg d);
 257 void qir_remove_instruction(struct qinst *qinst);
 258 void qir_reorder_uniforms(struct vc4_compile *c);
 259 void qir_emit(struct vc4_compile *c, struct qinst *inst);
 260 struct qreg qir_get_temp(struct vc4_compile *c);
 261 int qir_get_op_nsrc(enum qop qop);
 262 bool qir_reg_equals(struct qreg a, struct qreg b);
 263 bool qir_has_side_effects(struct qinst *inst);
 264 bool qir_depends_on_flags(struct qinst *inst);
 265 bool qir_writes_r4(struct qinst *inst);
 266 bool qir_reads_r4(struct qinst *inst);
 267
 268 void qir_dump(struct vc4_compile *c);
 269 void qir_dump_inst(struct qinst *inst);
 270 const char *qir_get_stage_name(enum qstage stage);
 271
 272 void qir_optimize(struct vc4_compile *c);
 273 bool qir_opt_algebraic(struct vc4_compile *c);
 274 bool qir_opt_copy_propagation(struct vc4_compile *c);
 275 bool qir_opt_cse(struct vc4_compile *c);
 276 bool qir_opt_dead_code(struct vc4_compile *c);
 277
 278 #define QIR_ALU0(name)                                                   \
 279 static inline struct qreg                                                \
 280 qir_##name(struct vc4_compile *c)                                        \
 281 {                                                                        \
 282         struct qreg t = qir_get_temp(c);                                 \
 283         qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef));        \
 284         return t;                                                        \
 285 }
 286
 287 #define QIR_ALU1(name)                                                   \
 288 static inline struct qreg                                                \
 289 qir_##name(struct vc4_compile *c, struct qreg a)                         \
 290 {                                                                        \
 291         struct qreg t = qir_get_temp(c);                                 \
 292         qir_emit(c, qir_inst(QOP_##name, t, a, c->undef));               \
 293         return t;                                                        \
 294 }
 295
 296 #define QIR_ALU2(name)                                                   \
 297 static inline struct qreg                                                \
 298 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b)          \
 299 {                                                                        \
 300         struct qreg t = qir_get_temp(c);                                 \
 301         qir_emit(c, qir_inst(QOP_##name, t, a, b));                      \
 302         return t;                                                        \
 303 }
 304
 305 #define QIR_NODST_1(name)                                               \
 306 static inline void                                                      \
 307 qir_##name(struct vc4_compile *c, struct qreg a)                        \
 308 {                                                                       \
 309         qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef));       \
 310 }
 311
 312 #define QIR_NODST_2(name)                                               \
 313 static inline void                                                      \
 314 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b)         \
 315 {                                                                       \
 316         qir_emit(c, qir_inst(QOP_##name, c->undef, a, b));       \
 317 }
 318
 319 QIR_ALU1(MOV)
 320 QIR_ALU2(FADD)
 321 QIR_ALU2(FSUB)
 322 QIR_ALU2(FMUL)
 323 QIR_ALU2(MUL24)
 324 QIR_NODST_1(SF)
 325 QIR_ALU1(SEL_X_0_ZS)
 326 QIR_ALU1(SEL_X_0_ZC)
 327 QIR_ALU1(SEL_X_0_NS)
 328 QIR_ALU1(SEL_X_0_NC)
 329 QIR_ALU2(SEL_X_Y_ZS)
 330 QIR_ALU2(SEL_X_Y_ZC)
 331 QIR_ALU2(SEL_X_Y_NS)
 332 QIR_ALU2(SEL_X_Y_NC)
 333 QIR_ALU2(FMIN)
 334 QIR_ALU2(FMAX)
 335 QIR_ALU2(FMINABS)
 336 QIR_ALU2(FMAXABS)
 337 QIR_ALU1(FTOI)
 338 QIR_ALU1(ITOF)
 339
 340 QIR_ALU2(ADD)
 341 QIR_ALU2(SUB)
 342 QIR_ALU2(SHL)
 343 QIR_ALU2(SHR)
 344 QIR_ALU2(ASR)
 345 QIR_ALU2(MIN)
 346 QIR_ALU2(MAX)
 347 QIR_ALU2(AND)
 348 QIR_ALU2(OR)
 349 QIR_ALU2(XOR)
 350 QIR_ALU1(NOT)
 351
 352 QIR_ALU1(RCP)
 353 QIR_ALU1(RSQ)
 354 QIR_ALU1(EXP2)
 355 QIR_ALU1(LOG2)
 356 QIR_ALU2(PACK_SCALED)
 357 QIR_ALU1(VARY_ADD_C)
 358 QIR_NODST_1(VPM_WRITE)
 359 QIR_NODST_2(TEX_S)
 360 QIR_NODST_2(TEX_T)
 361 QIR_NODST_2(TEX_R)
 362 QIR_NODST_2(TEX_B)
 363 QIR_ALU0(FRAG_X)
 364 QIR_ALU0(FRAG_Y)
 365 QIR_ALU0(FRAG_Z)
 366 QIR_ALU0(FRAG_W)
 367 QIR_ALU0(TEX_RESULT)
 368 QIR_ALU0(TLB_COLOR_READ)
 369 QIR_NODST_1(TLB_Z_WRITE)
 370 QIR_NODST_1(TLB_DISCARD_SETUP)
 371 QIR_NODST_1(TLB_STENCIL_SETUP)
 372
 373 static inline struct qreg
 374 qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
 375 {
 376         struct qreg t = qir_get_temp(c);
 377         qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
 378         return t;
 379 }
 380
 381 static inline struct qreg
 382 qir_SEL_X_0_COND(struct vc4_compile *c, int i)
 383 {
 384         struct qreg t = qir_get_temp(c);
 385         qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
 386         return t;
 387 }
 388
 389 #endif /* VC4_QIR_H */