2 * Copyright © 2014 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
34 #include "util/macros.h"
35 #include "glsl/nir/nir.h"
36 #include "util/list.h"
37 #include "util/u_math.h"
39 #include "vc4_screen.h"
40 #include "vc4_qpu_defines.h"
41 #include "pipe/p_state.h"
53 * Stores an immediate value in the index field that can be turned
54 * into a small immediate field by qpu_encode_small_immediate().
95 /* Note: Orderings of these compares must be the same as in
96 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
104 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
120 QOP_TLB_DISCARD_SETUP
,
121 QOP_TLB_STENCIL_SETUP
,
133 /** Texture x coordinate parameter write */
135 /** Texture y coordinate parameter write */
137 /** Texture border color parameter or cube map z coordinate write */
139 /** Texture LOD bias parameter write */
143 * Texture-unit 4-byte read with address provided direct in S
146 * The first operand is the offset from the start of the UBO, and the
147 * second is the uniform that has the UBO's base pointer.
152 * Signal of texture read being necessary and then reading r4 into
158 struct queued_qpu_inst
{
159 struct list_head link
;
164 struct list_head link
;
174 * Coordinate shader, runs during binning, before the VS, and just
182 enum quniform_contents
{
184 * Indicates that a constant 32-bit value is copied from the program's
189 * Indicates that the program's uniform contents are used as an index
190 * into the GL uniform storage.
195 * Scaling factors from clip coordinates to relative to the viewport
198 * This is used by the coordinate and vertex shaders to produce the
199 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
200 * point offsets from the viewport ccenter.
202 QUNIFORM_VIEWPORT_X_SCALE
,
203 QUNIFORM_VIEWPORT_Y_SCALE
,
206 QUNIFORM_VIEWPORT_Z_OFFSET
,
207 QUNIFORM_VIEWPORT_Z_SCALE
,
209 QUNIFORM_USER_CLIP_PLANE
,
212 * A reference to a texture config parameter 0 uniform.
214 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
215 * defines texture type, miplevels, and such. It will be found as a
216 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
218 QUNIFORM_TEXTURE_CONFIG_P0
,
221 * A reference to a texture config parameter 1 uniform.
223 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
224 * defines texture width, height, filters, and wrap modes. It will be
225 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
228 QUNIFORM_TEXTURE_CONFIG_P1
,
230 /** A reference to a texture config parameter 2 cubemap stride uniform */
231 QUNIFORM_TEXTURE_CONFIG_P2
,
235 QUNIFORM_TEXRECT_SCALE_X
,
236 QUNIFORM_TEXRECT_SCALE_Y
,
238 QUNIFORM_TEXTURE_BORDER_COLOR
,
240 QUNIFORM_BLEND_CONST_COLOR_X
,
241 QUNIFORM_BLEND_CONST_COLOR_Y
,
242 QUNIFORM_BLEND_CONST_COLOR_Z
,
243 QUNIFORM_BLEND_CONST_COLOR_W
,
244 QUNIFORM_BLEND_CONST_COLOR_RGBA
,
245 QUNIFORM_BLEND_CONST_COLOR_AAAA
,
252 struct vc4_varying_slot
{
257 struct vc4_compiler_ubo_range
{
259 * offset in bytes from the start of the ubo where this range is
262 * Only set once used is set.
267 * offset in bytes from the start of the gallium uniforms where the
272 /** size in bytes of this ubo range */
276 * Set if this range is used by the shader for indirect uniforms
283 struct vc4_uncompiled_shader
*shader_state
;
285 enum pipe_format format
;
286 unsigned compare_mode
:1;
287 unsigned compare_func
:3;
291 } tex
[VC4_MAX_TEXTURE_SAMPLERS
];
297 enum pipe_format color_format
;
299 bool stencil_enabled
;
300 bool stencil_twoside
;
301 bool stencil_full_writemasks
;
305 bool point_coord_upper_left
;
307 uint8_t alpha_test_func
;
308 uint8_t logicop_func
;
309 uint32_t point_sprite_mask
;
311 struct pipe_rt_blend_state blend
;
318 * This is a proxy for the array of FS input semantics, which is
319 * larger than we would want to put in the key.
321 uint64_t compiled_fs_id
;
323 enum pipe_format attr_formats
[8];
325 bool per_vertex_point_size
;
329 struct vc4_context
*vc4
;
331 nir_function_impl
*impl
;
332 struct exec_list
*cf_node_list
;
335 * Mapping from nir_register * or nir_ssa_def * to array of struct
336 * qreg for the values.
338 struct hash_table
*def_ht
;
340 /* For each temp, the instruction generating its value. */
342 uint32_t defs_array_size
;
345 * Inputs to the shader, arranged by TGSI declaration order.
347 * Not all fragment shader QFILE_VARY reads are present in this array.
350 struct qreg
*outputs
;
351 uint32_t inputs_array_size
;
352 uint32_t outputs_array_size
;
353 uint32_t uniforms_array_size
;
355 struct vc4_compiler_ubo_range
*ubo_ranges
;
356 uint32_t ubo_ranges_array_size
;
357 /** Number of uniform areas declared in ubo_ranges. */
358 uint32_t num_uniform_ranges
;
359 /** Number of uniform areas used for indirect addressed loads. */
360 uint32_t num_ubo_ranges
;
361 uint32_t next_ubo_dst_offset
;
363 struct qreg line_x
, point_x
, point_y
;
366 uint8_t vattr_sizes
[8];
369 * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads.
371 * This includes those that aren't part of the VPM varyings, like
372 * point/line coordinates.
374 struct vc4_varying_slot
*input_slots
;
375 uint32_t num_input_slots
;
376 uint32_t input_slots_array_size
;
379 * An entry per outputs[] in the VS indicating what the VARYING_SLOT_*
380 * of the output is. Used to emit from the VS in the order that the
383 struct vc4_varying_slot
*output_slots
;
385 struct pipe_shader_state
*shader_state
;
387 struct vc4_fs_key
*fs_key
;
388 struct vc4_vs_key
*vs_key
;
390 uint32_t *uniform_data
;
391 enum quniform_contents
*uniform_contents
;
392 uint32_t uniform_array_size
;
393 uint32_t num_uniforms
;
394 uint32_t num_outputs
;
395 uint32_t num_texture_samples
;
396 uint32_t output_position_index
;
397 uint32_t output_color_index
;
398 uint32_t output_point_size_index
;
403 struct list_head instructions
;
404 uint32_t immediates
[1024];
406 struct list_head qpu_inst_list
;
408 uint32_t qpu_inst_count
;
409 uint32_t qpu_inst_size
;
416 /* Special nir_load_input intrinsic index for loading the current TLB
419 #define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000
421 /* Special offset for nir_load_uniform values to get a QUNIFORM_*
422 * state-dependent value.
424 #define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000
426 struct vc4_compile
*qir_compile_init(void);
427 void qir_compile_destroy(struct vc4_compile
*c
);
428 struct qinst
*qir_inst(enum qop op
, struct qreg dst
,
429 struct qreg src0
, struct qreg src1
);
430 struct qinst
*qir_inst4(enum qop op
, struct qreg dst
,
435 void qir_remove_instruction(struct vc4_compile
*c
, struct qinst
*qinst
);
436 struct qreg
qir_uniform(struct vc4_compile
*c
,
437 enum quniform_contents contents
,
439 void qir_reorder_uniforms(struct vc4_compile
*c
);
441 void qir_emit(struct vc4_compile
*c
, struct qinst
*inst
);
442 static inline void qir_emit_nodef(struct vc4_compile
*c
, struct qinst
*inst
)
444 list_addtail(&inst
->link
, &c
->instructions
);
447 struct qreg
qir_get_temp(struct vc4_compile
*c
);
448 int qir_get_op_nsrc(enum qop qop
);
449 bool qir_reg_equals(struct qreg a
, struct qreg b
);
450 bool qir_has_side_effects(struct vc4_compile
*c
, struct qinst
*inst
);
451 bool qir_has_side_effect_reads(struct vc4_compile
*c
, struct qinst
*inst
);
452 bool qir_is_multi_instruction(struct qinst
*inst
);
453 bool qir_is_mul(struct qinst
*inst
);
454 bool qir_is_raw_mov(struct qinst
*inst
);
455 bool qir_is_tex(struct qinst
*inst
);
456 bool qir_is_float_input(struct qinst
*inst
);
457 bool qir_depends_on_flags(struct qinst
*inst
);
458 bool qir_writes_r4(struct qinst
*inst
);
459 struct qreg
qir_follow_movs(struct vc4_compile
*c
, struct qreg reg
);
461 void qir_dump(struct vc4_compile
*c
);
462 void qir_dump_inst(struct vc4_compile
*c
, struct qinst
*inst
);
463 const char *qir_get_stage_name(enum qstage stage
);
465 void qir_optimize(struct vc4_compile
*c
);
466 bool qir_opt_algebraic(struct vc4_compile
*c
);
467 bool qir_opt_constant_folding(struct vc4_compile
*c
);
468 bool qir_opt_copy_propagation(struct vc4_compile
*c
);
469 bool qir_opt_cse(struct vc4_compile
*c
);
470 bool qir_opt_dead_code(struct vc4_compile
*c
);
471 bool qir_opt_small_immediates(struct vc4_compile
*c
);
472 bool qir_opt_vpm_writes(struct vc4_compile
*c
);
473 void vc4_nir_lower_blend(struct vc4_compile
*c
);
474 void vc4_nir_lower_io(struct vc4_compile
*c
);
475 nir_ssa_def
*vc4_nir_get_state_uniform(struct nir_builder
*b
,
476 enum quniform_contents contents
);
477 nir_ssa_def
*vc4_nir_get_swizzled_channel(struct nir_builder
*b
,
478 nir_ssa_def
**srcs
, int swiz
);
479 void qir_lower_uniforms(struct vc4_compile
*c
);
481 void qpu_schedule_instructions(struct vc4_compile
*c
);
483 void qir_SF(struct vc4_compile
*c
, struct qreg src
);
485 static inline struct qreg
486 qir_uniform_ui(struct vc4_compile
*c
, uint32_t ui
)
488 return qir_uniform(c
, QUNIFORM_CONSTANT
, ui
);
491 static inline struct qreg
492 qir_uniform_f(struct vc4_compile
*c
, float f
)
494 return qir_uniform(c
, QUNIFORM_CONSTANT
, fui(f
));
497 #define QIR_ALU0(name) \
498 static inline struct qreg \
499 qir_##name(struct vc4_compile *c) \
501 struct qreg t = qir_get_temp(c); \
502 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
506 #define QIR_ALU1(name) \
507 static inline struct qreg \
508 qir_##name(struct vc4_compile *c, struct qreg a) \
510 struct qreg t = qir_get_temp(c); \
511 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
515 qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
518 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
521 #define QIR_ALU2(name) \
522 static inline struct qreg \
523 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
525 struct qreg t = qir_get_temp(c); \
526 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
530 qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
531 struct qreg a, struct qreg b) \
533 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \
536 #define QIR_NODST_1(name) \
538 qir_##name(struct vc4_compile *c, struct qreg a) \
540 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
543 #define QIR_NODST_2(name) \
545 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
547 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
550 #define QIR_PACK(name) \
551 static inline struct qreg \
552 qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \
554 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
610 QIR_NODST_2(TEX_DIRECT
)
615 QIR_ALU0(FRAG_REV_FLAG
)
617 QIR_ALU0(TLB_COLOR_READ
)
618 QIR_NODST_1(TLB_COLOR_WRITE
)
619 QIR_NODST_1(TLB_Z_WRITE
)
620 QIR_NODST_1(TLB_DISCARD_SETUP
)
621 QIR_NODST_1(TLB_STENCIL_SETUP
)
623 static inline struct qreg
624 qir_UNPACK_8_F(struct vc4_compile
*c
, struct qreg src
, int i
)
626 struct qreg t
= qir_FMOV(c
, src
);
627 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_8A
+ i
;
631 static inline struct qreg
632 qir_UNPACK_8_I(struct vc4_compile
*c
, struct qreg src
, int i
)
634 struct qreg t
= qir_MOV(c
, src
);
635 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_8A
+ i
;
639 static inline struct qreg
640 qir_UNPACK_16_F(struct vc4_compile
*c
, struct qreg src
, int i
)
642 struct qreg t
= qir_FMOV(c
, src
);
643 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_16A
+ i
;
647 static inline struct qreg
648 qir_UNPACK_16_I(struct vc4_compile
*c
, struct qreg src
, int i
)
650 struct qreg t
= qir_MOV(c
, src
);
651 c
->defs
[t
.index
]->src
[0].pack
= QPU_UNPACK_16A
+ i
;
656 qir_PACK_8_F(struct vc4_compile
*c
, struct qreg dest
, struct qreg val
, int chan
)
659 dest
.pack
= QPU_PACK_MUL_8A
+ chan
;
660 qir_emit(c
, qir_inst(QOP_MMOV
, dest
, val
, c
->undef
));
661 if (dest
.file
== QFILE_TEMP
)
662 c
->defs
[dest
.index
] = NULL
;
665 static inline struct qreg
666 qir_PACK_8888_F(struct vc4_compile
*c
, struct qreg val
)
668 struct qreg dest
= qir_MMOV(c
, val
);
669 c
->defs
[dest
.index
]->dst
.pack
= QPU_PACK_MUL_8888
;
673 static inline struct qreg
674 qir_POW(struct vc4_compile
*c
, struct qreg x
, struct qreg y
)
676 return qir_EXP2(c
, qir_FMUL(c
,
682 qir_VPM_WRITE(struct vc4_compile
*c
, struct qreg val
)
684 static const struct qreg vpm
= { QFILE_VPM
, 0 };
685 qir_emit(c
, qir_inst(QOP_MOV
, vpm
, val
, c
->undef
));
688 #endif /* VC4_QIR_H */