2 * Copyright © 2014 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
33 #include "util/u_simple_list.h"
34 #include "tgsi/tgsi_parse.h"
71 /* Sets the flag register according to src. */
74 /* Note: Orderings of these compares must be the same as in
75 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
81 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
99 QOP_TLB_DISCARD_SETUP
,
100 QOP_TLB_STENCIL_SETUP
,
117 /** Texture x coordinate parameter write */
119 /** Texture y coordinate parameter write */
121 /** Texture border color parameter or cube map z coordinate write */
123 /** Texture LOD bias parameter write */
126 * Signal of texture read being necessary and then reading r4 into
137 struct simple_node
*next
;
138 struct simple_node
*prev
;
142 struct simple_node link
;
151 * Coordinate shader, runs during binning, before the VS, and just
159 enum quniform_contents
{
161 * Indicates that a constant 32-bit value is copied from the program's
166 * Indicates that the program's uniform contents are used as an index
167 * into the GL uniform storage.
172 * Scaling factors from clip coordinates to relative to the viewport
175 * This is used by the coordinate and vertex shaders to produce the
176 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
177 * point offsets from the viewport ccenter.
179 QUNIFORM_VIEWPORT_X_SCALE
,
180 QUNIFORM_VIEWPORT_Y_SCALE
,
183 QUNIFORM_VIEWPORT_Z_OFFSET
,
184 QUNIFORM_VIEWPORT_Z_SCALE
,
187 * A reference to a texture config parameter 0 uniform.
189 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
190 * defines texture type, miplevels, and such. It will be found as a
191 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
193 QUNIFORM_TEXTURE_CONFIG_P0
,
196 * A reference to a texture config parameter 1 uniform.
198 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
199 * defines texture width, height, filters, and wrap modes. It will be
200 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
203 QUNIFORM_TEXTURE_CONFIG_P1
,
205 /** A reference to a texture config parameter 2 cubemap stride uniform */
206 QUNIFORM_TEXTURE_CONFIG_P2
,
208 QUNIFORM_TEXRECT_SCALE_X
,
209 QUNIFORM_TEXRECT_SCALE_Y
,
211 QUNIFORM_TEXTURE_BORDER_COLOR
,
213 QUNIFORM_BLEND_CONST_COLOR
,
219 struct vc4_varying_semantic
{
226 struct vc4_context
*vc4
;
227 struct tgsi_parse_context parser
;
230 * Inputs to the shader, arranged by TGSI declaration order.
232 * Not all fragment shader QFILE_VARY reads are present in this array.
235 struct qreg
*outputs
;
237 uint32_t temps_array_size
;
238 uint32_t inputs_array_size
;
239 uint32_t outputs_array_size
;
240 uint32_t uniforms_array_size
;
241 uint32_t consts_array_size
;
243 struct qreg line_x
, point_x
, point_y
;
247 * Array of the TGSI semantics of all FS QFILE_VARY reads.
249 * This includes those that aren't part of the VPM varyings, like
250 * point/line coordinates.
252 struct vc4_varying_semantic
*input_semantics
;
253 uint32_t num_input_semantics
;
254 uint32_t input_semantics_array_size
;
257 * An entry per outputs[] in the VS indicating what the semantic of
258 * the output is. Used to emit from the VS in the order that the FS
261 struct vc4_varying_semantic
*output_semantics
;
263 struct pipe_shader_state
*shader_state
;
265 struct vc4_fs_key
*fs_key
;
266 struct vc4_vs_key
*vs_key
;
268 uint32_t *uniform_data
;
269 enum quniform_contents
*uniform_contents
;
270 uint32_t uniform_array_size
;
271 uint32_t num_uniforms
;
272 uint32_t num_outputs
;
273 uint32_t num_texture_samples
;
274 uint32_t output_position_index
;
275 uint32_t output_color_index
;
276 uint32_t output_point_size_index
;
281 struct simple_node instructions
;
282 uint32_t immediates
[1024];
284 struct simple_node qpu_inst_list
;
286 uint32_t qpu_inst_count
;
287 uint32_t qpu_inst_size
;
291 struct vc4_compile
*qir_compile_init(void);
292 void qir_compile_destroy(struct vc4_compile
*c
);
293 struct qinst
*qir_inst(enum qop op
, struct qreg dst
,
294 struct qreg src0
, struct qreg src1
);
295 struct qinst
*qir_inst4(enum qop op
, struct qreg dst
,
300 void qir_remove_instruction(struct qinst
*qinst
);
301 void qir_reorder_uniforms(struct vc4_compile
*c
);
302 void qir_emit(struct vc4_compile
*c
, struct qinst
*inst
);
303 struct qreg
qir_get_temp(struct vc4_compile
*c
);
304 int qir_get_op_nsrc(enum qop qop
);
305 bool qir_reg_equals(struct qreg a
, struct qreg b
);
306 bool qir_has_side_effects(struct qinst
*inst
);
307 bool qir_depends_on_flags(struct qinst
*inst
);
308 bool qir_writes_r4(struct qinst
*inst
);
309 bool qir_reads_r4(struct qinst
*inst
);
311 void qir_dump(struct vc4_compile
*c
);
312 void qir_dump_inst(struct vc4_compile
*c
, struct qinst
*inst
);
313 const char *qir_get_stage_name(enum qstage stage
);
315 void qir_optimize(struct vc4_compile
*c
);
316 bool qir_opt_algebraic(struct vc4_compile
*c
);
317 bool qir_opt_copy_propagation(struct vc4_compile
*c
);
318 bool qir_opt_cse(struct vc4_compile
*c
);
319 bool qir_opt_dead_code(struct vc4_compile
*c
);
321 #define QIR_ALU0(name) \
322 static inline struct qreg \
323 qir_##name(struct vc4_compile *c) \
325 struct qreg t = qir_get_temp(c); \
326 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
330 #define QIR_ALU1(name) \
331 static inline struct qreg \
332 qir_##name(struct vc4_compile *c, struct qreg a) \
334 struct qreg t = qir_get_temp(c); \
335 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
339 #define QIR_ALU2(name) \
340 static inline struct qreg \
341 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
343 struct qreg t = qir_get_temp(c); \
344 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
348 #define QIR_NODST_1(name) \
350 qir_##name(struct vc4_compile *c, struct qreg a) \
352 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
355 #define QIR_NODST_2(name) \
357 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
359 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
399 QIR_ALU2(PACK_SCALED
)
401 QIR_NODST_1(VPM_WRITE
)
410 QIR_ALU0(FRAG_REV_FLAG
)
412 QIR_ALU0(TLB_COLOR_READ
)
413 QIR_NODST_1(TLB_Z_WRITE
)
414 QIR_NODST_1(TLB_DISCARD_SETUP
)
415 QIR_NODST_1(TLB_STENCIL_SETUP
)
417 static inline struct qreg
418 qir_R4_UNPACK(struct vc4_compile
*c
, struct qreg r4
, int i
)
420 struct qreg t
= qir_get_temp(c
);
421 qir_emit(c
, qir_inst(QOP_R4_UNPACK_A
+ i
, t
, r4
, c
->undef
));
425 static inline struct qreg
426 qir_SEL_X_0_COND(struct vc4_compile
*c
, int i
)
428 struct qreg t
= qir_get_temp(c
);
429 qir_emit(c
, qir_inst(QOP_R4_UNPACK_A
+ i
, t
, c
->undef
, c
->undef
));
433 static inline struct qreg
434 qir_UNPACK_8(struct vc4_compile
*c
, struct qreg src
, int i
)
436 struct qreg t
= qir_get_temp(c
);
437 qir_emit(c
, qir_inst(QOP_UNPACK_8A
+ i
, t
, src
, c
->undef
));
441 static inline struct qreg
442 qir_POW(struct vc4_compile
*c
, struct qreg x
, struct qreg y
)
444 return qir_EXP2(c
, qir_FMUL(c
,
449 #endif /* VC4_QIR_H */