2 * Copyright © 2014 Broadcom
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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34 #include "util/macros.h"
35 #include "glsl/nir/nir.h"
36 #include "util/list.h"
37 #include "util/u_math.h"
47 * Stores an immediate value in the index field that can be turned
48 * into a small immediate field by qpu_encode_small_immediate().
81 /* Note: Orderings of these compares must be the same as in
82 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
88 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
108 QOP_TLB_DISCARD_SETUP
,
109 QOP_TLB_STENCIL_SETUP
,
135 /** Texture x coordinate parameter write */
137 /** Texture y coordinate parameter write */
139 /** Texture border color parameter or cube map z coordinate write */
141 /** Texture LOD bias parameter write */
145 * Texture-unit 4-byte read with address provided direct in S
148 * The first operand is the offset from the start of the UBO, and the
149 * second is the uniform that has the UBO's base pointer.
154 * Signal of texture read being necessary and then reading r4 into
164 struct queued_qpu_inst
{
165 struct list_head link
;
170 struct list_head link
;
180 * Coordinate shader, runs during binning, before the VS, and just
188 enum quniform_contents
{
190 * Indicates that a constant 32-bit value is copied from the program's
195 * Indicates that the program's uniform contents are used as an index
196 * into the GL uniform storage.
201 * Scaling factors from clip coordinates to relative to the viewport
204 * This is used by the coordinate and vertex shaders to produce the
205 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
206 * point offsets from the viewport ccenter.
208 QUNIFORM_VIEWPORT_X_SCALE
,
209 QUNIFORM_VIEWPORT_Y_SCALE
,
212 QUNIFORM_VIEWPORT_Z_OFFSET
,
213 QUNIFORM_VIEWPORT_Z_SCALE
,
215 QUNIFORM_USER_CLIP_PLANE
,
218 * A reference to a texture config parameter 0 uniform.
220 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
221 * defines texture type, miplevels, and such. It will be found as a
222 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
224 QUNIFORM_TEXTURE_CONFIG_P0
,
227 * A reference to a texture config parameter 1 uniform.
229 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
230 * defines texture width, height, filters, and wrap modes. It will be
231 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
234 QUNIFORM_TEXTURE_CONFIG_P1
,
236 /** A reference to a texture config parameter 2 cubemap stride uniform */
237 QUNIFORM_TEXTURE_CONFIG_P2
,
241 QUNIFORM_TEXRECT_SCALE_X
,
242 QUNIFORM_TEXRECT_SCALE_Y
,
244 QUNIFORM_TEXTURE_BORDER_COLOR
,
246 QUNIFORM_BLEND_CONST_COLOR
,
252 struct vc4_varying_semantic
{
258 struct vc4_compiler_ubo_range
{
260 * offset in bytes from the start of the ubo where this range is
263 * Only set once used is set.
268 * offset in bytes from the start of the gallium uniforms where the
273 /** size in bytes of this ubo range */
277 * Set if this range is used by the shader for indirect uniforms
284 struct vc4_context
*vc4
;
286 nir_function_impl
*impl
;
287 struct exec_list
*cf_node_list
;
290 * Mapping from nir_register * or nir_ssa_def * to array of struct
291 * qreg for the values.
293 struct hash_table
*def_ht
;
295 /* For each temp, the instruction generating its value. */
297 uint32_t defs_array_size
;
300 * Inputs to the shader, arranged by TGSI declaration order.
302 * Not all fragment shader QFILE_VARY reads are present in this array.
305 struct qreg
*outputs
;
306 uint32_t inputs_array_size
;
307 uint32_t outputs_array_size
;
308 uint32_t uniforms_array_size
;
310 struct vc4_compiler_ubo_range
*ubo_ranges
;
311 uint32_t ubo_ranges_array_size
;
312 /** Number of uniform areas declared in ubo_ranges. */
313 uint32_t num_uniform_ranges
;
314 /** Number of uniform areas used for indirect addressed loads. */
315 uint32_t num_ubo_ranges
;
316 uint32_t next_ubo_dst_offset
;
318 struct qreg line_x
, point_x
, point_y
;
321 uint8_t vattr_sizes
[8];
324 * Array of the TGSI semantics of all FS QFILE_VARY reads.
326 * This includes those that aren't part of the VPM varyings, like
327 * point/line coordinates.
329 struct vc4_varying_semantic
*input_semantics
;
330 uint32_t num_input_semantics
;
331 uint32_t input_semantics_array_size
;
334 * An entry per outputs[] in the VS indicating what the semantic of
335 * the output is. Used to emit from the VS in the order that the FS
338 struct vc4_varying_semantic
*output_semantics
;
340 struct pipe_shader_state
*shader_state
;
342 struct vc4_fs_key
*fs_key
;
343 struct vc4_vs_key
*vs_key
;
345 uint32_t *uniform_data
;
346 enum quniform_contents
*uniform_contents
;
347 uint32_t uniform_array_size
;
348 uint32_t num_uniforms
;
349 uint32_t num_outputs
;
350 uint32_t num_texture_samples
;
351 uint32_t output_position_index
;
352 uint32_t output_clipvertex_index
;
353 uint32_t output_color_index
;
354 uint32_t output_point_size_index
;
359 struct list_head instructions
;
360 uint32_t immediates
[1024];
362 struct list_head qpu_inst_list
;
364 uint32_t qpu_inst_count
;
365 uint32_t qpu_inst_size
;
372 struct vc4_compile
*qir_compile_init(void);
373 void qir_compile_destroy(struct vc4_compile
*c
);
374 struct qinst
*qir_inst(enum qop op
, struct qreg dst
,
375 struct qreg src0
, struct qreg src1
);
376 struct qinst
*qir_inst4(enum qop op
, struct qreg dst
,
381 void qir_remove_instruction(struct vc4_compile
*c
, struct qinst
*qinst
);
382 struct qreg
qir_uniform(struct vc4_compile
*c
,
383 enum quniform_contents contents
,
385 void qir_reorder_uniforms(struct vc4_compile
*c
);
386 void qir_emit(struct vc4_compile
*c
, struct qinst
*inst
);
387 struct qreg
qir_get_temp(struct vc4_compile
*c
);
388 int qir_get_op_nsrc(enum qop qop
);
389 bool qir_reg_equals(struct qreg a
, struct qreg b
);
390 bool qir_has_side_effects(struct vc4_compile
*c
, struct qinst
*inst
);
391 bool qir_has_side_effect_reads(struct vc4_compile
*c
, struct qinst
*inst
);
392 bool qir_is_multi_instruction(struct qinst
*inst
);
393 bool qir_is_tex(struct qinst
*inst
);
394 bool qir_depends_on_flags(struct qinst
*inst
);
395 bool qir_writes_r4(struct qinst
*inst
);
396 bool qir_reads_r4(struct qinst
*inst
);
397 bool qir_src_needs_a_file(struct qinst
*inst
);
398 struct qreg
qir_follow_movs(struct vc4_compile
*c
, struct qreg reg
);
400 void qir_dump(struct vc4_compile
*c
);
401 void qir_dump_inst(struct vc4_compile
*c
, struct qinst
*inst
);
402 const char *qir_get_stage_name(enum qstage stage
);
404 void qir_optimize(struct vc4_compile
*c
);
405 bool qir_opt_algebraic(struct vc4_compile
*c
);
406 bool qir_opt_constant_folding(struct vc4_compile
*c
);
407 bool qir_opt_copy_propagation(struct vc4_compile
*c
);
408 bool qir_opt_cse(struct vc4_compile
*c
);
409 bool qir_opt_dead_code(struct vc4_compile
*c
);
410 bool qir_opt_small_immediates(struct vc4_compile
*c
);
411 bool qir_opt_vpm_writes(struct vc4_compile
*c
);
412 void qir_lower_uniforms(struct vc4_compile
*c
);
414 void qpu_schedule_instructions(struct vc4_compile
*c
);
416 void qir_SF(struct vc4_compile
*c
, struct qreg src
);
418 static inline struct qreg
419 qir_uniform_ui(struct vc4_compile
*c
, uint32_t ui
)
421 return qir_uniform(c
, QUNIFORM_CONSTANT
, ui
);
424 static inline struct qreg
425 qir_uniform_f(struct vc4_compile
*c
, float f
)
427 return qir_uniform(c
, QUNIFORM_CONSTANT
, fui(f
));
430 #define QIR_ALU0(name) \
431 static inline struct qreg \
432 qir_##name(struct vc4_compile *c) \
434 struct qreg t = qir_get_temp(c); \
435 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
439 #define QIR_ALU1(name) \
440 static inline struct qreg \
441 qir_##name(struct vc4_compile *c, struct qreg a) \
443 struct qreg t = qir_get_temp(c); \
444 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
448 #define QIR_ALU2(name) \
449 static inline struct qreg \
450 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
452 struct qreg t = qir_get_temp(c); \
453 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
457 #define QIR_NODST_1(name) \
459 qir_##name(struct vc4_compile *c, struct qreg a) \
461 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
464 #define QIR_NODST_2(name) \
466 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
468 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
507 QIR_ALU2(PACK_SCALED
)
508 QIR_ALU1(PACK_8888_F
)
518 QIR_NODST_2(TEX_DIRECT
)
523 QIR_ALU0(FRAG_REV_FLAG
)
525 QIR_ALU0(TLB_COLOR_READ
)
526 QIR_NODST_1(TLB_Z_WRITE
)
527 QIR_NODST_1(TLB_DISCARD_SETUP
)
528 QIR_NODST_1(TLB_STENCIL_SETUP
)
530 static inline struct qreg
531 qir_R4_UNPACK(struct vc4_compile
*c
, struct qreg r4
, int i
)
533 struct qreg t
= qir_get_temp(c
);
534 qir_emit(c
, qir_inst(QOP_R4_UNPACK_A
+ i
, t
, r4
, c
->undef
));
538 static inline struct qreg
539 qir_SEL_X_0_COND(struct vc4_compile
*c
, int i
)
541 struct qreg t
= qir_get_temp(c
);
542 qir_emit(c
, qir_inst(QOP_R4_UNPACK_A
+ i
, t
, c
->undef
, c
->undef
));
546 static inline struct qreg
547 qir_UNPACK_8_F(struct vc4_compile
*c
, struct qreg src
, int i
)
549 struct qreg t
= qir_get_temp(c
);
550 qir_emit(c
, qir_inst(QOP_UNPACK_8A_F
+ i
, t
, src
, c
->undef
));
554 static inline struct qreg
555 qir_UNPACK_8_I(struct vc4_compile
*c
, struct qreg src
, int i
)
557 struct qreg t
= qir_get_temp(c
);
558 qir_emit(c
, qir_inst(QOP_UNPACK_8A_I
+ i
, t
, src
, c
->undef
));
562 static inline struct qreg
563 qir_UNPACK_16_F(struct vc4_compile
*c
, struct qreg src
, int i
)
565 struct qreg t
= qir_get_temp(c
);
566 qir_emit(c
, qir_inst(QOP_UNPACK_16A_F
+ i
, t
, src
, c
->undef
));
570 static inline struct qreg
571 qir_UNPACK_16_I(struct vc4_compile
*c
, struct qreg src
, int i
)
573 struct qreg t
= qir_get_temp(c
);
574 qir_emit(c
, qir_inst(QOP_UNPACK_16A_I
+ i
, t
, src
, c
->undef
));
578 static inline struct qreg
579 qir_PACK_8_F(struct vc4_compile
*c
, struct qreg rest
, struct qreg val
, int chan
)
581 struct qreg t
= qir_get_temp(c
);
582 qir_emit(c
, qir_inst(QOP_PACK_8A_F
+ chan
, t
, rest
, val
));
586 static inline struct qreg
587 qir_POW(struct vc4_compile
*c
, struct qreg x
, struct qreg y
)
589 return qir_EXP2(c
, qir_FMUL(c
,
595 qir_VPM_WRITE(struct vc4_compile
*c
, struct qreg val
)
597 static const struct qreg vpm
= { QFILE_VPM
, 0 };
598 qir_emit(c
, qir_inst(QOP_MOV
, vpm
, val
, c
->undef
));
601 #endif /* VC4_QIR_H */