vc4: Add QIR/QPU support for the 8-bit vector instructions.
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <assert.h>
28 #include <stdio.h>
29 #include <stdlib.h>
30 #include <stdbool.h>
31 #include <stdint.h>
32 #include <string.h>
33
34 #include "util/macros.h"
35 #include "glsl/nir/nir.h"
36 #include "util/list.h"
37 #include "util/u_math.h"
38
39 #include "vc4_screen.h"
40 #include "pipe/p_state.h"
41
42 struct nir_builder;
43
44 enum qfile {
45 QFILE_NULL,
46 QFILE_TEMP,
47 QFILE_VARY,
48 QFILE_UNIF,
49 QFILE_VPM,
50
51 /**
52 * Stores an immediate value in the index field that can be turned
53 * into a small immediate field by qpu_encode_small_immediate().
54 */
55 QFILE_SMALL_IMM,
56 };
57
58 struct qreg {
59 enum qfile file;
60 uint32_t index;
61 int pack;
62 };
63
64 enum qop {
65 QOP_UNDEF,
66 QOP_MOV,
67 QOP_FADD,
68 QOP_FSUB,
69 QOP_FMUL,
70 QOP_V8MULD,
71 QOP_V8MIN,
72 QOP_V8MAX,
73 QOP_V8ADDS,
74 QOP_V8SUBS,
75 QOP_MUL24,
76 QOP_FMIN,
77 QOP_FMAX,
78 QOP_FMINABS,
79 QOP_FMAXABS,
80 QOP_ADD,
81 QOP_SUB,
82 QOP_SHL,
83 QOP_SHR,
84 QOP_ASR,
85 QOP_MIN,
86 QOP_MAX,
87 QOP_AND,
88 QOP_OR,
89 QOP_XOR,
90 QOP_NOT,
91
92 /* Note: Orderings of these compares must be the same as in
93 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
94 * otherwise 0. */
95 QOP_SEL_X_0_ZS,
96 QOP_SEL_X_0_ZC,
97 QOP_SEL_X_0_NS,
98 QOP_SEL_X_0_NC,
99 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
100 QOP_SEL_X_Y_ZS,
101 QOP_SEL_X_Y_ZC,
102 QOP_SEL_X_Y_NS,
103 QOP_SEL_X_Y_NC,
104
105 QOP_FTOI,
106 QOP_ITOF,
107 QOP_RCP,
108 QOP_RSQ,
109 QOP_EXP2,
110 QOP_LOG2,
111 QOP_VW_SETUP,
112 QOP_VR_SETUP,
113 QOP_PACK_8888_F,
114 QOP_PACK_8A_F,
115 QOP_PACK_8B_F,
116 QOP_PACK_8C_F,
117 QOP_PACK_8D_F,
118 QOP_TLB_DISCARD_SETUP,
119 QOP_TLB_STENCIL_SETUP,
120 QOP_TLB_Z_WRITE,
121 QOP_TLB_COLOR_WRITE,
122 QOP_TLB_COLOR_READ,
123 QOP_VARY_ADD_C,
124
125 QOP_FRAG_X,
126 QOP_FRAG_Y,
127 QOP_FRAG_Z,
128 QOP_FRAG_W,
129 QOP_FRAG_REV_FLAG,
130
131 QOP_UNPACK_8A_F,
132 QOP_UNPACK_8B_F,
133 QOP_UNPACK_8C_F,
134 QOP_UNPACK_8D_F,
135 QOP_UNPACK_16A_F,
136 QOP_UNPACK_16B_F,
137
138 QOP_UNPACK_8A_I,
139 QOP_UNPACK_8B_I,
140 QOP_UNPACK_8C_I,
141 QOP_UNPACK_8D_I,
142 QOP_UNPACK_16A_I,
143 QOP_UNPACK_16B_I,
144
145 /** Texture x coordinate parameter write */
146 QOP_TEX_S,
147 /** Texture y coordinate parameter write */
148 QOP_TEX_T,
149 /** Texture border color parameter or cube map z coordinate write */
150 QOP_TEX_R,
151 /** Texture LOD bias parameter write */
152 QOP_TEX_B,
153
154 /**
155 * Texture-unit 4-byte read with address provided direct in S
156 * cooordinate.
157 *
158 * The first operand is the offset from the start of the UBO, and the
159 * second is the uniform that has the UBO's base pointer.
160 */
161 QOP_TEX_DIRECT,
162
163 /**
164 * Signal of texture read being necessary and then reading r4 into
165 * the destination
166 */
167 QOP_TEX_RESULT,
168 };
169
170 struct queued_qpu_inst {
171 struct list_head link;
172 uint64_t inst;
173 };
174
175 struct qinst {
176 struct list_head link;
177
178 enum qop op;
179 struct qreg dst;
180 struct qreg *src;
181 bool sf;
182 };
183
184 enum qstage {
185 /**
186 * Coordinate shader, runs during binning, before the VS, and just
187 * outputs position.
188 */
189 QSTAGE_COORD,
190 QSTAGE_VERT,
191 QSTAGE_FRAG,
192 };
193
194 enum quniform_contents {
195 /**
196 * Indicates that a constant 32-bit value is copied from the program's
197 * uniform contents.
198 */
199 QUNIFORM_CONSTANT,
200 /**
201 * Indicates that the program's uniform contents are used as an index
202 * into the GL uniform storage.
203 */
204 QUNIFORM_UNIFORM,
205
206 /** @{
207 * Scaling factors from clip coordinates to relative to the viewport
208 * center.
209 *
210 * This is used by the coordinate and vertex shaders to produce the
211 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
212 * point offsets from the viewport ccenter.
213 */
214 QUNIFORM_VIEWPORT_X_SCALE,
215 QUNIFORM_VIEWPORT_Y_SCALE,
216 /** @} */
217
218 QUNIFORM_VIEWPORT_Z_OFFSET,
219 QUNIFORM_VIEWPORT_Z_SCALE,
220
221 QUNIFORM_USER_CLIP_PLANE,
222
223 /**
224 * A reference to a texture config parameter 0 uniform.
225 *
226 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
227 * defines texture type, miplevels, and such. It will be found as a
228 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
229 */
230 QUNIFORM_TEXTURE_CONFIG_P0,
231
232 /**
233 * A reference to a texture config parameter 1 uniform.
234 *
235 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
236 * defines texture width, height, filters, and wrap modes. It will be
237 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
238 * sequence.
239 */
240 QUNIFORM_TEXTURE_CONFIG_P1,
241
242 /** A reference to a texture config parameter 2 cubemap stride uniform */
243 QUNIFORM_TEXTURE_CONFIG_P2,
244
245 QUNIFORM_UBO_ADDR,
246
247 QUNIFORM_TEXRECT_SCALE_X,
248 QUNIFORM_TEXRECT_SCALE_Y,
249
250 QUNIFORM_TEXTURE_BORDER_COLOR,
251
252 QUNIFORM_BLEND_CONST_COLOR_X,
253 QUNIFORM_BLEND_CONST_COLOR_Y,
254 QUNIFORM_BLEND_CONST_COLOR_Z,
255 QUNIFORM_BLEND_CONST_COLOR_W,
256
257 QUNIFORM_STENCIL,
258
259 QUNIFORM_ALPHA_REF,
260 };
261
262 struct vc4_varying_slot {
263 uint8_t slot;
264 uint8_t swizzle;
265 };
266
267 struct vc4_compiler_ubo_range {
268 /**
269 * offset in bytes from the start of the ubo where this range is
270 * uploaded.
271 *
272 * Only set once used is set.
273 */
274 uint32_t dst_offset;
275
276 /**
277 * offset in bytes from the start of the gallium uniforms where the
278 * data comes from.
279 */
280 uint32_t src_offset;
281
282 /** size in bytes of this ubo range */
283 uint32_t size;
284
285 /**
286 * Set if this range is used by the shader for indirect uniforms
287 * access.
288 */
289 bool used;
290 };
291
292 struct vc4_key {
293 struct vc4_uncompiled_shader *shader_state;
294 struct {
295 enum pipe_format format;
296 unsigned compare_mode:1;
297 unsigned compare_func:3;
298 unsigned wrap_s:3;
299 unsigned wrap_t:3;
300 uint8_t swizzle[4];
301 } tex[VC4_MAX_TEXTURE_SAMPLERS];
302 uint8_t ucp_enables;
303 };
304
305 struct vc4_fs_key {
306 struct vc4_key base;
307 enum pipe_format color_format;
308 bool depth_enabled;
309 bool stencil_enabled;
310 bool stencil_twoside;
311 bool stencil_full_writemasks;
312 bool is_points;
313 bool is_lines;
314 bool alpha_test;
315 bool point_coord_upper_left;
316 bool light_twoside;
317 uint8_t alpha_test_func;
318 uint8_t logicop_func;
319 uint32_t point_sprite_mask;
320
321 struct pipe_rt_blend_state blend;
322 };
323
324 struct vc4_vs_key {
325 struct vc4_key base;
326
327 /**
328 * This is a proxy for the array of FS input semantics, which is
329 * larger than we would want to put in the key.
330 */
331 uint64_t compiled_fs_id;
332
333 enum pipe_format attr_formats[8];
334 bool is_coord;
335 bool per_vertex_point_size;
336 };
337
338 struct vc4_compile {
339 struct vc4_context *vc4;
340 nir_shader *s;
341 nir_function_impl *impl;
342 struct exec_list *cf_node_list;
343
344 /**
345 * Mapping from nir_register * or nir_ssa_def * to array of struct
346 * qreg for the values.
347 */
348 struct hash_table *def_ht;
349
350 /* For each temp, the instruction generating its value. */
351 struct qinst **defs;
352 uint32_t defs_array_size;
353
354 /**
355 * Inputs to the shader, arranged by TGSI declaration order.
356 *
357 * Not all fragment shader QFILE_VARY reads are present in this array.
358 */
359 struct qreg *inputs;
360 struct qreg *outputs;
361 uint32_t inputs_array_size;
362 uint32_t outputs_array_size;
363 uint32_t uniforms_array_size;
364
365 struct vc4_compiler_ubo_range *ubo_ranges;
366 uint32_t ubo_ranges_array_size;
367 /** Number of uniform areas declared in ubo_ranges. */
368 uint32_t num_uniform_ranges;
369 /** Number of uniform areas used for indirect addressed loads. */
370 uint32_t num_ubo_ranges;
371 uint32_t next_ubo_dst_offset;
372
373 struct qreg line_x, point_x, point_y;
374 struct qreg discard;
375
376 uint8_t vattr_sizes[8];
377
378 /**
379 * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads.
380 *
381 * This includes those that aren't part of the VPM varyings, like
382 * point/line coordinates.
383 */
384 struct vc4_varying_slot *input_slots;
385 uint32_t num_input_slots;
386 uint32_t input_slots_array_size;
387
388 /**
389 * An entry per outputs[] in the VS indicating what the VARYING_SLOT_*
390 * of the output is. Used to emit from the VS in the order that the
391 * FS needs.
392 */
393 struct vc4_varying_slot *output_slots;
394
395 struct pipe_shader_state *shader_state;
396 struct vc4_key *key;
397 struct vc4_fs_key *fs_key;
398 struct vc4_vs_key *vs_key;
399
400 uint32_t *uniform_data;
401 enum quniform_contents *uniform_contents;
402 uint32_t uniform_array_size;
403 uint32_t num_uniforms;
404 uint32_t num_outputs;
405 uint32_t num_texture_samples;
406 uint32_t output_position_index;
407 uint32_t output_color_index;
408 uint32_t output_point_size_index;
409
410 struct qreg undef;
411 enum qstage stage;
412 uint32_t num_temps;
413 struct list_head instructions;
414 uint32_t immediates[1024];
415
416 struct list_head qpu_inst_list;
417 uint64_t *qpu_insts;
418 uint32_t qpu_inst_count;
419 uint32_t qpu_inst_size;
420 uint32_t num_inputs;
421
422 uint32_t program_id;
423 uint32_t variant_id;
424 };
425
426 /* Special nir_load_input intrinsic index for loading the current TLB
427 * destination color.
428 */
429 #define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000
430
431 /* Special offset for nir_load_uniform values to get a QUNIFORM_*
432 * state-dependent value.
433 */
434 #define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000
435
436 struct vc4_compile *qir_compile_init(void);
437 void qir_compile_destroy(struct vc4_compile *c);
438 struct qinst *qir_inst(enum qop op, struct qreg dst,
439 struct qreg src0, struct qreg src1);
440 struct qinst *qir_inst4(enum qop op, struct qreg dst,
441 struct qreg a,
442 struct qreg b,
443 struct qreg c,
444 struct qreg d);
445 void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst);
446 struct qreg qir_uniform(struct vc4_compile *c,
447 enum quniform_contents contents,
448 uint32_t data);
449 void qir_reorder_uniforms(struct vc4_compile *c);
450
451 void qir_emit(struct vc4_compile *c, struct qinst *inst);
452 static inline void qir_emit_nodef(struct vc4_compile *c, struct qinst *inst)
453 {
454 list_addtail(&inst->link, &c->instructions);
455 }
456
457 struct qreg qir_get_temp(struct vc4_compile *c);
458 int qir_get_op_nsrc(enum qop qop);
459 bool qir_reg_equals(struct qreg a, struct qreg b);
460 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
461 bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst);
462 bool qir_is_multi_instruction(struct qinst *inst);
463 bool qir_is_mul(struct qinst *inst);
464 bool qir_is_tex(struct qinst *inst);
465 bool qir_depends_on_flags(struct qinst *inst);
466 bool qir_writes_r4(struct qinst *inst);
467 bool qir_src_needs_a_file(struct qinst *inst);
468 struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg);
469
470 void qir_dump(struct vc4_compile *c);
471 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
472 const char *qir_get_stage_name(enum qstage stage);
473
474 void qir_optimize(struct vc4_compile *c);
475 bool qir_opt_algebraic(struct vc4_compile *c);
476 bool qir_opt_constant_folding(struct vc4_compile *c);
477 bool qir_opt_copy_propagation(struct vc4_compile *c);
478 bool qir_opt_cse(struct vc4_compile *c);
479 bool qir_opt_dead_code(struct vc4_compile *c);
480 bool qir_opt_small_immediates(struct vc4_compile *c);
481 bool qir_opt_vpm_writes(struct vc4_compile *c);
482 void vc4_nir_lower_blend(struct vc4_compile *c);
483 void vc4_nir_lower_io(struct vc4_compile *c);
484 nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b,
485 enum quniform_contents contents);
486 nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b,
487 nir_ssa_def **srcs, int swiz);
488 void qir_lower_uniforms(struct vc4_compile *c);
489
490 void qpu_schedule_instructions(struct vc4_compile *c);
491
492 void qir_SF(struct vc4_compile *c, struct qreg src);
493
494 static inline struct qreg
495 qir_uniform_ui(struct vc4_compile *c, uint32_t ui)
496 {
497 return qir_uniform(c, QUNIFORM_CONSTANT, ui);
498 }
499
500 static inline struct qreg
501 qir_uniform_f(struct vc4_compile *c, float f)
502 {
503 return qir_uniform(c, QUNIFORM_CONSTANT, fui(f));
504 }
505
506 #define QIR_ALU0(name) \
507 static inline struct qreg \
508 qir_##name(struct vc4_compile *c) \
509 { \
510 struct qreg t = qir_get_temp(c); \
511 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
512 return t; \
513 }
514
515 #define QIR_ALU1(name) \
516 static inline struct qreg \
517 qir_##name(struct vc4_compile *c, struct qreg a) \
518 { \
519 struct qreg t = qir_get_temp(c); \
520 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
521 return t; \
522 } \
523 static inline void \
524 qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
525 struct qreg a) \
526 { \
527 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
528 }
529
530 #define QIR_ALU2(name) \
531 static inline struct qreg \
532 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
533 { \
534 struct qreg t = qir_get_temp(c); \
535 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
536 return t; \
537 } \
538 static inline void \
539 qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
540 struct qreg a, struct qreg b) \
541 { \
542 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \
543 }
544
545 #define QIR_NODST_1(name) \
546 static inline void \
547 qir_##name(struct vc4_compile *c, struct qreg a) \
548 { \
549 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
550 }
551
552 #define QIR_NODST_2(name) \
553 static inline void \
554 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
555 { \
556 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
557 }
558
559 #define QIR_PACK(name) \
560 static inline struct qreg \
561 qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \
562 { \
563 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
564 return dest; \
565 }
566
567 QIR_ALU1(MOV)
568 QIR_ALU2(FADD)
569 QIR_ALU2(FSUB)
570 QIR_ALU2(FMUL)
571 QIR_ALU2(V8MULD)
572 QIR_ALU2(V8MIN)
573 QIR_ALU2(V8MAX)
574 QIR_ALU2(V8ADDS)
575 QIR_ALU2(V8SUBS)
576 QIR_ALU2(MUL24)
577 QIR_ALU1(SEL_X_0_ZS)
578 QIR_ALU1(SEL_X_0_ZC)
579 QIR_ALU1(SEL_X_0_NS)
580 QIR_ALU1(SEL_X_0_NC)
581 QIR_ALU2(SEL_X_Y_ZS)
582 QIR_ALU2(SEL_X_Y_ZC)
583 QIR_ALU2(SEL_X_Y_NS)
584 QIR_ALU2(SEL_X_Y_NC)
585 QIR_ALU2(FMIN)
586 QIR_ALU2(FMAX)
587 QIR_ALU2(FMINABS)
588 QIR_ALU2(FMAXABS)
589 QIR_ALU1(FTOI)
590 QIR_ALU1(ITOF)
591
592 QIR_ALU2(ADD)
593 QIR_ALU2(SUB)
594 QIR_ALU2(SHL)
595 QIR_ALU2(SHR)
596 QIR_ALU2(ASR)
597 QIR_ALU2(MIN)
598 QIR_ALU2(MAX)
599 QIR_ALU2(AND)
600 QIR_ALU2(OR)
601 QIR_ALU2(XOR)
602 QIR_ALU1(NOT)
603
604 QIR_ALU1(RCP)
605 QIR_ALU1(RSQ)
606 QIR_ALU1(EXP2)
607 QIR_ALU1(LOG2)
608 QIR_ALU1(PACK_8888_F)
609 QIR_PACK(PACK_8A_F)
610 QIR_PACK(PACK_8B_F)
611 QIR_PACK(PACK_8C_F)
612 QIR_PACK(PACK_8D_F)
613 QIR_ALU1(VARY_ADD_C)
614 QIR_NODST_2(TEX_S)
615 QIR_NODST_2(TEX_T)
616 QIR_NODST_2(TEX_R)
617 QIR_NODST_2(TEX_B)
618 QIR_NODST_2(TEX_DIRECT)
619 QIR_ALU0(FRAG_X)
620 QIR_ALU0(FRAG_Y)
621 QIR_ALU0(FRAG_Z)
622 QIR_ALU0(FRAG_W)
623 QIR_ALU0(FRAG_REV_FLAG)
624 QIR_ALU0(TEX_RESULT)
625 QIR_ALU0(TLB_COLOR_READ)
626 QIR_NODST_1(TLB_COLOR_WRITE)
627 QIR_NODST_1(TLB_Z_WRITE)
628 QIR_NODST_1(TLB_DISCARD_SETUP)
629 QIR_NODST_1(TLB_STENCIL_SETUP)
630
631 static inline struct qreg
632 qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
633 {
634 struct qreg t = qir_get_temp(c);
635 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef));
636 return t;
637 }
638
639 static inline struct qreg
640 qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
641 {
642 struct qreg t = qir_get_temp(c);
643 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef));
644 return t;
645 }
646
647 static inline struct qreg
648 qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
649 {
650 struct qreg t = qir_get_temp(c);
651 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef));
652 return t;
653 }
654
655 static inline struct qreg
656 qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
657 {
658 struct qreg t = qir_get_temp(c);
659 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef));
660 return t;
661 }
662
663 static inline struct qreg
664 qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan)
665 {
666 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, dest, val, c->undef));
667 if (dest.file == QFILE_TEMP)
668 c->defs[dest.index] = NULL;
669 return dest;
670 }
671
672 static inline struct qreg
673 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
674 {
675 return qir_EXP2(c, qir_FMUL(c,
676 y,
677 qir_LOG2(c, x)));
678 }
679
680 static inline void
681 qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
682 {
683 static const struct qreg vpm = { QFILE_VPM, 0 };
684 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
685 }
686
687 #endif /* VC4_QIR_H */