src/gallium/drivers/vc4/vc4_qir.h

   1 /*
   2  * Copyright © 2014 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef VC4_QIR_H
  25 #define VC4_QIR_H
  26
  27 #include <assert.h>
  28 #include <stdio.h>
  29 #include <stdlib.h>
  30 #include <stdbool.h>
  31 #include <stdint.h>
  32 #include <string.h>
  33
  34 #include "util/macros.h"
  35 #include "compiler/nir/nir.h"
  36 #include "util/list.h"
  37 #include "util/u_math.h"
  38
  39 #include "vc4_screen.h"
  40 #include "vc4_qpu_defines.h"
  41 #include "kernel/vc4_packet.h"
  42 #include "pipe/p_state.h"
  43
  44 struct nir_builder;
  45
  46 enum qfile {
  47         QFILE_NULL,
  48         QFILE_TEMP,
  49         QFILE_VARY,
  50         QFILE_UNIF,
  51         QFILE_VPM,
  52
  53         /**
  54          * Stores an immediate value in the index field that can be turned
  55          * into a small immediate field by qpu_encode_small_immediate().
  56          */
  57         QFILE_SMALL_IMM,
  58 };
  59
  60 struct qreg {
  61         enum qfile file;
  62         uint32_t index;
  63         int pack;
  64 };
  65
  66 enum qop {
  67         QOP_UNDEF,
  68         QOP_MOV,
  69         QOP_FMOV,
  70         QOP_MMOV,
  71         QOP_FADD,
  72         QOP_FSUB,
  73         QOP_FMUL,
  74         QOP_V8MULD,
  75         QOP_V8MIN,
  76         QOP_V8MAX,
  77         QOP_V8ADDS,
  78         QOP_V8SUBS,
  79         QOP_MUL24,
  80         QOP_FMIN,
  81         QOP_FMAX,
  82         QOP_FMINABS,
  83         QOP_FMAXABS,
  84         QOP_ADD,
  85         QOP_SUB,
  86         QOP_SHL,
  87         QOP_SHR,
  88         QOP_ASR,
  89         QOP_MIN,
  90         QOP_MAX,
  91         QOP_AND,
  92         QOP_OR,
  93         QOP_XOR,
  94         QOP_NOT,
  95
  96         QOP_FTOI,
  97         QOP_ITOF,
  98         QOP_RCP,
  99         QOP_RSQ,
 100         QOP_EXP2,
 101         QOP_LOG2,
 102         QOP_VW_SETUP,
 103         QOP_VR_SETUP,
 104         QOP_TLB_DISCARD_SETUP,
 105         QOP_TLB_STENCIL_SETUP,
 106         QOP_TLB_Z_WRITE,
 107         QOP_TLB_COLOR_WRITE,
 108         QOP_TLB_COLOR_WRITE_MS,
 109         QOP_TLB_COLOR_READ,
 110         QOP_MS_MASK,
 111         QOP_VARY_ADD_C,
 112
 113         QOP_FRAG_X,
 114         QOP_FRAG_Y,
 115         QOP_FRAG_Z,
 116         QOP_FRAG_W,
 117         QOP_FRAG_REV_FLAG,
 118
 119         /** Texture x coordinate parameter write */
 120         QOP_TEX_S,
 121         /** Texture y coordinate parameter write */
 122         QOP_TEX_T,
 123         /** Texture border color parameter or cube map z coordinate write */
 124         QOP_TEX_R,
 125         /** Texture LOD bias parameter write */
 126         QOP_TEX_B,
 127
 128         /**
 129          * Texture-unit 4-byte read with address provided direct in S
 130          * cooordinate.
 131          *
 132          * The first operand is the offset from the start of the UBO, and the
 133          * second is the uniform that has the UBO's base pointer.
 134          */
 135         QOP_TEX_DIRECT,
 136
 137         /**
 138          * Signal of texture read being necessary and then reading r4 into
 139          * the destination
 140          */
 141         QOP_TEX_RESULT,
 142 };
 143
 144 struct queued_qpu_inst {
 145         struct list_head link;
 146         uint64_t inst;
 147 };
 148
 149 struct qinst {
 150         struct list_head link;
 151
 152         enum qop op;
 153         struct qreg dst;
 154         struct qreg *src;
 155         bool sf;
 156         uint8_t cond;
 157 };
 158
 159 enum qstage {
 160         /**
 161          * Coordinate shader, runs during binning, before the VS, and just
 162          * outputs position.
 163          */
 164         QSTAGE_COORD,
 165         QSTAGE_VERT,
 166         QSTAGE_FRAG,
 167 };
 168
 169 enum quniform_contents {
 170         /**
 171          * Indicates that a constant 32-bit value is copied from the program's
 172          * uniform contents.
 173          */
 174         QUNIFORM_CONSTANT,
 175         /**
 176          * Indicates that the program's uniform contents are used as an index
 177          * into the GL uniform storage.
 178          */
 179         QUNIFORM_UNIFORM,
 180
 181         /** @{
 182          * Scaling factors from clip coordinates to relative to the viewport
 183          * center.
 184          *
 185          * This is used by the coordinate and vertex shaders to produce the
 186          * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
 187          * point offsets from the viewport ccenter.
 188          */
 189         QUNIFORM_VIEWPORT_X_SCALE,
 190         QUNIFORM_VIEWPORT_Y_SCALE,
 191         /** @} */
 192
 193         QUNIFORM_VIEWPORT_Z_OFFSET,
 194         QUNIFORM_VIEWPORT_Z_SCALE,
 195
 196         QUNIFORM_USER_CLIP_PLANE,
 197
 198         /**
 199          * A reference to a texture config parameter 0 uniform.
 200          *
 201          * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
 202          * defines texture type, miplevels, and such.  It will be found as a
 203          * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
 204          */
 205         QUNIFORM_TEXTURE_CONFIG_P0,
 206
 207         /**
 208          * A reference to a texture config parameter 1 uniform.
 209          *
 210          * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
 211          * defines texture width, height, filters, and wrap modes.  It will be
 212          * found as a parameter to the second QOP_TEX_[STRB] instruction in a
 213          * sequence.
 214          */
 215         QUNIFORM_TEXTURE_CONFIG_P1,
 216
 217         /** A reference to a texture config parameter 2 cubemap stride uniform */
 218         QUNIFORM_TEXTURE_CONFIG_P2,
 219
 220         QUNIFORM_TEXTURE_MSAA_ADDR,
 221
 222         QUNIFORM_UBO_ADDR,
 223
 224         QUNIFORM_TEXRECT_SCALE_X,
 225         QUNIFORM_TEXRECT_SCALE_Y,
 226
 227         QUNIFORM_TEXTURE_BORDER_COLOR,
 228
 229         QUNIFORM_BLEND_CONST_COLOR_X,
 230         QUNIFORM_BLEND_CONST_COLOR_Y,
 231         QUNIFORM_BLEND_CONST_COLOR_Z,
 232         QUNIFORM_BLEND_CONST_COLOR_W,
 233         QUNIFORM_BLEND_CONST_COLOR_RGBA,
 234         QUNIFORM_BLEND_CONST_COLOR_AAAA,
 235
 236         QUNIFORM_STENCIL,
 237
 238         QUNIFORM_ALPHA_REF,
 239         QUNIFORM_SAMPLE_MASK,
 240 };
 241
 242 struct vc4_varying_slot {
 243         uint8_t slot;
 244         uint8_t swizzle;
 245 };
 246
 247 struct vc4_compiler_ubo_range {
 248         /**
 249          * offset in bytes from the start of the ubo where this range is
 250          * uploaded.
 251          *
 252          * Only set once used is set.
 253          */
 254         uint32_t dst_offset;
 255
 256         /**
 257          * offset in bytes from the start of the gallium uniforms where the
 258          * data comes from.
 259          */
 260         uint32_t src_offset;
 261
 262         /** size in bytes of this ubo range */
 263         uint32_t size;
 264
 265         /**
 266          * Set if this range is used by the shader for indirect uniforms
 267          * access.
 268          */
 269         bool used;
 270 };
 271
 272 struct vc4_key {
 273         struct vc4_uncompiled_shader *shader_state;
 274         struct {
 275                 enum pipe_format format;
 276                 uint8_t swizzle[4];
 277                 union {
 278                         struct {
 279                                 unsigned compare_mode:1;
 280                                 unsigned compare_func:3;
 281                                 unsigned wrap_s:3;
 282                                 unsigned wrap_t:3;
 283                         };
 284                         struct {
 285                                 uint16_t msaa_width, msaa_height;
 286                         };
 287                 };
 288         } tex[VC4_MAX_TEXTURE_SAMPLERS];
 289         uint8_t ucp_enables;
 290 };
 291
 292 struct vc4_fs_key {
 293         struct vc4_key base;
 294         enum pipe_format color_format;
 295         bool depth_enabled;
 296         bool stencil_enabled;
 297         bool stencil_twoside;
 298         bool stencil_full_writemasks;
 299         bool is_points;
 300         bool is_lines;
 301         bool alpha_test;
 302         bool point_coord_upper_left;
 303         bool light_twoside;
 304         bool msaa;
 305         bool sample_coverage;
 306         bool sample_alpha_to_coverage;
 307         bool sample_alpha_to_one;
 308         uint8_t alpha_test_func;
 309         uint8_t logicop_func;
 310         uint32_t point_sprite_mask;
 311
 312         struct pipe_rt_blend_state blend;
 313 };
 314
 315 struct vc4_vs_key {
 316         struct vc4_key base;
 317
 318         /**
 319          * This is a proxy for the array of FS input semantics, which is
 320          * larger than we would want to put in the key.
 321          */
 322         uint64_t compiled_fs_id;
 323
 324         enum pipe_format attr_formats[8];
 325         bool is_coord;
 326         bool per_vertex_point_size;
 327 };
 328
 329 struct vc4_compile {
 330         struct vc4_context *vc4;
 331         nir_shader *s;
 332         nir_function_impl *impl;
 333         struct exec_list *cf_node_list;
 334
 335         /**
 336          * Mapping from nir_register * or nir_ssa_def * to array of struct
 337          * qreg for the values.
 338          */
 339         struct hash_table *def_ht;
 340
 341         /* For each temp, the instruction generating its value. */
 342         struct qinst **defs;
 343         uint32_t defs_array_size;
 344
 345         /**
 346          * Inputs to the shader, arranged by TGSI declaration order.
 347          *
 348          * Not all fragment shader QFILE_VARY reads are present in this array.
 349          */
 350         struct qreg *inputs;
 351         struct qreg *outputs;
 352         bool msaa_per_sample_output;
 353         struct qreg color_reads[VC4_MAX_SAMPLES];
 354         struct qreg sample_colors[VC4_MAX_SAMPLES];
 355         uint32_t inputs_array_size;
 356         uint32_t outputs_array_size;
 357         uint32_t uniforms_array_size;
 358
 359         struct vc4_compiler_ubo_range *ubo_ranges;
 360         uint32_t ubo_ranges_array_size;
 361         /** Number of uniform areas declared in ubo_ranges. */
 362         uint32_t num_uniform_ranges;
 363         /** Number of uniform areas used for indirect addressed loads. */
 364         uint32_t num_ubo_ranges;
 365         uint32_t next_ubo_dst_offset;
 366
 367         struct qreg line_x, point_x, point_y;
 368         struct qreg discard;
 369
 370         uint8_t vattr_sizes[8];
 371
 372         /* Bitfield for whether a given channel of a sampler needs sRGB
 373          * decode.
 374          */
 375         uint8_t tex_srgb_decode[VC4_MAX_TEXTURE_SAMPLERS];
 376
 377         /**
 378          * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads.
 379          *
 380          * This includes those that aren't part of the VPM varyings, like
 381          * point/line coordinates.
 382          */
 383         struct vc4_varying_slot *input_slots;
 384         uint32_t num_input_slots;
 385         uint32_t input_slots_array_size;
 386
 387         /**
 388          * An entry per outputs[] in the VS indicating what the VARYING_SLOT_*
 389          * of the output is.  Used to emit from the VS in the order that the
 390          * FS needs.
 391          */
 392         struct vc4_varying_slot *output_slots;
 393
 394         struct pipe_shader_state *shader_state;
 395         struct vc4_key *key;
 396         struct vc4_fs_key *fs_key;
 397         struct vc4_vs_key *vs_key;
 398
 399         uint32_t *uniform_data;
 400         enum quniform_contents *uniform_contents;
 401         uint32_t uniform_array_size;
 402         uint32_t num_uniforms;
 403         uint32_t num_outputs;
 404         uint32_t num_texture_samples;
 405         uint32_t output_position_index;
 406         uint32_t output_color_index;
 407         uint32_t output_point_size_index;
 408         uint32_t output_sample_mask_index;
 409
 410         struct qreg undef;
 411         enum qstage stage;
 412         uint32_t num_temps;
 413         struct list_head instructions;
 414         uint32_t immediates[1024];
 415
 416         struct list_head qpu_inst_list;
 417         uint64_t *qpu_insts;
 418         uint32_t qpu_inst_count;
 419         uint32_t qpu_inst_size;
 420         uint32_t num_inputs;
 421
 422         uint32_t program_id;
 423         uint32_t variant_id;
 424 };
 425
 426 /* Special nir_load_input intrinsic index for loading the current TLB
 427  * destination color.
 428  */
 429 #define VC4_NIR_TLB_COLOR_READ_INPUT            2000000000
 430
 431 #define VC4_NIR_MS_MASK_OUTPUT                  2000000000
 432
 433 /* Special offset for nir_load_uniform values to get a QUNIFORM_*
 434  * state-dependent value.
 435  */
 436 #define VC4_NIR_STATE_UNIFORM_OFFSET            1000000000
 437
 438 struct vc4_compile *qir_compile_init(void);
 439 void qir_compile_destroy(struct vc4_compile *c);
 440 struct qinst *qir_inst(enum qop op, struct qreg dst,
 441                        struct qreg src0, struct qreg src1);
 442 struct qinst *qir_inst4(enum qop op, struct qreg dst,
 443                         struct qreg a,
 444                         struct qreg b,
 445                         struct qreg c,
 446                         struct qreg d);
 447 void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst);
 448 struct qreg qir_uniform(struct vc4_compile *c,
 449                         enum quniform_contents contents,
 450                         uint32_t data);
 451 void qir_schedule_instructions(struct vc4_compile *c);
 452 void qir_reorder_uniforms(struct vc4_compile *c);
 453
 454 void qir_emit(struct vc4_compile *c, struct qinst *inst);
 455 static inline struct qinst *
 456 qir_emit_nodef(struct vc4_compile *c, struct qinst *inst)
 457 {
 458         list_addtail(&inst->link, &c->instructions);
 459         return inst;
 460 }
 461
 462 struct qreg qir_get_temp(struct vc4_compile *c);
 463 int qir_get_op_nsrc(enum qop qop);
 464 bool qir_reg_equals(struct qreg a, struct qreg b);
 465 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
 466 bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst);
 467 bool qir_is_multi_instruction(struct qinst *inst);
 468 bool qir_is_mul(struct qinst *inst);
 469 bool qir_is_raw_mov(struct qinst *inst);
 470 bool qir_is_tex(struct qinst *inst);
 471 bool qir_is_float_input(struct qinst *inst);
 472 bool qir_depends_on_flags(struct qinst *inst);
 473 bool qir_writes_r4(struct qinst *inst);
 474 struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg);
 475
 476 void qir_dump(struct vc4_compile *c);
 477 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
 478 const char *qir_get_stage_name(enum qstage stage);
 479
 480 void qir_optimize(struct vc4_compile *c);
 481 bool qir_opt_algebraic(struct vc4_compile *c);
 482 bool qir_opt_constant_folding(struct vc4_compile *c);
 483 bool qir_opt_copy_propagation(struct vc4_compile *c);
 484 bool qir_opt_cse(struct vc4_compile *c);
 485 bool qir_opt_dead_code(struct vc4_compile *c);
 486 bool qir_opt_small_immediates(struct vc4_compile *c);
 487 bool qir_opt_vpm_writes(struct vc4_compile *c);
 488 void vc4_nir_lower_blend(struct vc4_compile *c);
 489 void vc4_nir_lower_io(struct vc4_compile *c);
 490 nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b,
 491                                        enum quniform_contents contents);
 492 nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b,
 493                                           nir_ssa_def **srcs, int swiz);
 494 void vc4_nir_lower_txf_ms(struct vc4_compile *c);
 495 void qir_lower_uniforms(struct vc4_compile *c);
 496
 497 uint32_t qpu_schedule_instructions(struct vc4_compile *c);
 498
 499 void qir_SF(struct vc4_compile *c, struct qreg src);
 500
 501 static inline struct qreg
 502 qir_uniform_ui(struct vc4_compile *c, uint32_t ui)
 503 {
 504         return qir_uniform(c, QUNIFORM_CONSTANT, ui);
 505 }
 506
 507 static inline struct qreg
 508 qir_uniform_f(struct vc4_compile *c, float f)
 509 {
 510         return qir_uniform(c, QUNIFORM_CONSTANT, fui(f));
 511 }
 512
 513 #define QIR_ALU0(name)                                                   \
 514 static inline struct qreg                                                \
 515 qir_##name(struct vc4_compile *c)                                        \
 516 {                                                                        \
 517         struct qreg t = qir_get_temp(c);                                 \
 518         qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef));        \
 519         return t;                                                        \
 520 }
 521
 522 #define QIR_ALU1(name)                                                   \
 523 static inline struct qreg                                                \
 524 qir_##name(struct vc4_compile *c, struct qreg a)                         \
 525 {                                                                        \
 526         struct qreg t = qir_get_temp(c);                                 \
 527         qir_emit(c, qir_inst(QOP_##name, t, a, c->undef));               \
 528         return t;                                                        \
 529 }                                                                        \
 530 static inline struct qinst *                                             \
 531 qir_##name##_dest(struct vc4_compile *c, struct qreg dest,               \
 532                   struct qreg a)                                         \
 533 {                                                                        \
 534         return qir_emit_nodef(c, qir_inst(QOP_##name, dest, a,           \
 535                                           c->undef));                    \
 536 }
 537
 538 #define QIR_ALU2(name)                                                   \
 539 static inline struct qreg                                                \
 540 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b)          \
 541 {                                                                        \
 542         struct qreg t = qir_get_temp(c);                                 \
 543         qir_emit(c, qir_inst(QOP_##name, t, a, b));                      \
 544         return t;                                                        \
 545 }                                                                        \
 546 static inline void                                                       \
 547 qir_##name##_dest(struct vc4_compile *c, struct qreg dest,               \
 548                   struct qreg a, struct qreg b)                          \
 549 {                                                                        \
 550         qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b));             \
 551 }
 552
 553 #define QIR_NODST_1(name)                                               \
 554 static inline void                                                      \
 555 qir_##name(struct vc4_compile *c, struct qreg a)                        \
 556 {                                                                       \
 557         qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef));       \
 558 }
 559
 560 #define QIR_NODST_2(name)                                               \
 561 static inline void                                                      \
 562 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b)         \
 563 {                                                                       \
 564         qir_emit(c, qir_inst(QOP_##name, c->undef, a, b));       \
 565 }
 566
 567 #define QIR_PACK(name)                                                   \
 568 static inline struct qreg                                                \
 569 qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a)       \
 570 {                                                                        \
 571         qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef));      \
 572         return dest;                                                     \
 573 }
 574
 575 QIR_ALU1(MOV)
 576 QIR_ALU1(FMOV)
 577 QIR_ALU1(MMOV)
 578 QIR_ALU2(FADD)
 579 QIR_ALU2(FSUB)
 580 QIR_ALU2(FMUL)
 581 QIR_ALU2(V8MULD)
 582 QIR_ALU2(V8MIN)
 583 QIR_ALU2(V8MAX)
 584 QIR_ALU2(V8ADDS)
 585 QIR_ALU2(V8SUBS)
 586 QIR_ALU2(MUL24)
 587 QIR_ALU2(FMIN)
 588 QIR_ALU2(FMAX)
 589 QIR_ALU2(FMINABS)
 590 QIR_ALU2(FMAXABS)
 591 QIR_ALU1(FTOI)
 592 QIR_ALU1(ITOF)
 593
 594 QIR_ALU2(ADD)
 595 QIR_ALU2(SUB)
 596 QIR_ALU2(SHL)
 597 QIR_ALU2(SHR)
 598 QIR_ALU2(ASR)
 599 QIR_ALU2(MIN)
 600 QIR_ALU2(MAX)
 601 QIR_ALU2(AND)
 602 QIR_ALU2(OR)
 603 QIR_ALU2(XOR)
 604 QIR_ALU1(NOT)
 605
 606 QIR_ALU1(RCP)
 607 QIR_ALU1(RSQ)
 608 QIR_ALU1(EXP2)
 609 QIR_ALU1(LOG2)
 610 QIR_ALU1(VARY_ADD_C)
 611 QIR_NODST_2(TEX_S)
 612 QIR_NODST_2(TEX_T)
 613 QIR_NODST_2(TEX_R)
 614 QIR_NODST_2(TEX_B)
 615 QIR_NODST_2(TEX_DIRECT)
 616 QIR_ALU0(FRAG_X)
 617 QIR_ALU0(FRAG_Y)
 618 QIR_ALU0(FRAG_Z)
 619 QIR_ALU0(FRAG_W)
 620 QIR_ALU0(FRAG_REV_FLAG)
 621 QIR_ALU0(TEX_RESULT)
 622 QIR_ALU0(TLB_COLOR_READ)
 623 QIR_NODST_1(TLB_COLOR_WRITE)
 624 QIR_NODST_1(TLB_COLOR_WRITE_MS)
 625 QIR_NODST_1(TLB_Z_WRITE)
 626 QIR_NODST_1(TLB_DISCARD_SETUP)
 627 QIR_NODST_1(TLB_STENCIL_SETUP)
 628 QIR_NODST_1(MS_MASK)
 629
 630 static inline struct qreg
 631 qir_SEL(struct vc4_compile *c, uint8_t cond, struct qreg src0, struct qreg src1)
 632 {
 633         struct qreg t = qir_get_temp(c);
 634         struct qinst *a = qir_MOV_dest(c, t, src0);
 635         struct qinst *b = qir_MOV_dest(c, t, src1);
 636         a->cond = cond;
 637         b->cond = cond ^ 1;
 638         return t;
 639 }
 640
 641 static inline struct qreg
 642 qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
 643 {
 644         struct qreg t = qir_FMOV(c, src);
 645         c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i;
 646         return t;
 647 }
 648
 649 static inline struct qreg
 650 qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
 651 {
 652         struct qreg t = qir_MOV(c, src);
 653         c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i;
 654         return t;
 655 }
 656
 657 static inline struct qreg
 658 qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
 659 {
 660         struct qreg t = qir_FMOV(c, src);
 661         c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i;
 662         return t;
 663 }
 664
 665 static inline struct qreg
 666 qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
 667 {
 668         struct qreg t = qir_MOV(c, src);
 669         c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i;
 670         return t;
 671 }
 672
 673 static inline void
 674 qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan)
 675 {
 676         assert(!dest.pack);
 677         dest.pack = QPU_PACK_MUL_8A + chan;
 678         qir_emit(c, qir_inst(QOP_MMOV, dest, val, c->undef));
 679         if (dest.file == QFILE_TEMP)
 680                 c->defs[dest.index] = NULL;
 681 }
 682
 683 static inline struct qreg
 684 qir_PACK_8888_F(struct vc4_compile *c, struct qreg val)
 685 {
 686         struct qreg dest = qir_MMOV(c, val);
 687         c->defs[dest.index]->dst.pack = QPU_PACK_MUL_8888;
 688         return dest;
 689 }
 690
 691 static inline struct qreg
 692 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
 693 {
 694         return qir_EXP2(c, qir_FMUL(c,
 695                                     y,
 696                                     qir_LOG2(c, x)));
 697 }
 698
 699 static inline void
 700 qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
 701 {
 702         static const struct qreg vpm = { QFILE_VPM, 0 };
 703         qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
 704 }
 705
 706 #endif /* VC4_QIR_H */