vc4: Redo VPM reads as a read file.
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdbool.h>
30 #include <stdint.h>
31 #include <string.h>
32
33 #include "util/u_simple_list.h"
34 #include "tgsi/tgsi_parse.h"
35
36 enum qfile {
37 QFILE_NULL,
38 QFILE_TEMP,
39 QFILE_VARY,
40 QFILE_UNIF,
41 QFILE_VPM,
42
43 /**
44 * Stores an immediate value in the index field that can be turned
45 * into a small immediate field by qpu_encode_small_immediate().
46 */
47 QFILE_SMALL_IMM,
48 };
49
50 struct qreg {
51 enum qfile file;
52 uint32_t index;
53 };
54
55 enum qop {
56 QOP_UNDEF,
57 QOP_MOV,
58 QOP_FADD,
59 QOP_FSUB,
60 QOP_FMUL,
61 QOP_MUL24,
62 QOP_FMIN,
63 QOP_FMAX,
64 QOP_FMINABS,
65 QOP_FMAXABS,
66 QOP_ADD,
67 QOP_SUB,
68 QOP_SHL,
69 QOP_SHR,
70 QOP_ASR,
71 QOP_MIN,
72 QOP_MAX,
73 QOP_AND,
74 QOP_OR,
75 QOP_XOR,
76 QOP_NOT,
77
78 /* Sets the flag register according to src. */
79 QOP_SF,
80
81 /* Note: Orderings of these compares must be the same as in
82 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
83 * otherwise 0. */
84 QOP_SEL_X_0_ZS,
85 QOP_SEL_X_0_ZC,
86 QOP_SEL_X_0_NS,
87 QOP_SEL_X_0_NC,
88 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
89 QOP_SEL_X_Y_ZS,
90 QOP_SEL_X_Y_ZC,
91 QOP_SEL_X_Y_NS,
92 QOP_SEL_X_Y_NC,
93
94 QOP_FTOI,
95 QOP_ITOF,
96 QOP_RCP,
97 QOP_RSQ,
98 QOP_EXP2,
99 QOP_LOG2,
100 QOP_VW_SETUP,
101 QOP_VR_SETUP,
102 QOP_PACK_SCALED,
103 QOP_PACK_8888_F,
104 QOP_PACK_8A_F,
105 QOP_PACK_8B_F,
106 QOP_PACK_8C_F,
107 QOP_PACK_8D_F,
108 QOP_TLB_DISCARD_SETUP,
109 QOP_TLB_STENCIL_SETUP,
110 QOP_TLB_Z_WRITE,
111 QOP_TLB_COLOR_WRITE,
112 QOP_TLB_COLOR_READ,
113 QOP_VARY_ADD_C,
114
115 QOP_FRAG_X,
116 QOP_FRAG_Y,
117 QOP_FRAG_Z,
118 QOP_FRAG_W,
119 QOP_FRAG_REV_FLAG,
120
121 QOP_UNPACK_8A_F,
122 QOP_UNPACK_8B_F,
123 QOP_UNPACK_8C_F,
124 QOP_UNPACK_8D_F,
125 QOP_UNPACK_16A_F,
126 QOP_UNPACK_16B_F,
127
128 QOP_UNPACK_8A_I,
129 QOP_UNPACK_8B_I,
130 QOP_UNPACK_8C_I,
131 QOP_UNPACK_8D_I,
132 QOP_UNPACK_16A_I,
133 QOP_UNPACK_16B_I,
134
135 /** Texture x coordinate parameter write */
136 QOP_TEX_S,
137 /** Texture y coordinate parameter write */
138 QOP_TEX_T,
139 /** Texture border color parameter or cube map z coordinate write */
140 QOP_TEX_R,
141 /** Texture LOD bias parameter write */
142 QOP_TEX_B,
143
144 /**
145 * Texture-unit 4-byte read with address provided direct in S
146 * cooordinate.
147 *
148 * The first operand is the offset from the start of the UBO, and the
149 * second is the uniform that has the UBO's base pointer.
150 */
151 QOP_TEX_DIRECT,
152
153 /**
154 * Signal of texture read being necessary and then reading r4 into
155 * the destination
156 */
157 QOP_TEX_RESULT,
158 QOP_R4_UNPACK_A,
159 QOP_R4_UNPACK_B,
160 QOP_R4_UNPACK_C,
161 QOP_R4_UNPACK_D
162 };
163
164 struct simple_node {
165 struct simple_node *next;
166 struct simple_node *prev;
167 };
168
169 struct queued_qpu_inst {
170 struct simple_node link;
171 uint64_t inst;
172 };
173
174 struct qinst {
175 struct simple_node link;
176
177 enum qop op;
178 struct qreg dst;
179 struct qreg *src;
180 };
181
182 enum qstage {
183 /**
184 * Coordinate shader, runs during binning, before the VS, and just
185 * outputs position.
186 */
187 QSTAGE_COORD,
188 QSTAGE_VERT,
189 QSTAGE_FRAG,
190 };
191
192 enum quniform_contents {
193 /**
194 * Indicates that a constant 32-bit value is copied from the program's
195 * uniform contents.
196 */
197 QUNIFORM_CONSTANT,
198 /**
199 * Indicates that the program's uniform contents are used as an index
200 * into the GL uniform storage.
201 */
202 QUNIFORM_UNIFORM,
203
204 /** @{
205 * Scaling factors from clip coordinates to relative to the viewport
206 * center.
207 *
208 * This is used by the coordinate and vertex shaders to produce the
209 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
210 * point offsets from the viewport ccenter.
211 */
212 QUNIFORM_VIEWPORT_X_SCALE,
213 QUNIFORM_VIEWPORT_Y_SCALE,
214 /** @} */
215
216 QUNIFORM_VIEWPORT_Z_OFFSET,
217 QUNIFORM_VIEWPORT_Z_SCALE,
218
219 QUNIFORM_USER_CLIP_PLANE,
220
221 /**
222 * A reference to a texture config parameter 0 uniform.
223 *
224 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
225 * defines texture type, miplevels, and such. It will be found as a
226 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
227 */
228 QUNIFORM_TEXTURE_CONFIG_P0,
229
230 /**
231 * A reference to a texture config parameter 1 uniform.
232 *
233 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
234 * defines texture width, height, filters, and wrap modes. It will be
235 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
236 * sequence.
237 */
238 QUNIFORM_TEXTURE_CONFIG_P1,
239
240 /** A reference to a texture config parameter 2 cubemap stride uniform */
241 QUNIFORM_TEXTURE_CONFIG_P2,
242
243 QUNIFORM_UBO_ADDR,
244
245 QUNIFORM_TEXRECT_SCALE_X,
246 QUNIFORM_TEXRECT_SCALE_Y,
247
248 QUNIFORM_TEXTURE_BORDER_COLOR,
249
250 QUNIFORM_BLEND_CONST_COLOR,
251 QUNIFORM_STENCIL,
252
253 QUNIFORM_ALPHA_REF,
254 };
255
256 struct vc4_varying_semantic {
257 uint8_t semantic;
258 uint8_t index;
259 uint8_t swizzle;
260 };
261
262 struct vc4_compiler_ubo_range {
263 /**
264 * offset in bytes from the start of the ubo where this range is
265 * uploaded.
266 *
267 * Only set once used is set.
268 */
269 uint32_t dst_offset;
270
271 /**
272 * offset in bytes from the start of the gallium uniforms where the
273 * data comes from.
274 */
275 uint32_t src_offset;
276
277 /** size in bytes of this ubo range */
278 uint32_t size;
279
280 /**
281 * Set if this range is used by the shader for indirect uniforms
282 * access.
283 */
284 bool used;
285 };
286
287 struct vc4_compile {
288 struct vc4_context *vc4;
289 struct tgsi_parse_context parser;
290 struct qreg *temps;
291 /**
292 * Inputs to the shader, arranged by TGSI declaration order.
293 *
294 * Not all fragment shader QFILE_VARY reads are present in this array.
295 */
296 struct qreg *inputs;
297 struct qreg *outputs;
298 struct qreg *consts;
299 struct qreg addr[4]; /* TGSI ARL destination. */
300 uint32_t temps_array_size;
301 uint32_t inputs_array_size;
302 uint32_t outputs_array_size;
303 uint32_t uniforms_array_size;
304 uint32_t consts_array_size;
305 uint32_t num_consts;
306
307 struct vc4_compiler_ubo_range *ubo_ranges;
308 uint32_t ubo_ranges_array_size;
309 uint32_t num_ubo_ranges;
310 uint32_t next_ubo_dst_offset;
311
312 struct qreg line_x, point_x, point_y;
313 struct qreg discard;
314
315 /**
316 * Array of the TGSI semantics of all FS QFILE_VARY reads.
317 *
318 * This includes those that aren't part of the VPM varyings, like
319 * point/line coordinates.
320 */
321 struct vc4_varying_semantic *input_semantics;
322 uint32_t num_input_semantics;
323 uint32_t input_semantics_array_size;
324
325 /**
326 * An entry per outputs[] in the VS indicating what the semantic of
327 * the output is. Used to emit from the VS in the order that the FS
328 * needs.
329 */
330 struct vc4_varying_semantic *output_semantics;
331
332 struct pipe_shader_state *shader_state;
333 struct vc4_key *key;
334 struct vc4_fs_key *fs_key;
335 struct vc4_vs_key *vs_key;
336
337 uint32_t *uniform_data;
338 enum quniform_contents *uniform_contents;
339 uint32_t uniform_array_size;
340 uint32_t num_uniforms;
341 uint32_t num_outputs;
342 uint32_t num_texture_samples;
343 uint32_t output_position_index;
344 uint32_t output_clipvertex_index;
345 uint32_t output_color_index;
346 uint32_t output_point_size_index;
347
348 struct qreg undef;
349 enum qstage stage;
350 uint32_t num_temps;
351 struct simple_node instructions;
352 uint32_t immediates[1024];
353
354 struct simple_node qpu_inst_list;
355 uint64_t *qpu_insts;
356 uint32_t qpu_inst_count;
357 uint32_t qpu_inst_size;
358 uint32_t num_inputs;
359
360 uint32_t program_id;
361 uint32_t variant_id;
362 };
363
364 struct vc4_compile *qir_compile_init(void);
365 void qir_compile_destroy(struct vc4_compile *c);
366 struct qinst *qir_inst(enum qop op, struct qreg dst,
367 struct qreg src0, struct qreg src1);
368 struct qinst *qir_inst4(enum qop op, struct qreg dst,
369 struct qreg a,
370 struct qreg b,
371 struct qreg c,
372 struct qreg d);
373 void qir_remove_instruction(struct qinst *qinst);
374 void qir_reorder_uniforms(struct vc4_compile *c);
375 void qir_emit(struct vc4_compile *c, struct qinst *inst);
376 struct qreg qir_get_temp(struct vc4_compile *c);
377 int qir_get_op_nsrc(enum qop qop);
378 bool qir_reg_equals(struct qreg a, struct qreg b);
379 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
380 bool qir_is_multi_instruction(struct qinst *inst);
381 bool qir_depends_on_flags(struct qinst *inst);
382 bool qir_writes_r4(struct qinst *inst);
383 bool qir_reads_r4(struct qinst *inst);
384 struct qreg qir_follow_movs(struct qinst **defs, struct qreg reg);
385
386 void qir_dump(struct vc4_compile *c);
387 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
388 const char *qir_get_stage_name(enum qstage stage);
389
390 void qir_optimize(struct vc4_compile *c);
391 bool qir_opt_algebraic(struct vc4_compile *c);
392 bool qir_opt_copy_propagation(struct vc4_compile *c);
393 bool qir_opt_cse(struct vc4_compile *c);
394 bool qir_opt_dead_code(struct vc4_compile *c);
395 bool qir_opt_small_immediates(struct vc4_compile *c);
396 bool qir_opt_vpm_writes(struct vc4_compile *c);
397
398 void qpu_schedule_instructions(struct vc4_compile *c);
399
400 #define QIR_ALU0(name) \
401 static inline struct qreg \
402 qir_##name(struct vc4_compile *c) \
403 { \
404 struct qreg t = qir_get_temp(c); \
405 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
406 return t; \
407 }
408
409 #define QIR_ALU1(name) \
410 static inline struct qreg \
411 qir_##name(struct vc4_compile *c, struct qreg a) \
412 { \
413 struct qreg t = qir_get_temp(c); \
414 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
415 return t; \
416 }
417
418 #define QIR_ALU2(name) \
419 static inline struct qreg \
420 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
421 { \
422 struct qreg t = qir_get_temp(c); \
423 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
424 return t; \
425 }
426
427 #define QIR_NODST_1(name) \
428 static inline void \
429 qir_##name(struct vc4_compile *c, struct qreg a) \
430 { \
431 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
432 }
433
434 #define QIR_NODST_2(name) \
435 static inline void \
436 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
437 { \
438 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
439 }
440
441 QIR_ALU1(MOV)
442 QIR_ALU2(FADD)
443 QIR_ALU2(FSUB)
444 QIR_ALU2(FMUL)
445 QIR_ALU2(MUL24)
446 QIR_NODST_1(SF)
447 QIR_ALU1(SEL_X_0_ZS)
448 QIR_ALU1(SEL_X_0_ZC)
449 QIR_ALU1(SEL_X_0_NS)
450 QIR_ALU1(SEL_X_0_NC)
451 QIR_ALU2(SEL_X_Y_ZS)
452 QIR_ALU2(SEL_X_Y_ZC)
453 QIR_ALU2(SEL_X_Y_NS)
454 QIR_ALU2(SEL_X_Y_NC)
455 QIR_ALU2(FMIN)
456 QIR_ALU2(FMAX)
457 QIR_ALU2(FMINABS)
458 QIR_ALU2(FMAXABS)
459 QIR_ALU1(FTOI)
460 QIR_ALU1(ITOF)
461
462 QIR_ALU2(ADD)
463 QIR_ALU2(SUB)
464 QIR_ALU2(SHL)
465 QIR_ALU2(SHR)
466 QIR_ALU2(ASR)
467 QIR_ALU2(MIN)
468 QIR_ALU2(MAX)
469 QIR_ALU2(AND)
470 QIR_ALU2(OR)
471 QIR_ALU2(XOR)
472 QIR_ALU1(NOT)
473
474 QIR_ALU1(RCP)
475 QIR_ALU1(RSQ)
476 QIR_ALU1(EXP2)
477 QIR_ALU1(LOG2)
478 QIR_ALU2(PACK_SCALED)
479 QIR_ALU1(PACK_8888_F)
480 QIR_ALU2(PACK_8A_F)
481 QIR_ALU2(PACK_8B_F)
482 QIR_ALU2(PACK_8C_F)
483 QIR_ALU2(PACK_8D_F)
484 QIR_ALU1(VARY_ADD_C)
485 QIR_NODST_2(TEX_S)
486 QIR_NODST_2(TEX_T)
487 QIR_NODST_2(TEX_R)
488 QIR_NODST_2(TEX_B)
489 QIR_NODST_2(TEX_DIRECT)
490 QIR_ALU0(FRAG_X)
491 QIR_ALU0(FRAG_Y)
492 QIR_ALU0(FRAG_Z)
493 QIR_ALU0(FRAG_W)
494 QIR_ALU0(FRAG_REV_FLAG)
495 QIR_ALU0(TEX_RESULT)
496 QIR_ALU0(TLB_COLOR_READ)
497 QIR_NODST_1(TLB_Z_WRITE)
498 QIR_NODST_1(TLB_DISCARD_SETUP)
499 QIR_NODST_1(TLB_STENCIL_SETUP)
500
501 static inline struct qreg
502 qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
503 {
504 struct qreg t = qir_get_temp(c);
505 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
506 return t;
507 }
508
509 static inline struct qreg
510 qir_SEL_X_0_COND(struct vc4_compile *c, int i)
511 {
512 struct qreg t = qir_get_temp(c);
513 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
514 return t;
515 }
516
517 static inline struct qreg
518 qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
519 {
520 struct qreg t = qir_get_temp(c);
521 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef));
522 return t;
523 }
524
525 static inline struct qreg
526 qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
527 {
528 struct qreg t = qir_get_temp(c);
529 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef));
530 return t;
531 }
532
533 static inline struct qreg
534 qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
535 {
536 struct qreg t = qir_get_temp(c);
537 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef));
538 return t;
539 }
540
541 static inline struct qreg
542 qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
543 {
544 struct qreg t = qir_get_temp(c);
545 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef));
546 return t;
547 }
548
549 static inline struct qreg
550 qir_PACK_8_F(struct vc4_compile *c, struct qreg rest, struct qreg val, int chan)
551 {
552 struct qreg t = qir_get_temp(c);
553 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, t, rest, val));
554 return t;
555 }
556
557 static inline struct qreg
558 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
559 {
560 return qir_EXP2(c, qir_FMUL(c,
561 y,
562 qir_LOG2(c, x)));
563 }
564
565 static inline void
566 qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
567 {
568 static const struct qreg vpm = { QFILE_VPM, 0 };
569 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
570 }
571
572 #endif /* VC4_QIR_H */