vc4: Add support for ARL and indirect register access on TGSI_FILE_CONSTANT.
[mesa.git] / src / gallium / drivers / vc4 / vc4_qir.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_QIR_H
25 #define VC4_QIR_H
26
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdbool.h>
30 #include <stdint.h>
31 #include <string.h>
32
33 #include "util/u_simple_list.h"
34 #include "tgsi/tgsi_parse.h"
35
36 enum qfile {
37 QFILE_NULL,
38 QFILE_TEMP,
39 QFILE_VARY,
40 QFILE_UNIF,
41 };
42
43 struct qreg {
44 enum qfile file;
45 uint32_t index;
46 };
47
48 enum qop {
49 QOP_UNDEF,
50 QOP_MOV,
51 QOP_FADD,
52 QOP_FSUB,
53 QOP_FMUL,
54 QOP_MUL24,
55 QOP_FMIN,
56 QOP_FMAX,
57 QOP_FMINABS,
58 QOP_FMAXABS,
59 QOP_ADD,
60 QOP_SUB,
61 QOP_SHL,
62 QOP_SHR,
63 QOP_ASR,
64 QOP_MIN,
65 QOP_MAX,
66 QOP_AND,
67 QOP_OR,
68 QOP_XOR,
69 QOP_NOT,
70
71 /* Sets the flag register according to src. */
72 QOP_SF,
73
74 /* Note: Orderings of these compares must be the same as in
75 * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
76 * otherwise 0. */
77 QOP_SEL_X_0_ZS,
78 QOP_SEL_X_0_ZC,
79 QOP_SEL_X_0_NS,
80 QOP_SEL_X_0_NC,
81 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
82 QOP_SEL_X_Y_ZS,
83 QOP_SEL_X_Y_ZC,
84 QOP_SEL_X_Y_NS,
85 QOP_SEL_X_Y_NC,
86
87 QOP_FTOI,
88 QOP_ITOF,
89 QOP_RCP,
90 QOP_RSQ,
91 QOP_EXP2,
92 QOP_LOG2,
93 QOP_VW_SETUP,
94 QOP_VR_SETUP,
95 QOP_PACK_SCALED,
96 QOP_PACK_COLORS,
97 QOP_VPM_WRITE,
98 QOP_VPM_READ,
99 QOP_TLB_DISCARD_SETUP,
100 QOP_TLB_STENCIL_SETUP,
101 QOP_TLB_Z_WRITE,
102 QOP_TLB_COLOR_WRITE,
103 QOP_TLB_COLOR_READ,
104 QOP_VARY_ADD_C,
105
106 QOP_FRAG_X,
107 QOP_FRAG_Y,
108 QOP_FRAG_Z,
109 QOP_FRAG_W,
110 QOP_FRAG_REV_FLAG,
111
112 QOP_UNPACK_8A,
113 QOP_UNPACK_8B,
114 QOP_UNPACK_8C,
115 QOP_UNPACK_8D,
116
117 /** Texture x coordinate parameter write */
118 QOP_TEX_S,
119 /** Texture y coordinate parameter write */
120 QOP_TEX_T,
121 /** Texture border color parameter or cube map z coordinate write */
122 QOP_TEX_R,
123 /** Texture LOD bias parameter write */
124 QOP_TEX_B,
125
126 /**
127 * Texture-unit 4-byte read with address provided direct in S
128 * cooordinate.
129 *
130 * The first operand is the offset from the start of the UBO, and the
131 * second is the uniform that has the UBO's base pointer.
132 */
133 QOP_TEX_DIRECT,
134
135 /**
136 * Signal of texture read being necessary and then reading r4 into
137 * the destination
138 */
139 QOP_TEX_RESULT,
140 QOP_R4_UNPACK_A,
141 QOP_R4_UNPACK_B,
142 QOP_R4_UNPACK_C,
143 QOP_R4_UNPACK_D
144 };
145
146 struct simple_node {
147 struct simple_node *next;
148 struct simple_node *prev;
149 };
150
151 struct qinst {
152 struct simple_node link;
153
154 enum qop op;
155 struct qreg dst;
156 struct qreg *src;
157 };
158
159 enum qstage {
160 /**
161 * Coordinate shader, runs during binning, before the VS, and just
162 * outputs position.
163 */
164 QSTAGE_COORD,
165 QSTAGE_VERT,
166 QSTAGE_FRAG,
167 };
168
169 enum quniform_contents {
170 /**
171 * Indicates that a constant 32-bit value is copied from the program's
172 * uniform contents.
173 */
174 QUNIFORM_CONSTANT,
175 /**
176 * Indicates that the program's uniform contents are used as an index
177 * into the GL uniform storage.
178 */
179 QUNIFORM_UNIFORM,
180
181 /** @{
182 * Scaling factors from clip coordinates to relative to the viewport
183 * center.
184 *
185 * This is used by the coordinate and vertex shaders to produce the
186 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
187 * point offsets from the viewport ccenter.
188 */
189 QUNIFORM_VIEWPORT_X_SCALE,
190 QUNIFORM_VIEWPORT_Y_SCALE,
191 /** @} */
192
193 QUNIFORM_VIEWPORT_Z_OFFSET,
194 QUNIFORM_VIEWPORT_Z_SCALE,
195
196 QUNIFORM_USER_CLIP_PLANE,
197
198 /**
199 * A reference to a texture config parameter 0 uniform.
200 *
201 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
202 * defines texture type, miplevels, and such. It will be found as a
203 * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
204 */
205 QUNIFORM_TEXTURE_CONFIG_P0,
206
207 /**
208 * A reference to a texture config parameter 1 uniform.
209 *
210 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
211 * defines texture width, height, filters, and wrap modes. It will be
212 * found as a parameter to the second QOP_TEX_[STRB] instruction in a
213 * sequence.
214 */
215 QUNIFORM_TEXTURE_CONFIG_P1,
216
217 /** A reference to a texture config parameter 2 cubemap stride uniform */
218 QUNIFORM_TEXTURE_CONFIG_P2,
219
220 QUNIFORM_UBO_ADDR,
221
222 QUNIFORM_TEXRECT_SCALE_X,
223 QUNIFORM_TEXRECT_SCALE_Y,
224
225 QUNIFORM_TEXTURE_BORDER_COLOR,
226
227 QUNIFORM_BLEND_CONST_COLOR,
228 QUNIFORM_STENCIL,
229
230 QUNIFORM_ALPHA_REF,
231 };
232
233 struct vc4_varying_semantic {
234 uint8_t semantic;
235 uint8_t index;
236 uint8_t swizzle;
237 };
238
239 struct vc4_compiler_ubo_range {
240 /**
241 * offset in bytes from the start of the ubo where this range is
242 * uploaded.
243 *
244 * Only set once used is set.
245 */
246 uint32_t dst_offset;
247
248 /**
249 * offset in bytes from the start of the gallium uniforms where the
250 * data comes from.
251 */
252 uint32_t src_offset;
253
254 /** size in bytes of this ubo range */
255 uint32_t size;
256
257 /**
258 * Set if this range is used by the shader for indirect uniforms
259 * access.
260 */
261 bool used;
262 };
263
264 struct vc4_compile {
265 struct vc4_context *vc4;
266 struct tgsi_parse_context parser;
267 struct qreg *temps;
268 /**
269 * Inputs to the shader, arranged by TGSI declaration order.
270 *
271 * Not all fragment shader QFILE_VARY reads are present in this array.
272 */
273 struct qreg *inputs;
274 struct qreg *outputs;
275 struct qreg *consts;
276 struct qreg addr[4]; /* TGSI ARL destination. */
277 uint32_t temps_array_size;
278 uint32_t inputs_array_size;
279 uint32_t outputs_array_size;
280 uint32_t uniforms_array_size;
281 uint32_t consts_array_size;
282 uint32_t num_consts;
283
284 struct vc4_compiler_ubo_range *ubo_ranges;
285 uint32_t ubo_ranges_array_size;
286 uint32_t num_ubo_ranges;
287 uint32_t next_ubo_dst_offset;
288
289 struct qreg line_x, point_x, point_y;
290 struct qreg discard;
291
292 /**
293 * Array of the TGSI semantics of all FS QFILE_VARY reads.
294 *
295 * This includes those that aren't part of the VPM varyings, like
296 * point/line coordinates.
297 */
298 struct vc4_varying_semantic *input_semantics;
299 uint32_t num_input_semantics;
300 uint32_t input_semantics_array_size;
301
302 /**
303 * An entry per outputs[] in the VS indicating what the semantic of
304 * the output is. Used to emit from the VS in the order that the FS
305 * needs.
306 */
307 struct vc4_varying_semantic *output_semantics;
308
309 struct pipe_shader_state *shader_state;
310 struct vc4_key *key;
311 struct vc4_fs_key *fs_key;
312 struct vc4_vs_key *vs_key;
313
314 uint32_t *uniform_data;
315 enum quniform_contents *uniform_contents;
316 uint32_t uniform_array_size;
317 uint32_t num_uniforms;
318 uint32_t num_outputs;
319 uint32_t num_texture_samples;
320 uint32_t output_position_index;
321 uint32_t output_clipvertex_index;
322 uint32_t output_color_index;
323 uint32_t output_point_size_index;
324
325 struct qreg undef;
326 enum qstage stage;
327 uint32_t num_temps;
328 struct simple_node instructions;
329 uint32_t immediates[1024];
330
331 struct simple_node qpu_inst_list;
332 uint64_t *qpu_insts;
333 uint32_t qpu_inst_count;
334 uint32_t qpu_inst_size;
335 uint32_t num_inputs;
336
337 uint32_t program_id;
338 uint32_t variant_id;
339 };
340
341 struct vc4_compile *qir_compile_init(void);
342 void qir_compile_destroy(struct vc4_compile *c);
343 struct qinst *qir_inst(enum qop op, struct qreg dst,
344 struct qreg src0, struct qreg src1);
345 struct qinst *qir_inst4(enum qop op, struct qreg dst,
346 struct qreg a,
347 struct qreg b,
348 struct qreg c,
349 struct qreg d);
350 void qir_remove_instruction(struct qinst *qinst);
351 void qir_reorder_uniforms(struct vc4_compile *c);
352 void qir_emit(struct vc4_compile *c, struct qinst *inst);
353 struct qreg qir_get_temp(struct vc4_compile *c);
354 int qir_get_op_nsrc(enum qop qop);
355 bool qir_reg_equals(struct qreg a, struct qreg b);
356 bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
357 bool qir_depends_on_flags(struct qinst *inst);
358 bool qir_writes_r4(struct qinst *inst);
359 bool qir_reads_r4(struct qinst *inst);
360
361 void qir_dump(struct vc4_compile *c);
362 void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
363 const char *qir_get_stage_name(enum qstage stage);
364
365 void qir_optimize(struct vc4_compile *c);
366 bool qir_opt_algebraic(struct vc4_compile *c);
367 bool qir_opt_copy_propagation(struct vc4_compile *c);
368 bool qir_opt_cse(struct vc4_compile *c);
369 bool qir_opt_dead_code(struct vc4_compile *c);
370
371 #define QIR_ALU0(name) \
372 static inline struct qreg \
373 qir_##name(struct vc4_compile *c) \
374 { \
375 struct qreg t = qir_get_temp(c); \
376 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
377 return t; \
378 }
379
380 #define QIR_ALU1(name) \
381 static inline struct qreg \
382 qir_##name(struct vc4_compile *c, struct qreg a) \
383 { \
384 struct qreg t = qir_get_temp(c); \
385 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
386 return t; \
387 }
388
389 #define QIR_ALU2(name) \
390 static inline struct qreg \
391 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
392 { \
393 struct qreg t = qir_get_temp(c); \
394 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
395 return t; \
396 }
397
398 #define QIR_NODST_1(name) \
399 static inline void \
400 qir_##name(struct vc4_compile *c, struct qreg a) \
401 { \
402 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
403 }
404
405 #define QIR_NODST_2(name) \
406 static inline void \
407 qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
408 { \
409 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
410 }
411
412 QIR_ALU1(MOV)
413 QIR_ALU2(FADD)
414 QIR_ALU2(FSUB)
415 QIR_ALU2(FMUL)
416 QIR_ALU2(MUL24)
417 QIR_NODST_1(SF)
418 QIR_ALU1(SEL_X_0_ZS)
419 QIR_ALU1(SEL_X_0_ZC)
420 QIR_ALU1(SEL_X_0_NS)
421 QIR_ALU1(SEL_X_0_NC)
422 QIR_ALU2(SEL_X_Y_ZS)
423 QIR_ALU2(SEL_X_Y_ZC)
424 QIR_ALU2(SEL_X_Y_NS)
425 QIR_ALU2(SEL_X_Y_NC)
426 QIR_ALU2(FMIN)
427 QIR_ALU2(FMAX)
428 QIR_ALU2(FMINABS)
429 QIR_ALU2(FMAXABS)
430 QIR_ALU1(FTOI)
431 QIR_ALU1(ITOF)
432
433 QIR_ALU2(ADD)
434 QIR_ALU2(SUB)
435 QIR_ALU2(SHL)
436 QIR_ALU2(SHR)
437 QIR_ALU2(ASR)
438 QIR_ALU2(MIN)
439 QIR_ALU2(MAX)
440 QIR_ALU2(AND)
441 QIR_ALU2(OR)
442 QIR_ALU2(XOR)
443 QIR_ALU1(NOT)
444
445 QIR_ALU1(RCP)
446 QIR_ALU1(RSQ)
447 QIR_ALU1(EXP2)
448 QIR_ALU1(LOG2)
449 QIR_ALU2(PACK_SCALED)
450 QIR_ALU1(VARY_ADD_C)
451 QIR_NODST_1(VPM_WRITE)
452 QIR_NODST_2(TEX_S)
453 QIR_NODST_2(TEX_T)
454 QIR_NODST_2(TEX_R)
455 QIR_NODST_2(TEX_B)
456 QIR_NODST_2(TEX_DIRECT)
457 QIR_ALU0(FRAG_X)
458 QIR_ALU0(FRAG_Y)
459 QIR_ALU0(FRAG_Z)
460 QIR_ALU0(FRAG_W)
461 QIR_ALU0(FRAG_REV_FLAG)
462 QIR_ALU0(TEX_RESULT)
463 QIR_ALU0(TLB_COLOR_READ)
464 QIR_NODST_1(TLB_Z_WRITE)
465 QIR_NODST_1(TLB_DISCARD_SETUP)
466 QIR_NODST_1(TLB_STENCIL_SETUP)
467
468 static inline struct qreg
469 qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
470 {
471 struct qreg t = qir_get_temp(c);
472 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
473 return t;
474 }
475
476 static inline struct qreg
477 qir_SEL_X_0_COND(struct vc4_compile *c, int i)
478 {
479 struct qreg t = qir_get_temp(c);
480 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
481 return t;
482 }
483
484 static inline struct qreg
485 qir_UNPACK_8(struct vc4_compile *c, struct qreg src, int i)
486 {
487 struct qreg t = qir_get_temp(c);
488 qir_emit(c, qir_inst(QOP_UNPACK_8A + i, t, src, c->undef));
489 return t;
490 }
491
492 static inline struct qreg
493 qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
494 {
495 return qir_EXP2(c, qir_FMUL(c,
496 y,
497 qir_LOG2(c, x)));
498 }
499
500 #endif /* VC4_QIR_H */