146929637ec997752dd4768967d147c78a2a503c
[mesa.git] / src / gallium / drivers / vc4 / vc4_resource.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_memory.h"
26 #include "util/u_format.h"
27 #include "util/u_inlines.h"
28 #include "util/u_surface.h"
29 #include "util/u_upload_mgr.h"
30
31 #include "vc4_screen.h"
32 #include "vc4_context.h"
33 #include "vc4_resource.h"
34 #include "vc4_tiling.h"
35
36 static bool miptree_debug = false;
37
38 static void
39 vc4_resource_bo_alloc(struct vc4_resource *rsc)
40 {
41 struct pipe_resource *prsc = &rsc->base.b;
42 struct pipe_screen *pscreen = prsc->screen;
43
44 if (miptree_debug) {
45 fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
46 rsc,
47 rsc->slices[0].size,
48 rsc->slices[0].offset,
49 rsc->slices[0].offset +
50 rsc->slices[0].size +
51 rsc->cube_map_stride * (prsc->array_size - 1));
52 }
53
54 vc4_bo_unreference(&rsc->bo);
55 rsc->bo = vc4_bo_alloc(vc4_screen(pscreen),
56 rsc->slices[0].offset +
57 rsc->slices[0].size +
58 rsc->cube_map_stride * (prsc->array_size - 1),
59 "resource");
60 }
61
62 static void
63 vc4_resource_transfer_unmap(struct pipe_context *pctx,
64 struct pipe_transfer *ptrans)
65 {
66 struct vc4_context *vc4 = vc4_context(pctx);
67 struct vc4_transfer *trans = vc4_transfer(ptrans);
68 struct pipe_resource *prsc = ptrans->resource;
69 struct vc4_resource *rsc = vc4_resource(prsc);
70 struct vc4_resource_slice *slice = &rsc->slices[ptrans->level];
71
72 if (trans->map) {
73 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
74 vc4_store_tiled_image(rsc->bo->map + slice->offset +
75 ptrans->box.z * rsc->cube_map_stride,
76 slice->stride,
77 trans->map, ptrans->stride,
78 slice->tiling, rsc->cpp,
79 &ptrans->box);
80 }
81 free(trans->map);
82 }
83
84 pipe_resource_reference(&ptrans->resource, NULL);
85 util_slab_free(&vc4->transfer_pool, ptrans);
86 }
87
88 static void *
89 vc4_resource_transfer_map(struct pipe_context *pctx,
90 struct pipe_resource *prsc,
91 unsigned level, unsigned usage,
92 const struct pipe_box *box,
93 struct pipe_transfer **pptrans)
94 {
95 struct vc4_context *vc4 = vc4_context(pctx);
96 struct vc4_resource *rsc = vc4_resource(prsc);
97 struct vc4_resource_slice *slice = &rsc->slices[level];
98 struct vc4_transfer *trans;
99 struct pipe_transfer *ptrans;
100 enum pipe_format format = prsc->format;
101 char *buf;
102
103 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
104 vc4_resource_bo_alloc(rsc);
105
106 /* If it might be bound as one of our vertex buffers, make
107 * sure we re-emit vertex buffer state.
108 */
109 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
110 vc4->dirty |= VC4_DIRTY_VTXBUF;
111 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
112 if (vc4_cl_references_bo(pctx, rsc->bo)) {
113 if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
114 prsc->last_level == 0 &&
115 prsc->width0 == box->width &&
116 prsc->height0 == box->height &&
117 prsc->depth0 == box->depth) {
118 vc4_resource_bo_alloc(rsc);
119 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
120 vc4->dirty |= VC4_DIRTY_VTXBUF;
121 } else {
122 vc4_flush(pctx);
123 }
124 }
125 }
126
127 if (usage & PIPE_TRANSFER_WRITE)
128 rsc->writes++;
129
130 trans = util_slab_alloc(&vc4->transfer_pool);
131 if (!trans)
132 return NULL;
133
134 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
135
136 /* util_slab_alloc() doesn't zero: */
137 memset(trans, 0, sizeof(*trans));
138 ptrans = &trans->base;
139
140 pipe_resource_reference(&ptrans->resource, prsc);
141 ptrans->level = level;
142 ptrans->usage = usage;
143 ptrans->box = *box;
144
145 /* Note that the current kernel implementation is synchronous, so no
146 * need to do syncing stuff here yet.
147 */
148
149 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
150 buf = vc4_bo_map_unsynchronized(rsc->bo);
151 else
152 buf = vc4_bo_map(rsc->bo);
153 if (!buf) {
154 fprintf(stderr, "Failed to map bo\n");
155 goto fail;
156 }
157
158 *pptrans = ptrans;
159
160 if (rsc->tiled) {
161 uint32_t utile_w = vc4_utile_width(rsc->cpp);
162 uint32_t utile_h = vc4_utile_height(rsc->cpp);
163
164 /* No direct mappings of tiled, since we need to manually
165 * tile/untile.
166 */
167 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
168 return NULL;
169
170 /* We need to align the box to utile boundaries, since that's
171 * what load/store operate on.
172 */
173 uint32_t orig_width = ptrans->box.width;
174 uint32_t orig_height = ptrans->box.height;
175 uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
176 uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
177 ptrans->box.width += box_start_x;
178 ptrans->box.x -= box_start_x;
179 ptrans->box.height += box_start_y;
180 ptrans->box.y -= box_start_y;
181 ptrans->box.width = align(ptrans->box.width, utile_w);
182 ptrans->box.height = align(ptrans->box.height, utile_h);
183
184 ptrans->stride = ptrans->box.width * rsc->cpp;
185 ptrans->layer_stride = ptrans->stride;
186
187 trans->map = malloc(ptrans->stride * ptrans->box.height);
188 if (usage & PIPE_TRANSFER_READ ||
189 ptrans->box.width != orig_width ||
190 ptrans->box.height != orig_height) {
191 vc4_load_tiled_image(trans->map, ptrans->stride,
192 buf + slice->offset +
193 box->z * rsc->cube_map_stride,
194 slice->stride,
195 slice->tiling, rsc->cpp,
196 &ptrans->box);
197 }
198 return (trans->map +
199 box_start_x * rsc->cpp +
200 box_start_y * ptrans->stride);
201 } else {
202 ptrans->stride = slice->stride;
203 ptrans->layer_stride = ptrans->stride;
204
205 return buf + slice->offset +
206 box->y / util_format_get_blockheight(format) * ptrans->stride +
207 box->x / util_format_get_blockwidth(format) * rsc->cpp +
208 box->z * rsc->cube_map_stride;
209 }
210
211
212 fail:
213 vc4_resource_transfer_unmap(pctx, ptrans);
214 return NULL;
215 }
216
217 static void
218 vc4_resource_destroy(struct pipe_screen *pscreen,
219 struct pipe_resource *prsc)
220 {
221 struct vc4_resource *rsc = vc4_resource(prsc);
222 pipe_resource_reference(&rsc->shadow_parent, NULL);
223 vc4_bo_unreference(&rsc->bo);
224 free(rsc);
225 }
226
227 static boolean
228 vc4_resource_get_handle(struct pipe_screen *pscreen,
229 struct pipe_resource *prsc,
230 struct winsys_handle *handle)
231 {
232 struct vc4_resource *rsc = vc4_resource(prsc);
233
234 return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
235 handle);
236 }
237
238 static const struct u_resource_vtbl vc4_resource_vtbl = {
239 .resource_get_handle = vc4_resource_get_handle,
240 .resource_destroy = vc4_resource_destroy,
241 .transfer_map = vc4_resource_transfer_map,
242 .transfer_flush_region = u_default_transfer_flush_region,
243 .transfer_unmap = vc4_resource_transfer_unmap,
244 .transfer_inline_write = u_default_transfer_inline_write,
245 };
246
247 static void
248 vc4_setup_slices(struct vc4_resource *rsc)
249 {
250 struct pipe_resource *prsc = &rsc->base.b;
251 uint32_t width = prsc->width0;
252 uint32_t height = prsc->height0;
253 uint32_t pot_width = util_next_power_of_two(width);
254 uint32_t pot_height = util_next_power_of_two(height);
255 uint32_t offset = 0;
256 uint32_t utile_w = vc4_utile_width(rsc->cpp);
257 uint32_t utile_h = vc4_utile_height(rsc->cpp);
258
259 for (int i = prsc->last_level; i >= 0; i--) {
260 struct vc4_resource_slice *slice = &rsc->slices[i];
261
262 uint32_t level_width, level_height;
263 if (i == 0) {
264 level_width = width;
265 level_height = height;
266 } else {
267 level_width = u_minify(pot_width, i);
268 level_height = u_minify(pot_height, i);
269 }
270
271 if (!rsc->tiled) {
272 slice->tiling = VC4_TILING_FORMAT_LINEAR;
273 level_width = align(level_width, utile_w);
274 } else {
275 if (vc4_size_is_lt(level_width, level_height,
276 rsc->cpp)) {
277 slice->tiling = VC4_TILING_FORMAT_LT;
278 level_width = align(level_width, utile_w);
279 level_height = align(level_height, utile_h);
280 } else {
281 slice->tiling = VC4_TILING_FORMAT_T;
282 level_width = align(level_width,
283 4 * 2 * utile_w);
284 level_height = align(level_height,
285 4 * 2 * utile_h);
286 }
287 }
288
289 slice->offset = offset;
290 slice->stride = level_width * rsc->cpp;
291 slice->size = level_height * slice->stride;
292
293 offset += slice->size;
294
295 if (miptree_debug) {
296 static const char tiling_chars[] = {
297 [VC4_TILING_FORMAT_LINEAR] = 'R',
298 [VC4_TILING_FORMAT_LT] = 'L',
299 [VC4_TILING_FORMAT_T] = 'T'
300 };
301 fprintf(stderr,
302 "rsc setup %p (format %d), %dx%d: "
303 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
304 rsc, rsc->vc4_format,
305 prsc->width0, prsc->height0,
306 i, tiling_chars[slice->tiling],
307 level_width, level_height,
308 slice->stride, slice->offset);
309 }
310 }
311
312 /* The texture base pointer that has to point to level 0 doesn't have
313 * intra-page bits, so we have to align it, and thus shift up all the
314 * smaller slices.
315 */
316 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
317 rsc->slices[0].offset);
318 if (page_align_offset) {
319 for (int i = 0; i <= prsc->last_level; i++)
320 rsc->slices[i].offset += page_align_offset;
321 }
322
323 /* Cube map faces appear as whole miptrees at a page-aligned offset
324 * from the first face's miptree.
325 */
326 if (prsc->target == PIPE_TEXTURE_CUBE) {
327 rsc->cube_map_stride = align(rsc->slices[0].offset +
328 rsc->slices[0].size, 4096);
329 }
330 }
331
332 static struct vc4_resource *
333 vc4_resource_setup(struct pipe_screen *pscreen,
334 const struct pipe_resource *tmpl)
335 {
336 struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
337 if (!rsc)
338 return NULL;
339 struct pipe_resource *prsc = &rsc->base.b;
340
341 *prsc = *tmpl;
342
343 pipe_reference_init(&prsc->reference, 1);
344 prsc->screen = pscreen;
345
346 rsc->base.vtbl = &vc4_resource_vtbl;
347 rsc->cpp = util_format_get_blocksize(tmpl->format);
348
349 assert(rsc->cpp);
350
351 return rsc;
352 }
353
354 static enum vc4_texture_data_type
355 get_resource_texture_format(struct pipe_resource *prsc)
356 {
357 struct vc4_resource *rsc = vc4_resource(prsc);
358 uint8_t format = vc4_get_tex_format(prsc->format);
359
360 if (!rsc->tiled) {
361 assert(format == VC4_TEXTURE_TYPE_RGBA8888);
362 return VC4_TEXTURE_TYPE_RGBA32R;
363 }
364
365 return format;
366 }
367
368 struct pipe_resource *
369 vc4_resource_create(struct pipe_screen *pscreen,
370 const struct pipe_resource *tmpl)
371 {
372 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
373 struct pipe_resource *prsc = &rsc->base.b;
374
375 /* We have to make shared be untiled, since we don't have any way to
376 * communicate metadata about tiling currently.
377 */
378 if (tmpl->target == PIPE_BUFFER ||
379 (tmpl->bind & (PIPE_BIND_SCANOUT |
380 PIPE_BIND_LINEAR |
381 PIPE_BIND_SHARED |
382 PIPE_BIND_CURSOR))) {
383 rsc->tiled = false;
384 } else {
385 rsc->tiled = true;
386 }
387
388 if (tmpl->target != PIPE_BUFFER)
389 rsc->vc4_format = get_resource_texture_format(prsc);
390
391 vc4_setup_slices(rsc);
392 vc4_resource_bo_alloc(rsc);
393 if (!rsc->bo)
394 goto fail;
395
396 return prsc;
397 fail:
398 vc4_resource_destroy(pscreen, prsc);
399 return NULL;
400 }
401
402 static struct pipe_resource *
403 vc4_resource_from_handle(struct pipe_screen *pscreen,
404 const struct pipe_resource *tmpl,
405 struct winsys_handle *handle)
406 {
407 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
408 struct pipe_resource *prsc = &rsc->base.b;
409 struct vc4_resource_slice *slice = &rsc->slices[0];
410
411 if (!rsc)
412 return NULL;
413
414 rsc->tiled = false;
415 rsc->bo = vc4_screen_bo_from_handle(pscreen, handle);
416 if (!rsc->bo)
417 goto fail;
418
419 if (!using_vc4_simulator)
420 slice->stride = handle->stride;
421 else
422 slice->stride = align(prsc->width0 * rsc->cpp, 16);
423
424 slice->tiling = VC4_TILING_FORMAT_LINEAR;
425
426 rsc->vc4_format = get_resource_texture_format(prsc);
427
428 if (miptree_debug) {
429 fprintf(stderr,
430 "rsc import %p (format %d), %dx%d: "
431 "level 0 (R) -> stride %d@0x%08x\n",
432 rsc, rsc->vc4_format,
433 prsc->width0, prsc->height0,
434 slice->stride, slice->offset);
435 }
436
437 return prsc;
438
439 fail:
440 vc4_resource_destroy(pscreen, prsc);
441 return NULL;
442 }
443
444 static struct pipe_surface *
445 vc4_create_surface(struct pipe_context *pctx,
446 struct pipe_resource *ptex,
447 const struct pipe_surface *surf_tmpl)
448 {
449 struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
450 struct vc4_resource *rsc = vc4_resource(ptex);
451
452 if (!surface)
453 return NULL;
454
455 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
456
457 struct pipe_surface *psurf = &surface->base;
458 unsigned level = surf_tmpl->u.tex.level;
459
460 pipe_reference_init(&psurf->reference, 1);
461 pipe_resource_reference(&psurf->texture, ptex);
462
463 psurf->context = pctx;
464 psurf->format = surf_tmpl->format;
465 psurf->width = u_minify(ptex->width0, level);
466 psurf->height = u_minify(ptex->height0, level);
467 psurf->u.tex.level = level;
468 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
469 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
470 surface->offset = rsc->slices[level].offset;
471 surface->tiling = rsc->slices[level].tiling;
472
473 return &surface->base;
474 }
475
476 static void
477 vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
478 {
479 pipe_resource_reference(&psurf->texture, NULL);
480 FREE(psurf);
481 }
482
483 /** Debug routine to dump the contents of an 8888 surface to the console */
484 void
485 vc4_dump_surface(struct pipe_surface *psurf)
486 {
487 if (!psurf)
488 return;
489
490 struct pipe_resource *prsc = psurf->texture;
491 struct vc4_resource *rsc = vc4_resource(prsc);
492 uint32_t *map = vc4_bo_map(rsc->bo);
493 uint32_t stride = rsc->slices[0].stride / 4;
494 uint32_t width = psurf->width;
495 uint32_t height = psurf->height;
496 uint32_t chunk_w = width / 79;
497 uint32_t chunk_h = height / 40;
498 uint32_t found_colors[10];
499 uint32_t num_found_colors = 0;
500
501 if (rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R) {
502 fprintf(stderr, "%s: Unsupported format %s\n",
503 __func__, util_format_short_name(psurf->format));
504 return;
505 }
506
507 for (int by = 0; by < height; by += chunk_h) {
508 for (int bx = 0; bx < width; bx += chunk_w) {
509 int all_found_color = -1; /* nothing found */
510
511 for (int y = by; y < MIN2(height, by + chunk_h); y++) {
512 for (int x = bx; x < MIN2(width, bx + chunk_w); x++) {
513 uint32_t pix = map[y * stride + x];
514
515 int i;
516 for (i = 0; i < num_found_colors; i++) {
517 if (pix == found_colors[i])
518 break;
519 }
520 if (i == num_found_colors &&
521 num_found_colors <
522 ARRAY_SIZE(found_colors)) {
523 found_colors[num_found_colors++] = pix;
524 }
525
526 if (i < num_found_colors) {
527 if (all_found_color == -1)
528 all_found_color = i;
529 else if (i != all_found_color)
530 all_found_color = ARRAY_SIZE(found_colors);
531 }
532 }
533 }
534 /* If all pixels for this chunk have a consistent
535 * value, then print a character for it. Either a
536 * fixed name (particularly common for piglit tests),
537 * or a runtime-generated number.
538 */
539 if (all_found_color >= 0 &&
540 all_found_color < ARRAY_SIZE(found_colors)) {
541 static const struct {
542 uint32_t val;
543 const char *c;
544 } named_colors[] = {
545 { 0xff000000, "█" },
546 { 0x00000000, "█" },
547 { 0xffff0000, "r" },
548 { 0xff00ff00, "g" },
549 { 0xff0000ff, "b" },
550 { 0xffffffff, "w" },
551 };
552 int i;
553 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
554 if (named_colors[i].val ==
555 found_colors[all_found_color]) {
556 fprintf(stderr, "%s",
557 named_colors[i].c);
558 break;
559 }
560 }
561 /* For unnamed colors, print a number and the
562 * numbers will have values printed at the
563 * end.
564 */
565 if (i == ARRAY_SIZE(named_colors)) {
566 fprintf(stderr, "%c",
567 '0' + all_found_color);
568 }
569 } else {
570 /* If there's no consistent color, print this.
571 */
572 fprintf(stderr, ".");
573 }
574 }
575 fprintf(stderr, "\n");
576 }
577
578 for (int i = 0; i < num_found_colors; i++) {
579 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
580 }
581 }
582
583 static void
584 vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
585 {
586 /* All calls to flush_resource are followed by a flush of the context,
587 * so there's nothing to do.
588 */
589 }
590
591 void
592 vc4_update_shadow_baselevel_texture(struct pipe_context *pctx,
593 struct pipe_sampler_view *view)
594 {
595 struct vc4_resource *shadow = vc4_resource(view->texture);
596 struct vc4_resource *orig = vc4_resource(shadow->shadow_parent);
597 assert(orig);
598
599 if (shadow->writes == orig->writes && orig->bo->private)
600 return;
601
602 perf_debug("Updating shadow texture due to %s\n",
603 view->u.tex.first_level ? "base level" : "raster layout");
604
605 for (int i = 0; i <= shadow->base.b.last_level; i++) {
606 unsigned width = u_minify(shadow->base.b.width0, i);
607 unsigned height = u_minify(shadow->base.b.height0, i);
608 struct pipe_blit_info info = {
609 .dst = {
610 .resource = &shadow->base.b,
611 .level = i,
612 .box = {
613 .x = 0,
614 .y = 0,
615 .z = 0,
616 .width = width,
617 .height = height,
618 .depth = 1,
619 },
620 .format = shadow->base.b.format,
621 },
622 .src = {
623 .resource = &orig->base.b,
624 .level = view->u.tex.first_level + i,
625 .box = {
626 .x = 0,
627 .y = 0,
628 .z = 0,
629 .width = width,
630 .height = height,
631 .depth = 1,
632 },
633 .format = orig->base.b.format,
634 },
635 .mask = ~0,
636 };
637 pctx->blit(pctx, &info);
638 }
639
640 shadow->writes = orig->writes;
641 }
642
643 /**
644 * Converts a 4-byte index buffer to 2 bytes.
645 *
646 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
647 * include 4-byte index support, and we have to shrink it down.
648 *
649 * There's no fallback support for when indices end up being larger than 2^16,
650 * though it will at least assertion fail. Also, if the original index data
651 * was in user memory, it would be nice to not have uploaded it to a VBO
652 * before translating.
653 */
654 struct pipe_resource *
655 vc4_get_shadow_index_buffer(struct pipe_context *pctx,
656 const struct pipe_index_buffer *ib,
657 uint32_t count,
658 uint32_t *shadow_offset)
659 {
660 struct vc4_context *vc4 = vc4_context(pctx);
661 struct vc4_resource *orig = vc4_resource(ib->buffer);
662 perf_debug("Fallback conversion for %d uint indices\n", count);
663
664 void *data;
665 struct pipe_resource *shadow_rsc = NULL;
666 u_upload_alloc(vc4->uploader, 0, count * 2,
667 shadow_offset, &shadow_rsc, &data);
668 uint16_t *dst = data;
669
670 struct pipe_transfer *src_transfer = NULL;
671 const uint32_t *src;
672 if (ib->user_buffer) {
673 src = ib->user_buffer;
674 } else {
675 src = pipe_buffer_map_range(pctx, &orig->base.b,
676 ib->offset,
677 count * 4,
678 PIPE_TRANSFER_READ, &src_transfer);
679 }
680
681 for (int i = 0; i < count; i++) {
682 uint32_t src_index = src[i];
683 assert(src_index <= 0xffff);
684 dst[i] = src_index;
685 }
686
687 if (src_transfer)
688 pctx->transfer_unmap(pctx, src_transfer);
689
690 return shadow_rsc;
691 }
692
693 void
694 vc4_resource_screen_init(struct pipe_screen *pscreen)
695 {
696 pscreen->resource_create = vc4_resource_create;
697 pscreen->resource_from_handle = vc4_resource_from_handle;
698 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
699 pscreen->resource_destroy = u_resource_destroy_vtbl;
700 }
701
702 void
703 vc4_resource_context_init(struct pipe_context *pctx)
704 {
705 pctx->transfer_map = u_transfer_map_vtbl;
706 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
707 pctx->transfer_unmap = u_transfer_unmap_vtbl;
708 pctx->transfer_inline_write = u_transfer_inline_write_vtbl;
709 pctx->create_surface = vc4_create_surface;
710 pctx->surface_destroy = vc4_surface_destroy;
711 pctx->resource_copy_region = util_resource_copy_region;
712 pctx->blit = vc4_blit;
713 pctx->flush_resource = vc4_flush_resource;
714 }