vc4: Add support for texture tiling.
[mesa.git] / src / gallium / drivers / vc4 / vc4_resource.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_memory.h"
26 #include "util/u_format.h"
27 #include "util/u_inlines.h"
28 #include "util/u_surface.h"
29 #include "util/u_blitter.h"
30
31 #include "vc4_screen.h"
32 #include "vc4_context.h"
33 #include "vc4_resource.h"
34 #include "vc4_tiling.h"
35
36 static void
37 vc4_resource_transfer_unmap(struct pipe_context *pctx,
38 struct pipe_transfer *ptrans)
39 {
40 struct vc4_context *vc4 = vc4_context(pctx);
41 struct vc4_transfer *trans = vc4_transfer(ptrans);
42 struct pipe_resource *prsc = ptrans->resource;
43 struct vc4_resource *rsc = vc4_resource(prsc);
44 struct vc4_resource_slice *slice = &rsc->slices[ptrans->level];
45
46 if (trans->map) {
47 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
48 vc4_store_tiled_image(rsc->bo->map + slice->offset,
49 slice->stride,
50 trans->map, ptrans->stride,
51 slice->tiling, rsc->cpp,
52 &ptrans->box);
53 }
54 free(trans->map);
55 }
56
57 pipe_resource_reference(&ptrans->resource, NULL);
58 util_slab_free(&vc4->transfer_pool, ptrans);
59 }
60
61 static void *
62 vc4_resource_transfer_map(struct pipe_context *pctx,
63 struct pipe_resource *prsc,
64 unsigned level, unsigned usage,
65 const struct pipe_box *box,
66 struct pipe_transfer **pptrans)
67 {
68 struct vc4_context *vc4 = vc4_context(pctx);
69 struct vc4_resource *rsc = vc4_resource(prsc);
70 struct vc4_resource_slice *slice = &rsc->slices[level];
71 struct vc4_transfer *trans;
72 struct pipe_transfer *ptrans;
73 enum pipe_format format = prsc->format;
74 char *buf;
75
76 vc4_flush_for_bo(pctx, rsc->bo);
77
78 trans = util_slab_alloc(&vc4->transfer_pool);
79 if (!trans)
80 return NULL;
81
82 /* XXX: Handle DISCARD_WHOLE_RESOURCE, DONTBLOCK, UNSYNCHRONIZED,
83 * DISCARD_WHOLE_RESOURCE, PERSISTENT, COHERENT.
84 */
85
86 /* util_slab_alloc() doesn't zero: */
87 memset(trans, 0, sizeof(*trans));
88 ptrans = &trans->base;
89
90 pipe_resource_reference(&ptrans->resource, prsc);
91 ptrans->level = level;
92 ptrans->usage = usage;
93 ptrans->box = *box;
94
95 /* Note that the current kernel implementation is synchronous, so no
96 * need to do syncing stuff here yet.
97 */
98
99 buf = vc4_bo_map(rsc->bo);
100 if (!buf) {
101 fprintf(stderr, "Failed to map bo\n");
102 goto fail;
103 }
104
105 *pptrans = ptrans;
106
107 if (rsc->tiled) {
108 uint32_t utile_w = vc4_utile_width(rsc->cpp);
109 uint32_t utile_h = vc4_utile_height(rsc->cpp);
110
111 /* No direct mappings of tiled, since we need to manually
112 * tile/untile.
113 */
114 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
115 return NULL;
116
117 /* We need to align the box to utile boundaries, since that's
118 * what load/store operate on.
119 */
120 uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
121 uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
122 ptrans->box.width += box_start_x;
123 ptrans->box.x -= box_start_x;
124 ptrans->box.height += box_start_y;
125 ptrans->box.y -= box_start_y;
126 ptrans->box.width = align(ptrans->box.width, utile_w);
127 ptrans->box.height = align(ptrans->box.height, utile_h);
128
129 ptrans->stride = ptrans->box.width * rsc->cpp;
130 ptrans->layer_stride = ptrans->stride;
131
132 trans->map = malloc(ptrans->stride * ptrans->box.height);
133 if (usage & PIPE_TRANSFER_READ) {
134 vc4_load_tiled_image(trans->map, ptrans->stride,
135 buf + slice->offset,
136 slice->stride,
137 slice->tiling, rsc->cpp,
138 &ptrans->box);
139 }
140 return (trans->map +
141 box_start_x * rsc->cpp +
142 box_start_y * ptrans->stride);
143 } else {
144 ptrans->stride = slice->stride;
145 ptrans->layer_stride = ptrans->stride;
146
147 return buf + slice->offset +
148 box->y / util_format_get_blockheight(format) * ptrans->stride +
149 box->x / util_format_get_blockwidth(format) * rsc->cpp +
150 box->z * slice->size0;
151 }
152
153
154 fail:
155 vc4_resource_transfer_unmap(pctx, ptrans);
156 return NULL;
157 }
158
159 static void
160 vc4_resource_destroy(struct pipe_screen *pscreen,
161 struct pipe_resource *prsc)
162 {
163 struct vc4_resource *rsc = vc4_resource(prsc);
164 vc4_bo_unreference(&rsc->bo);
165 free(rsc);
166 }
167
168 static boolean
169 vc4_resource_get_handle(struct pipe_screen *pscreen,
170 struct pipe_resource *prsc,
171 struct winsys_handle *handle)
172 {
173 struct vc4_resource *rsc = vc4_resource(prsc);
174
175 return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
176 handle);
177 }
178
179 static const struct u_resource_vtbl vc4_resource_vtbl = {
180 .resource_get_handle = vc4_resource_get_handle,
181 .resource_destroy = vc4_resource_destroy,
182 .transfer_map = vc4_resource_transfer_map,
183 .transfer_flush_region = u_default_transfer_flush_region,
184 .transfer_unmap = vc4_resource_transfer_unmap,
185 .transfer_inline_write = u_default_transfer_inline_write,
186 };
187
188 static void
189 vc4_setup_slices(struct vc4_resource *rsc)
190 {
191 struct pipe_resource *prsc = &rsc->base.b;
192 uint32_t width = prsc->width0;
193 uint32_t height = prsc->height0;
194 uint32_t depth = prsc->depth0;
195 uint32_t offset = 0;
196 uint32_t utile_w = vc4_utile_width(rsc->cpp);
197 uint32_t utile_h = vc4_utile_height(rsc->cpp);
198
199 for (int i = prsc->last_level; i >= 0; i--) {
200 struct vc4_resource_slice *slice = &rsc->slices[i];
201 uint32_t level_width = u_minify(width, i);
202 uint32_t level_height = u_minify(height, i);
203
204 if (rsc->tiled == VC4_TILING_FORMAT_LINEAR) {
205 slice->tiling = VC4_TILING_FORMAT_LINEAR;
206 level_width = align(level_width, 16);
207 } else {
208 if (vc4_size_is_lt(level_width, level_height,
209 rsc->cpp)) {
210 slice->tiling = VC4_TILING_FORMAT_LT;
211 level_width = align(level_width, utile_w);
212 level_height = align(level_height, utile_h);
213 } else {
214 slice->tiling = VC4_TILING_FORMAT_T;
215 level_width = align(level_width,
216 4 * 2 * utile_w);
217 level_height = align(level_height,
218 4 * 2 * utile_h);
219 }
220 }
221
222 slice->offset = offset;
223 slice->stride = level_width * rsc->cpp;
224 slice->size0 = level_height * slice->stride;
225
226 /* Note, since we have cubes but no 3D, depth is invariant
227 * with miplevel.
228 */
229 offset += slice->size0 * depth;
230 }
231
232 /* The texture base pointer that has to point to level 0 doesn't have
233 * intra-page bits, so we have to align it, and thus shift up all the
234 * smaller slices.
235 */
236 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
237 rsc->slices[0].offset);
238 if (page_align_offset) {
239 for (int i = 0; i <= prsc->last_level; i++)
240 rsc->slices[i].offset += page_align_offset;
241 }
242 }
243
244 static struct vc4_resource *
245 vc4_resource_setup(struct pipe_screen *pscreen,
246 const struct pipe_resource *tmpl)
247 {
248 struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
249 if (!rsc)
250 return NULL;
251 struct pipe_resource *prsc = &rsc->base.b;
252
253 *prsc = *tmpl;
254
255 pipe_reference_init(&prsc->reference, 1);
256 prsc->screen = pscreen;
257
258 rsc->base.vtbl = &vc4_resource_vtbl;
259 rsc->cpp = util_format_get_blocksize(tmpl->format);
260
261 assert(rsc->cpp);
262
263 return rsc;
264 }
265
266 static enum vc4_texture_data_type
267 get_resource_texture_format(struct pipe_resource *prsc)
268 {
269 struct vc4_resource *rsc = vc4_resource(prsc);
270
271 if (rsc->tiled)
272 return VC4_TEXTURE_TYPE_RGBA8888;
273 else
274 return VC4_TEXTURE_TYPE_RGBA32R;
275 }
276
277 static struct pipe_resource *
278 vc4_resource_create(struct pipe_screen *pscreen,
279 const struct pipe_resource *tmpl)
280 {
281 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
282 struct pipe_resource *prsc = &rsc->base.b;
283
284 /* We have to make shared be untiled, since we don't have any way to
285 * communicate metadata about tiling currently.
286 */
287 if (tmpl->target == PIPE_BUFFER ||
288 (tmpl->bind & (PIPE_BIND_SCANOUT |
289 PIPE_BIND_LINEAR |
290 PIPE_BIND_SHARED |
291 PIPE_BIND_CURSOR))) {
292 rsc->tiled = false;
293 } else {
294 rsc->tiled = true;
295 }
296
297 vc4_setup_slices(rsc);
298
299 rsc->bo = vc4_bo_alloc(vc4_screen(pscreen),
300 rsc->slices[0].offset +
301 rsc->slices[0].size0 * prsc->depth0,
302 "resource");
303 if (!rsc->bo)
304 goto fail;
305
306 if (tmpl->target != PIPE_BUFFER)
307 rsc->vc4_format = get_resource_texture_format(prsc);
308
309 return prsc;
310 fail:
311 vc4_resource_destroy(pscreen, prsc);
312 return NULL;
313 }
314
315 static struct pipe_resource *
316 vc4_resource_from_handle(struct pipe_screen *pscreen,
317 const struct pipe_resource *tmpl,
318 struct winsys_handle *handle)
319 {
320 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
321 struct pipe_resource *prsc = &rsc->base.b;
322 struct vc4_resource_slice *slice = &rsc->slices[0];
323
324 if (!rsc)
325 return NULL;
326
327 rsc->tiled = false;
328 rsc->bo = vc4_screen_bo_from_handle(pscreen, handle, &slice->stride);
329 if (!rsc->bo)
330 goto fail;
331
332 #ifdef USE_VC4_SIMULATOR
333 slice->stride = align(prsc->width0 * rsc->cpp, 16);
334 #endif
335 slice->tiling = VC4_TILING_FORMAT_LINEAR;
336
337 rsc->vc4_format = get_resource_texture_format(prsc);
338
339 return prsc;
340
341 fail:
342 vc4_resource_destroy(pscreen, prsc);
343 return NULL;
344 }
345
346 static struct pipe_surface *
347 vc4_create_surface(struct pipe_context *pctx,
348 struct pipe_resource *ptex,
349 const struct pipe_surface *surf_tmpl)
350 {
351 struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
352 struct vc4_resource *rsc = vc4_resource(ptex);
353
354 if (!surface)
355 return NULL;
356
357 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
358
359 struct pipe_surface *psurf = &surface->base;
360 unsigned level = surf_tmpl->u.tex.level;
361
362 pipe_reference_init(&psurf->reference, 1);
363 pipe_resource_reference(&psurf->texture, ptex);
364
365 psurf->context = pctx;
366 psurf->format = surf_tmpl->format;
367 psurf->width = u_minify(ptex->width0, level);
368 psurf->height = u_minify(ptex->height0, level);
369 psurf->u.tex.level = level;
370 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
371 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
372 surface->offset = rsc->slices[level].offset;
373 surface->tiling = rsc->slices[level].tiling;
374
375 return &surface->base;
376 }
377
378 static void
379 vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
380 {
381 pipe_resource_reference(&psurf->texture, NULL);
382 FREE(psurf);
383 }
384
385 static void
386 vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
387 {
388 struct vc4_context *vc4 = vc4_context(pctx);
389
390 /* XXX: Skip this if we don't have any queued drawing to it. */
391 vc4->base.flush(pctx, NULL, 0);
392 }
393 static bool
394 render_blit(struct pipe_context *ctx, struct pipe_blit_info *info)
395 {
396 struct vc4_context *vc4 = vc4_context(ctx);
397
398 if (!util_blitter_is_blit_supported(vc4->blitter, info)) {
399 fprintf(stderr, "blit unsupported %s -> %s",
400 util_format_short_name(info->src.resource->format),
401 util_format_short_name(info->dst.resource->format));
402 return false;
403 }
404
405 util_blitter_save_vertex_buffer_slot(vc4->blitter, vc4->vertexbuf.vb);
406 util_blitter_save_vertex_elements(vc4->blitter, vc4->vtx);
407 util_blitter_save_vertex_shader(vc4->blitter, vc4->prog.vs);
408 util_blitter_save_rasterizer(vc4->blitter, vc4->rasterizer);
409 util_blitter_save_viewport(vc4->blitter, &vc4->viewport);
410 util_blitter_save_scissor(vc4->blitter, &vc4->scissor);
411 util_blitter_save_fragment_shader(vc4->blitter, vc4->prog.fs);
412 util_blitter_save_blend(vc4->blitter, vc4->blend);
413 util_blitter_save_depth_stencil_alpha(vc4->blitter, vc4->zsa);
414 util_blitter_save_stencil_ref(vc4->blitter, &vc4->stencil_ref);
415 util_blitter_save_sample_mask(vc4->blitter, vc4->sample_mask);
416 util_blitter_save_framebuffer(vc4->blitter, &vc4->framebuffer);
417 util_blitter_save_fragment_sampler_states(vc4->blitter,
418 vc4->fragtex.num_samplers,
419 (void **)vc4->fragtex.samplers);
420 util_blitter_save_fragment_sampler_views(vc4->blitter,
421 vc4->fragtex.num_textures, vc4->fragtex.textures);
422
423 util_blitter_blit(vc4->blitter, info);
424
425 return true;
426 }
427
428 /* Optimal hardware path for blitting pixels.
429 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
430 */
431 static void
432 vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info)
433 {
434 struct pipe_blit_info info = *blit_info;
435
436 if (info.src.resource->nr_samples > 1 &&
437 info.dst.resource->nr_samples <= 1 &&
438 !util_format_is_depth_or_stencil(info.src.resource->format) &&
439 !util_format_is_pure_integer(info.src.resource->format)) {
440 fprintf(stderr, "color resolve unimplemented");
441 return;
442 }
443
444 if (util_try_blit_via_copy_region(pctx, &info)) {
445 return; /* done */
446 }
447
448 if (info.mask & PIPE_MASK_S) {
449 fprintf(stderr, "cannot blit stencil, skipping");
450 info.mask &= ~PIPE_MASK_S;
451 }
452
453 render_blit(pctx, &info);
454 }
455
456 void
457 vc4_resource_screen_init(struct pipe_screen *pscreen)
458 {
459 pscreen->resource_create = vc4_resource_create;
460 pscreen->resource_from_handle = vc4_resource_from_handle;
461 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
462 pscreen->resource_destroy = u_resource_destroy_vtbl;
463 }
464
465 void
466 vc4_resource_context_init(struct pipe_context *pctx)
467 {
468 pctx->transfer_map = u_transfer_map_vtbl;
469 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
470 pctx->transfer_unmap = u_transfer_unmap_vtbl;
471 pctx->transfer_inline_write = u_transfer_inline_write_vtbl;
472 pctx->create_surface = vc4_create_surface;
473 pctx->surface_destroy = vc4_surface_destroy;
474 pctx->resource_copy_region = util_resource_copy_region;
475 pctx->blit = vc4_blit;
476 pctx->flush_resource = vc4_flush_resource;
477 }