vc4: Add support for rendering to cube map surfaces.
[mesa.git] / src / gallium / drivers / vc4 / vc4_resource.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_blit.h"
26 #include "util/u_memory.h"
27 #include "util/u_format.h"
28 #include "util/u_inlines.h"
29 #include "util/u_surface.h"
30 #include "util/u_upload_mgr.h"
31
32 #include "vc4_screen.h"
33 #include "vc4_context.h"
34 #include "vc4_resource.h"
35 #include "vc4_tiling.h"
36
37 static bool miptree_debug = false;
38
39 static bool
40 vc4_resource_bo_alloc(struct vc4_resource *rsc)
41 {
42 struct pipe_resource *prsc = &rsc->base.b;
43 struct pipe_screen *pscreen = prsc->screen;
44 struct vc4_bo *bo;
45
46 if (miptree_debug) {
47 fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
48 rsc,
49 rsc->slices[0].size,
50 rsc->slices[0].offset,
51 rsc->slices[0].offset +
52 rsc->slices[0].size +
53 rsc->cube_map_stride * (prsc->array_size - 1));
54 }
55
56 bo = vc4_bo_alloc(vc4_screen(pscreen),
57 rsc->slices[0].offset +
58 rsc->slices[0].size +
59 rsc->cube_map_stride * (prsc->array_size - 1),
60 "resource");
61 if (bo) {
62 vc4_bo_unreference(&rsc->bo);
63 rsc->bo = bo;
64 return true;
65 } else {
66 return false;
67 }
68 }
69
70 static void
71 vc4_resource_transfer_unmap(struct pipe_context *pctx,
72 struct pipe_transfer *ptrans)
73 {
74 struct vc4_context *vc4 = vc4_context(pctx);
75 struct vc4_transfer *trans = vc4_transfer(ptrans);
76
77 if (trans->map) {
78 struct vc4_resource *rsc;
79 struct vc4_resource_slice *slice;
80 if (trans->ss_resource) {
81 rsc = vc4_resource(trans->ss_resource);
82 slice = &rsc->slices[0];
83 } else {
84 rsc = vc4_resource(ptrans->resource);
85 slice = &rsc->slices[ptrans->level];
86 }
87
88 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
89 vc4_store_tiled_image(rsc->bo->map + slice->offset +
90 ptrans->box.z * rsc->cube_map_stride,
91 slice->stride,
92 trans->map, ptrans->stride,
93 slice->tiling, rsc->cpp,
94 &ptrans->box);
95 }
96 free(trans->map);
97 }
98
99 if (trans->ss_resource && (ptrans->usage & PIPE_TRANSFER_WRITE)) {
100 struct pipe_blit_info blit;
101 memset(&blit, 0, sizeof(blit));
102
103 blit.src.resource = trans->ss_resource;
104 blit.src.format = trans->ss_resource->format;
105 blit.src.box.width = trans->ss_box.width;
106 blit.src.box.height = trans->ss_box.height;
107 blit.src.box.depth = 1;
108
109 blit.dst.resource = ptrans->resource;
110 blit.dst.format = ptrans->resource->format;
111 blit.dst.level = ptrans->level;
112 blit.dst.box = trans->ss_box;
113
114 blit.mask = util_format_get_mask(ptrans->resource->format);
115 blit.filter = PIPE_TEX_FILTER_NEAREST;
116
117 pctx->blit(pctx, &blit);
118 vc4_flush(pctx);
119
120 pipe_resource_reference(&trans->ss_resource, NULL);
121 }
122
123 pipe_resource_reference(&ptrans->resource, NULL);
124 util_slab_free(&vc4->transfer_pool, ptrans);
125 }
126
127 static struct pipe_resource *
128 vc4_get_temp_resource(struct pipe_context *pctx,
129 struct pipe_resource *prsc,
130 const struct pipe_box *box)
131 {
132 struct pipe_resource temp_setup;
133
134 memset(&temp_setup, 0, sizeof(temp_setup));
135 temp_setup.target = prsc->target;
136 temp_setup.format = prsc->format;
137 temp_setup.width0 = box->width;
138 temp_setup.height0 = box->height;
139 temp_setup.depth0 = 1;
140 temp_setup.array_size = 1;
141
142 return pctx->screen->resource_create(pctx->screen, &temp_setup);
143 }
144
145 static void *
146 vc4_resource_transfer_map(struct pipe_context *pctx,
147 struct pipe_resource *prsc,
148 unsigned level, unsigned usage,
149 const struct pipe_box *box,
150 struct pipe_transfer **pptrans)
151 {
152 struct vc4_context *vc4 = vc4_context(pctx);
153 struct vc4_resource *rsc = vc4_resource(prsc);
154 struct vc4_transfer *trans;
155 struct pipe_transfer *ptrans;
156 enum pipe_format format = prsc->format;
157 char *buf;
158
159 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
160 if (vc4_resource_bo_alloc(rsc)) {
161
162 /* If it might be bound as one of our vertex buffers,
163 * make sure we re-emit vertex buffer state.
164 */
165 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
166 vc4->dirty |= VC4_DIRTY_VTXBUF;
167 } else {
168 /* If we failed to reallocate, flush everything so
169 * that we don't violate any syncing requirements.
170 */
171 vc4_flush(pctx);
172 }
173 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
174 /* If we're writing and the buffer is being used by the CL, we
175 * have to flush the CL first. If we're only reading, we need
176 * to flush if the CL has written our buffer.
177 */
178 if (vc4_cl_references_bo(pctx, rsc->bo,
179 usage & PIPE_TRANSFER_WRITE)) {
180 if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
181 prsc->last_level == 0 &&
182 prsc->width0 == box->width &&
183 prsc->height0 == box->height &&
184 prsc->depth0 == box->depth &&
185 vc4_resource_bo_alloc(rsc)) {
186 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
187 vc4->dirty |= VC4_DIRTY_VTXBUF;
188 } else {
189 vc4_flush(pctx);
190 }
191 }
192 }
193
194 if (usage & PIPE_TRANSFER_WRITE)
195 rsc->writes++;
196
197 trans = util_slab_alloc(&vc4->transfer_pool);
198 if (!trans)
199 return NULL;
200
201 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
202
203 /* util_slab_alloc() doesn't zero: */
204 memset(trans, 0, sizeof(*trans));
205 ptrans = &trans->base;
206
207 pipe_resource_reference(&ptrans->resource, prsc);
208 ptrans->level = level;
209 ptrans->usage = usage;
210 ptrans->box = *box;
211
212 /* If the resource is multisampled, we need to resolve to single
213 * sample. This seems like it should be handled at a higher layer.
214 */
215 if (prsc->nr_samples > 1) {
216 trans->ss_resource = vc4_get_temp_resource(pctx, prsc, box);
217 if (!trans->ss_resource)
218 goto fail;
219 assert(!trans->ss_resource->nr_samples);
220
221 /* The ptrans->box gets modified for tile alignment, so save
222 * the original box for unmap time.
223 */
224 trans->ss_box = *box;
225
226 if (usage & PIPE_TRANSFER_READ) {
227 struct pipe_blit_info blit;
228 memset(&blit, 0, sizeof(blit));
229
230 blit.src.resource = ptrans->resource;
231 blit.src.format = ptrans->resource->format;
232 blit.src.level = ptrans->level;
233 blit.src.box = trans->ss_box;
234
235 blit.dst.resource = trans->ss_resource;
236 blit.dst.format = trans->ss_resource->format;
237 blit.dst.box.width = trans->ss_box.width;
238 blit.dst.box.height = trans->ss_box.height;
239 blit.dst.box.depth = 1;
240
241 blit.mask = util_format_get_mask(prsc->format);
242 blit.filter = PIPE_TEX_FILTER_NEAREST;
243
244 pctx->blit(pctx, &blit);
245 vc4_flush(pctx);
246 }
247
248 /* The rest of the mapping process should use our temporary. */
249 prsc = trans->ss_resource;
250 rsc = vc4_resource(prsc);
251 ptrans->box.x = 0;
252 ptrans->box.y = 0;
253 ptrans->box.z = 0;
254 }
255
256 /* Note that the current kernel implementation is synchronous, so no
257 * need to do syncing stuff here yet.
258 */
259
260 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
261 buf = vc4_bo_map_unsynchronized(rsc->bo);
262 else
263 buf = vc4_bo_map(rsc->bo);
264 if (!buf) {
265 fprintf(stderr, "Failed to map bo\n");
266 goto fail;
267 }
268
269 *pptrans = ptrans;
270
271 struct vc4_resource_slice *slice = &rsc->slices[level];
272 if (rsc->tiled) {
273 uint32_t utile_w = vc4_utile_width(rsc->cpp);
274 uint32_t utile_h = vc4_utile_height(rsc->cpp);
275
276 /* No direct mappings of tiled, since we need to manually
277 * tile/untile.
278 */
279 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
280 return NULL;
281
282 /* We need to align the box to utile boundaries, since that's
283 * what load/store operate on.
284 */
285 uint32_t orig_width = ptrans->box.width;
286 uint32_t orig_height = ptrans->box.height;
287 uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
288 uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
289 ptrans->box.width += box_start_x;
290 ptrans->box.x -= box_start_x;
291 ptrans->box.height += box_start_y;
292 ptrans->box.y -= box_start_y;
293 ptrans->box.width = align(ptrans->box.width, utile_w);
294 ptrans->box.height = align(ptrans->box.height, utile_h);
295
296 ptrans->stride = ptrans->box.width * rsc->cpp;
297 ptrans->layer_stride = ptrans->stride;
298
299 trans->map = malloc(ptrans->stride * ptrans->box.height);
300 if (usage & PIPE_TRANSFER_READ ||
301 ptrans->box.width != orig_width ||
302 ptrans->box.height != orig_height) {
303 vc4_load_tiled_image(trans->map, ptrans->stride,
304 buf + slice->offset +
305 ptrans->box.z * rsc->cube_map_stride,
306 slice->stride,
307 slice->tiling, rsc->cpp,
308 &ptrans->box);
309 }
310 return (trans->map +
311 box_start_x * rsc->cpp +
312 box_start_y * ptrans->stride);
313 } else {
314 ptrans->stride = slice->stride;
315 ptrans->layer_stride = ptrans->stride;
316
317 return buf + slice->offset +
318 ptrans->box.y / util_format_get_blockheight(format) * ptrans->stride +
319 ptrans->box.x / util_format_get_blockwidth(format) * rsc->cpp +
320 ptrans->box.z * rsc->cube_map_stride;
321 }
322
323
324 fail:
325 vc4_resource_transfer_unmap(pctx, ptrans);
326 return NULL;
327 }
328
329 static void
330 vc4_resource_destroy(struct pipe_screen *pscreen,
331 struct pipe_resource *prsc)
332 {
333 struct vc4_resource *rsc = vc4_resource(prsc);
334 pipe_resource_reference(&rsc->shadow_parent, NULL);
335 vc4_bo_unreference(&rsc->bo);
336 free(rsc);
337 }
338
339 static boolean
340 vc4_resource_get_handle(struct pipe_screen *pscreen,
341 struct pipe_resource *prsc,
342 struct winsys_handle *handle)
343 {
344 struct vc4_resource *rsc = vc4_resource(prsc);
345
346 return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
347 handle);
348 }
349
350 static const struct u_resource_vtbl vc4_resource_vtbl = {
351 .resource_get_handle = vc4_resource_get_handle,
352 .resource_destroy = vc4_resource_destroy,
353 .transfer_map = vc4_resource_transfer_map,
354 .transfer_flush_region = u_default_transfer_flush_region,
355 .transfer_unmap = vc4_resource_transfer_unmap,
356 .transfer_inline_write = u_default_transfer_inline_write,
357 };
358
359 static void
360 vc4_setup_slices(struct vc4_resource *rsc)
361 {
362 struct pipe_resource *prsc = &rsc->base.b;
363 uint32_t width = prsc->width0;
364 uint32_t height = prsc->height0;
365 uint32_t pot_width = util_next_power_of_two(width);
366 uint32_t pot_height = util_next_power_of_two(height);
367 uint32_t offset = 0;
368 uint32_t utile_w = vc4_utile_width(rsc->cpp);
369 uint32_t utile_h = vc4_utile_height(rsc->cpp);
370
371 for (int i = prsc->last_level; i >= 0; i--) {
372 struct vc4_resource_slice *slice = &rsc->slices[i];
373
374 uint32_t level_width, level_height;
375 if (i == 0) {
376 level_width = width;
377 level_height = height;
378 } else {
379 level_width = u_minify(pot_width, i);
380 level_height = u_minify(pot_height, i);
381 }
382
383 if (!rsc->tiled) {
384 slice->tiling = VC4_TILING_FORMAT_LINEAR;
385 if (prsc->nr_samples > 1) {
386 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
387 level_width = align(level_width, 32);
388 level_height = align(level_height, 32);
389 } else {
390 level_width = align(level_width, utile_w);
391 }
392 } else {
393 if (vc4_size_is_lt(level_width, level_height,
394 rsc->cpp)) {
395 slice->tiling = VC4_TILING_FORMAT_LT;
396 level_width = align(level_width, utile_w);
397 level_height = align(level_height, utile_h);
398 } else {
399 slice->tiling = VC4_TILING_FORMAT_T;
400 level_width = align(level_width,
401 4 * 2 * utile_w);
402 level_height = align(level_height,
403 4 * 2 * utile_h);
404 }
405 }
406
407 slice->offset = offset;
408 slice->stride = (level_width * rsc->cpp *
409 MAX2(prsc->nr_samples, 1));
410 slice->size = level_height * slice->stride;
411
412 offset += slice->size;
413
414 if (miptree_debug) {
415 static const char tiling_chars[] = {
416 [VC4_TILING_FORMAT_LINEAR] = 'R',
417 [VC4_TILING_FORMAT_LT] = 'L',
418 [VC4_TILING_FORMAT_T] = 'T'
419 };
420 fprintf(stderr,
421 "rsc setup %p (format %d), %dx%d: "
422 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
423 rsc, rsc->vc4_format,
424 prsc->width0, prsc->height0,
425 i, tiling_chars[slice->tiling],
426 level_width, level_height,
427 slice->stride, slice->offset);
428 }
429 }
430
431 /* The texture base pointer that has to point to level 0 doesn't have
432 * intra-page bits, so we have to align it, and thus shift up all the
433 * smaller slices.
434 */
435 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
436 rsc->slices[0].offset);
437 if (page_align_offset) {
438 for (int i = 0; i <= prsc->last_level; i++)
439 rsc->slices[i].offset += page_align_offset;
440 }
441
442 /* Cube map faces appear as whole miptrees at a page-aligned offset
443 * from the first face's miptree.
444 */
445 if (prsc->target == PIPE_TEXTURE_CUBE) {
446 rsc->cube_map_stride = align(rsc->slices[0].offset +
447 rsc->slices[0].size, 4096);
448 }
449 }
450
451 static struct vc4_resource *
452 vc4_resource_setup(struct pipe_screen *pscreen,
453 const struct pipe_resource *tmpl)
454 {
455 struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
456 if (!rsc)
457 return NULL;
458 struct pipe_resource *prsc = &rsc->base.b;
459
460 *prsc = *tmpl;
461
462 pipe_reference_init(&prsc->reference, 1);
463 prsc->screen = pscreen;
464
465 rsc->base.vtbl = &vc4_resource_vtbl;
466 if (prsc->nr_samples <= 1)
467 rsc->cpp = util_format_get_blocksize(tmpl->format);
468 else
469 rsc->cpp = sizeof(uint32_t);
470
471 assert(rsc->cpp);
472
473 return rsc;
474 }
475
476 static enum vc4_texture_data_type
477 get_resource_texture_format(struct pipe_resource *prsc)
478 {
479 struct vc4_resource *rsc = vc4_resource(prsc);
480 uint8_t format = vc4_get_tex_format(prsc->format);
481
482 if (!rsc->tiled) {
483 if (prsc->nr_samples > 1) {
484 return ~0;
485 } else {
486 assert(format == VC4_TEXTURE_TYPE_RGBA8888);
487 return VC4_TEXTURE_TYPE_RGBA32R;
488 }
489 }
490
491 return format;
492 }
493
494 struct pipe_resource *
495 vc4_resource_create(struct pipe_screen *pscreen,
496 const struct pipe_resource *tmpl)
497 {
498 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
499 struct pipe_resource *prsc = &rsc->base.b;
500
501 /* We have to make shared be untiled, since we don't have any way to
502 * communicate metadata about tiling currently.
503 */
504 if (tmpl->target == PIPE_BUFFER ||
505 tmpl->nr_samples > 1 ||
506 (tmpl->bind & (PIPE_BIND_SCANOUT |
507 PIPE_BIND_LINEAR |
508 PIPE_BIND_SHARED |
509 PIPE_BIND_CURSOR))) {
510 rsc->tiled = false;
511 } else {
512 rsc->tiled = true;
513 }
514
515 if (tmpl->target != PIPE_BUFFER)
516 rsc->vc4_format = get_resource_texture_format(prsc);
517
518 vc4_setup_slices(rsc);
519 if (!vc4_resource_bo_alloc(rsc))
520 goto fail;
521
522 return prsc;
523 fail:
524 vc4_resource_destroy(pscreen, prsc);
525 return NULL;
526 }
527
528 static struct pipe_resource *
529 vc4_resource_from_handle(struct pipe_screen *pscreen,
530 const struct pipe_resource *tmpl,
531 struct winsys_handle *handle,
532 unsigned usage)
533 {
534 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
535 struct pipe_resource *prsc = &rsc->base.b;
536 struct vc4_resource_slice *slice = &rsc->slices[0];
537 uint32_t expected_stride = align(prsc->width0 / rsc->cpp,
538 vc4_utile_width(rsc->cpp));
539
540 if (!rsc)
541 return NULL;
542
543 if (handle->stride != expected_stride) {
544 static bool warned = false;
545 if (!warned) {
546 warned = true;
547 fprintf(stderr,
548 "Attempting to import %dx%d %s with "
549 "unsupported stride %d instead of %d\n",
550 prsc->width0, prsc->height0,
551 util_format_short_name(prsc->format),
552 handle->stride,
553 expected_stride);
554 }
555 return NULL;
556 }
557
558 rsc->tiled = false;
559 rsc->bo = vc4_screen_bo_from_handle(pscreen, handle);
560 if (!rsc->bo)
561 goto fail;
562
563 slice->stride = handle->stride;
564 slice->tiling = VC4_TILING_FORMAT_LINEAR;
565
566 rsc->vc4_format = get_resource_texture_format(prsc);
567
568 if (miptree_debug) {
569 fprintf(stderr,
570 "rsc import %p (format %d), %dx%d: "
571 "level 0 (R) -> stride %d@0x%08x\n",
572 rsc, rsc->vc4_format,
573 prsc->width0, prsc->height0,
574 slice->stride, slice->offset);
575 }
576
577 return prsc;
578
579 fail:
580 vc4_resource_destroy(pscreen, prsc);
581 return NULL;
582 }
583
584 static struct pipe_surface *
585 vc4_create_surface(struct pipe_context *pctx,
586 struct pipe_resource *ptex,
587 const struct pipe_surface *surf_tmpl)
588 {
589 struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
590 struct vc4_resource *rsc = vc4_resource(ptex);
591
592 if (!surface)
593 return NULL;
594
595 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
596
597 struct pipe_surface *psurf = &surface->base;
598 unsigned level = surf_tmpl->u.tex.level;
599
600 pipe_reference_init(&psurf->reference, 1);
601 pipe_resource_reference(&psurf->texture, ptex);
602
603 psurf->context = pctx;
604 psurf->format = surf_tmpl->format;
605 psurf->width = u_minify(ptex->width0, level);
606 psurf->height = u_minify(ptex->height0, level);
607 psurf->u.tex.level = level;
608 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
609 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
610 surface->offset = (rsc->slices[level].offset +
611 psurf->u.tex.first_layer * rsc->cube_map_stride);
612 surface->tiling = rsc->slices[level].tiling;
613
614 return &surface->base;
615 }
616
617 static void
618 vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
619 {
620 pipe_resource_reference(&psurf->texture, NULL);
621 FREE(psurf);
622 }
623
624 static void
625 vc4_dump_surface_non_msaa(struct pipe_surface *psurf)
626 {
627 struct pipe_resource *prsc = psurf->texture;
628 struct vc4_resource *rsc = vc4_resource(prsc);
629 uint32_t *map = vc4_bo_map(rsc->bo);
630 uint32_t stride = rsc->slices[0].stride / 4;
631 uint32_t width = psurf->width;
632 uint32_t height = psurf->height;
633 uint32_t chunk_w = width / 79;
634 uint32_t chunk_h = height / 40;
635 uint32_t found_colors[10];
636 uint32_t num_found_colors = 0;
637
638 if (rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R) {
639 fprintf(stderr, "%s: Unsupported format %s\n",
640 __func__, util_format_short_name(psurf->format));
641 return;
642 }
643
644 for (int by = 0; by < height; by += chunk_h) {
645 for (int bx = 0; bx < width; bx += chunk_w) {
646 int all_found_color = -1; /* nothing found */
647
648 for (int y = by; y < MIN2(height, by + chunk_h); y++) {
649 for (int x = bx; x < MIN2(width, bx + chunk_w); x++) {
650 uint32_t pix = map[y * stride + x];
651
652 int i;
653 for (i = 0; i < num_found_colors; i++) {
654 if (pix == found_colors[i])
655 break;
656 }
657 if (i == num_found_colors &&
658 num_found_colors <
659 ARRAY_SIZE(found_colors)) {
660 found_colors[num_found_colors++] = pix;
661 }
662
663 if (i < num_found_colors) {
664 if (all_found_color == -1)
665 all_found_color = i;
666 else if (i != all_found_color)
667 all_found_color = ARRAY_SIZE(found_colors);
668 }
669 }
670 }
671 /* If all pixels for this chunk have a consistent
672 * value, then print a character for it. Either a
673 * fixed name (particularly common for piglit tests),
674 * or a runtime-generated number.
675 */
676 if (all_found_color >= 0 &&
677 all_found_color < ARRAY_SIZE(found_colors)) {
678 static const struct {
679 uint32_t val;
680 const char *c;
681 } named_colors[] = {
682 { 0xff000000, "█" },
683 { 0x00000000, "█" },
684 { 0xffff0000, "r" },
685 { 0xff00ff00, "g" },
686 { 0xff0000ff, "b" },
687 { 0xffffffff, "w" },
688 };
689 int i;
690 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
691 if (named_colors[i].val ==
692 found_colors[all_found_color]) {
693 fprintf(stderr, "%s",
694 named_colors[i].c);
695 break;
696 }
697 }
698 /* For unnamed colors, print a number and the
699 * numbers will have values printed at the
700 * end.
701 */
702 if (i == ARRAY_SIZE(named_colors)) {
703 fprintf(stderr, "%c",
704 '0' + all_found_color);
705 }
706 } else {
707 /* If there's no consistent color, print this.
708 */
709 fprintf(stderr, ".");
710 }
711 }
712 fprintf(stderr, "\n");
713 }
714
715 for (int i = 0; i < num_found_colors; i++) {
716 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
717 }
718 }
719
720 static uint32_t
721 vc4_surface_msaa_get_sample(struct pipe_surface *psurf,
722 uint32_t x, uint32_t y, uint32_t sample)
723 {
724 struct pipe_resource *prsc = psurf->texture;
725 struct vc4_resource *rsc = vc4_resource(prsc);
726 uint32_t tile_w = 32, tile_h = 32;
727 uint32_t tiles_w = DIV_ROUND_UP(psurf->width, 32);
728
729 uint32_t tile_x = x / tile_w;
730 uint32_t tile_y = y / tile_h;
731 uint32_t *tile = (vc4_bo_map(rsc->bo) +
732 VC4_TILE_BUFFER_SIZE * (tile_y * tiles_w + tile_x));
733 uint32_t subtile_x = x % tile_w;
734 uint32_t subtile_y = y % tile_h;
735
736 uint32_t quad_samples = VC4_MAX_SAMPLES * 4;
737 uint32_t tile_stride = quad_samples * tile_w / 2;
738
739 return *((uint32_t *)tile +
740 (subtile_y >> 1) * tile_stride +
741 (subtile_x >> 1) * quad_samples +
742 ((subtile_y & 1) << 1) +
743 (subtile_x & 1) +
744 sample);
745 }
746
747 static void
748 vc4_dump_surface_msaa_char(struct pipe_surface *psurf,
749 uint32_t start_x, uint32_t start_y,
750 uint32_t w, uint32_t h)
751 {
752 bool all_same_color = true;
753 uint32_t all_pix = 0;
754
755 for (int y = start_y; y < start_y + h; y++) {
756 for (int x = start_x; x < start_x + w; x++) {
757 for (int s = 0; s < VC4_MAX_SAMPLES; s++) {
758 uint32_t pix = vc4_surface_msaa_get_sample(psurf,
759 x, y,
760 s);
761 if (x == start_x && y == start_y)
762 all_pix = pix;
763 else if (all_pix != pix)
764 all_same_color = false;
765 }
766 }
767 }
768 if (all_same_color) {
769 static const struct {
770 uint32_t val;
771 const char *c;
772 } named_colors[] = {
773 { 0xff000000, "█" },
774 { 0x00000000, "█" },
775 { 0xffff0000, "r" },
776 { 0xff00ff00, "g" },
777 { 0xff0000ff, "b" },
778 { 0xffffffff, "w" },
779 };
780 int i;
781 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
782 if (named_colors[i].val == all_pix) {
783 fprintf(stderr, "%s",
784 named_colors[i].c);
785 return;
786 }
787 }
788 fprintf(stderr, "x");
789 } else {
790 fprintf(stderr, ".");
791 }
792 }
793
794 static void
795 vc4_dump_surface_msaa(struct pipe_surface *psurf)
796 {
797 uint32_t tile_w = 32, tile_h = 32;
798 uint32_t tiles_w = DIV_ROUND_UP(psurf->width, tile_w);
799 uint32_t tiles_h = DIV_ROUND_UP(psurf->height, tile_h);
800 uint32_t char_w = 140, char_h = 60;
801 uint32_t char_w_per_tile = char_w / tiles_w - 1;
802 uint32_t char_h_per_tile = char_h / tiles_h - 1;
803 uint32_t found_colors[10];
804 uint32_t num_found_colors = 0;
805
806 fprintf(stderr, "Surface: %dx%d (%dx MSAA)\n",
807 psurf->width, psurf->height, psurf->texture->nr_samples);
808
809 for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
810 fprintf(stderr, "-");
811 fprintf(stderr, "\n");
812
813 for (int ty = 0; ty < psurf->height; ty += tile_h) {
814 for (int y = 0; y < char_h_per_tile; y++) {
815
816 for (int tx = 0; tx < psurf->width; tx += tile_w) {
817 for (int x = 0; x < char_w_per_tile; x++) {
818 uint32_t bx1 = (x * tile_w /
819 char_w_per_tile);
820 uint32_t bx2 = ((x + 1) * tile_w /
821 char_w_per_tile);
822 uint32_t by1 = (y * tile_h /
823 char_h_per_tile);
824 uint32_t by2 = ((y + 1) * tile_h /
825 char_h_per_tile);
826
827 vc4_dump_surface_msaa_char(psurf,
828 tx + bx1,
829 ty + by1,
830 bx2 - bx1,
831 by2 - by1);
832 }
833 fprintf(stderr, "|");
834 }
835 fprintf(stderr, "\n");
836 }
837
838 for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
839 fprintf(stderr, "-");
840 fprintf(stderr, "\n");
841 }
842
843 for (int i = 0; i < num_found_colors; i++) {
844 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
845 }
846 }
847
848 /** Debug routine to dump the contents of an 8888 surface to the console */
849 void
850 vc4_dump_surface(struct pipe_surface *psurf)
851 {
852 if (!psurf)
853 return;
854
855 if (psurf->texture->nr_samples > 1)
856 vc4_dump_surface_msaa(psurf);
857 else
858 vc4_dump_surface_non_msaa(psurf);
859 }
860
861 static void
862 vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
863 {
864 /* All calls to flush_resource are followed by a flush of the context,
865 * so there's nothing to do.
866 */
867 }
868
869 void
870 vc4_update_shadow_baselevel_texture(struct pipe_context *pctx,
871 struct pipe_sampler_view *view)
872 {
873 struct vc4_resource *shadow = vc4_resource(view->texture);
874 struct vc4_resource *orig = vc4_resource(shadow->shadow_parent);
875 assert(orig);
876
877 if (shadow->writes == orig->writes && orig->bo->private)
878 return;
879
880 perf_debug("Updating shadow texture due to %s\n",
881 view->u.tex.first_level ? "base level" : "raster layout");
882
883 for (int i = 0; i <= shadow->base.b.last_level; i++) {
884 unsigned width = u_minify(shadow->base.b.width0, i);
885 unsigned height = u_minify(shadow->base.b.height0, i);
886 struct pipe_blit_info info = {
887 .dst = {
888 .resource = &shadow->base.b,
889 .level = i,
890 .box = {
891 .x = 0,
892 .y = 0,
893 .z = 0,
894 .width = width,
895 .height = height,
896 .depth = 1,
897 },
898 .format = shadow->base.b.format,
899 },
900 .src = {
901 .resource = &orig->base.b,
902 .level = view->u.tex.first_level + i,
903 .box = {
904 .x = 0,
905 .y = 0,
906 .z = 0,
907 .width = width,
908 .height = height,
909 .depth = 1,
910 },
911 .format = orig->base.b.format,
912 },
913 .mask = ~0,
914 };
915 pctx->blit(pctx, &info);
916 }
917
918 shadow->writes = orig->writes;
919 }
920
921 /**
922 * Converts a 4-byte index buffer to 2 bytes.
923 *
924 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
925 * include 4-byte index support, and we have to shrink it down.
926 *
927 * There's no fallback support for when indices end up being larger than 2^16,
928 * though it will at least assertion fail. Also, if the original index data
929 * was in user memory, it would be nice to not have uploaded it to a VBO
930 * before translating.
931 */
932 struct pipe_resource *
933 vc4_get_shadow_index_buffer(struct pipe_context *pctx,
934 const struct pipe_index_buffer *ib,
935 uint32_t count,
936 uint32_t *shadow_offset)
937 {
938 struct vc4_context *vc4 = vc4_context(pctx);
939 struct vc4_resource *orig = vc4_resource(ib->buffer);
940 perf_debug("Fallback conversion for %d uint indices\n", count);
941
942 void *data;
943 struct pipe_resource *shadow_rsc = NULL;
944 u_upload_alloc(vc4->uploader, 0, count * 2, 4,
945 shadow_offset, &shadow_rsc, &data);
946 uint16_t *dst = data;
947
948 struct pipe_transfer *src_transfer = NULL;
949 const uint32_t *src;
950 if (ib->user_buffer) {
951 src = ib->user_buffer;
952 } else {
953 src = pipe_buffer_map_range(pctx, &orig->base.b,
954 ib->offset,
955 count * 4,
956 PIPE_TRANSFER_READ, &src_transfer);
957 }
958
959 for (int i = 0; i < count; i++) {
960 uint32_t src_index = src[i];
961 assert(src_index <= 0xffff);
962 dst[i] = src_index;
963 }
964
965 if (src_transfer)
966 pctx->transfer_unmap(pctx, src_transfer);
967
968 return shadow_rsc;
969 }
970
971 void
972 vc4_resource_screen_init(struct pipe_screen *pscreen)
973 {
974 pscreen->resource_create = vc4_resource_create;
975 pscreen->resource_from_handle = vc4_resource_from_handle;
976 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
977 pscreen->resource_destroy = u_resource_destroy_vtbl;
978 }
979
980 void
981 vc4_resource_context_init(struct pipe_context *pctx)
982 {
983 pctx->transfer_map = u_transfer_map_vtbl;
984 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
985 pctx->transfer_unmap = u_transfer_unmap_vtbl;
986 pctx->transfer_inline_write = u_transfer_inline_write_vtbl;
987 pctx->create_surface = vc4_create_surface;
988 pctx->surface_destroy = vc4_surface_destroy;
989 pctx->resource_copy_region = util_resource_copy_region;
990 pctx->blit = vc4_blit;
991 pctx->flush_resource = vc4_flush_resource;
992 }