2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "pipe/p_defines.h"
26 #include "util/u_blit.h"
27 #include "util/u_memory.h"
28 #include "util/u_format.h"
29 #include "util/u_inlines.h"
30 #include "util/u_surface.h"
31 #include "util/u_upload_mgr.h"
33 #include "drm_fourcc.h"
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38 #include "vc4_tiling.h"
41 vc4_resource_bo_alloc(struct vc4_resource
*rsc
)
43 struct pipe_resource
*prsc
= &rsc
->base
;
44 struct pipe_screen
*pscreen
= prsc
->screen
;
47 if (vc4_debug
& VC4_DEBUG_SURFACE
) {
48 fprintf(stderr
, "alloc %p: size %d + offset %d -> %d\n",
51 rsc
->slices
[0].offset
,
52 rsc
->slices
[0].offset
+
54 rsc
->cube_map_stride
* (prsc
->array_size
- 1));
57 bo
= vc4_bo_alloc(vc4_screen(pscreen
),
58 rsc
->slices
[0].offset
+
60 rsc
->cube_map_stride
* (prsc
->array_size
- 1),
63 vc4_bo_unreference(&rsc
->bo
);
72 vc4_resource_transfer_unmap(struct pipe_context
*pctx
,
73 struct pipe_transfer
*ptrans
)
75 struct vc4_context
*vc4
= vc4_context(pctx
);
76 struct vc4_transfer
*trans
= vc4_transfer(ptrans
);
79 struct vc4_resource
*rsc
;
80 struct vc4_resource_slice
*slice
;
81 if (trans
->ss_resource
) {
82 rsc
= vc4_resource(trans
->ss_resource
);
83 slice
= &rsc
->slices
[0];
85 rsc
= vc4_resource(ptrans
->resource
);
86 slice
= &rsc
->slices
[ptrans
->level
];
89 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
) {
90 vc4_store_tiled_image(rsc
->bo
->map
+ slice
->offset
+
91 ptrans
->box
.z
* rsc
->cube_map_stride
,
93 trans
->map
, ptrans
->stride
,
94 slice
->tiling
, rsc
->cpp
,
100 if (trans
->ss_resource
&& (ptrans
->usage
& PIPE_TRANSFER_WRITE
)) {
101 struct pipe_blit_info blit
;
102 memset(&blit
, 0, sizeof(blit
));
104 blit
.src
.resource
= trans
->ss_resource
;
105 blit
.src
.format
= trans
->ss_resource
->format
;
106 blit
.src
.box
.width
= trans
->ss_box
.width
;
107 blit
.src
.box
.height
= trans
->ss_box
.height
;
108 blit
.src
.box
.depth
= 1;
110 blit
.dst
.resource
= ptrans
->resource
;
111 blit
.dst
.format
= ptrans
->resource
->format
;
112 blit
.dst
.level
= ptrans
->level
;
113 blit
.dst
.box
= trans
->ss_box
;
115 blit
.mask
= util_format_get_mask(ptrans
->resource
->format
);
116 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
118 pctx
->blit(pctx
, &blit
);
120 pipe_resource_reference(&trans
->ss_resource
, NULL
);
123 pipe_resource_reference(&ptrans
->resource
, NULL
);
124 slab_free(&vc4
->transfer_pool
, ptrans
);
127 static struct pipe_resource
*
128 vc4_get_temp_resource(struct pipe_context
*pctx
,
129 struct pipe_resource
*prsc
,
130 const struct pipe_box
*box
)
132 struct pipe_resource temp_setup
;
134 memset(&temp_setup
, 0, sizeof(temp_setup
));
135 temp_setup
.target
= prsc
->target
;
136 temp_setup
.format
= prsc
->format
;
137 temp_setup
.width0
= box
->width
;
138 temp_setup
.height0
= box
->height
;
139 temp_setup
.depth0
= 1;
140 temp_setup
.array_size
= 1;
142 return pctx
->screen
->resource_create(pctx
->screen
, &temp_setup
);
146 vc4_resource_transfer_map(struct pipe_context
*pctx
,
147 struct pipe_resource
*prsc
,
148 unsigned level
, unsigned usage
,
149 const struct pipe_box
*box
,
150 struct pipe_transfer
**pptrans
)
152 struct vc4_context
*vc4
= vc4_context(pctx
);
153 struct vc4_resource
*rsc
= vc4_resource(prsc
);
154 struct vc4_transfer
*trans
;
155 struct pipe_transfer
*ptrans
;
156 enum pipe_format format
= prsc
->format
;
159 /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
162 if ((usage
& PIPE_TRANSFER_DISCARD_RANGE
) &&
163 !(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) &&
164 !(prsc
->flags
& PIPE_RESOURCE_FLAG_MAP_PERSISTENT
) &&
165 prsc
->last_level
== 0 &&
166 prsc
->width0
== box
->width
&&
167 prsc
->height0
== box
->height
&&
168 prsc
->depth0
== box
->depth
&&
169 prsc
->array_size
== 1 &&
171 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
174 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
175 if (vc4_resource_bo_alloc(rsc
)) {
176 /* If it might be bound as one of our vertex buffers,
177 * make sure we re-emit vertex buffer state.
179 if (prsc
->bind
& PIPE_BIND_VERTEX_BUFFER
)
180 vc4
->dirty
|= VC4_DIRTY_VTXBUF
;
182 /* If we failed to reallocate, flush users so that we
183 * don't violate any syncing requirements.
185 vc4_flush_jobs_reading_resource(vc4
, prsc
);
187 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
188 /* If we're writing and the buffer is being used by the CL, we
189 * have to flush the CL first. If we're only reading, we need
190 * to flush if the CL has written our buffer.
192 if (usage
& PIPE_TRANSFER_WRITE
)
193 vc4_flush_jobs_reading_resource(vc4
, prsc
);
195 vc4_flush_jobs_writing_resource(vc4
, prsc
);
198 if (usage
& PIPE_TRANSFER_WRITE
) {
200 rsc
->initialized_buffers
= ~0;
203 trans
= slab_alloc(&vc4
->transfer_pool
);
207 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
209 /* slab_alloc_st() doesn't zero: */
210 memset(trans
, 0, sizeof(*trans
));
211 ptrans
= &trans
->base
;
213 pipe_resource_reference(&ptrans
->resource
, prsc
);
214 ptrans
->level
= level
;
215 ptrans
->usage
= usage
;
218 /* If the resource is multisampled, we need to resolve to single
219 * sample. This seems like it should be handled at a higher layer.
221 if (prsc
->nr_samples
> 1) {
222 trans
->ss_resource
= vc4_get_temp_resource(pctx
, prsc
, box
);
223 if (!trans
->ss_resource
)
225 assert(!trans
->ss_resource
->nr_samples
);
227 /* The ptrans->box gets modified for tile alignment, so save
228 * the original box for unmap time.
230 trans
->ss_box
= *box
;
232 if (usage
& PIPE_TRANSFER_READ
) {
233 struct pipe_blit_info blit
;
234 memset(&blit
, 0, sizeof(blit
));
236 blit
.src
.resource
= ptrans
->resource
;
237 blit
.src
.format
= ptrans
->resource
->format
;
238 blit
.src
.level
= ptrans
->level
;
239 blit
.src
.box
= trans
->ss_box
;
241 blit
.dst
.resource
= trans
->ss_resource
;
242 blit
.dst
.format
= trans
->ss_resource
->format
;
243 blit
.dst
.box
.width
= trans
->ss_box
.width
;
244 blit
.dst
.box
.height
= trans
->ss_box
.height
;
245 blit
.dst
.box
.depth
= 1;
247 blit
.mask
= util_format_get_mask(prsc
->format
);
248 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
250 pctx
->blit(pctx
, &blit
);
251 vc4_flush_jobs_writing_resource(vc4
, blit
.dst
.resource
);
254 /* The rest of the mapping process should use our temporary. */
255 prsc
= trans
->ss_resource
;
256 rsc
= vc4_resource(prsc
);
262 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)
263 buf
= vc4_bo_map_unsynchronized(rsc
->bo
);
265 buf
= vc4_bo_map(rsc
->bo
);
267 fprintf(stderr
, "Failed to map bo\n");
273 struct vc4_resource_slice
*slice
= &rsc
->slices
[level
];
275 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
276 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
278 /* No direct mappings of tiled, since we need to manually
281 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
)
284 if (format
== PIPE_FORMAT_ETC1_RGB8
) {
285 /* ETC1 is arranged as 64-bit blocks, where each block
286 * is 4x4 pixels. Texture tiling operates on the
287 * 64-bit block the way it would an uncompressed
290 assert(!(ptrans
->box
.x
& 3));
291 assert(!(ptrans
->box
.y
& 3));
294 ptrans
->box
.width
= (ptrans
->box
.width
+ 3) >> 2;
295 ptrans
->box
.height
= (ptrans
->box
.height
+ 3) >> 2;
298 /* We need to align the box to utile boundaries, since that's
299 * what load/store operates on. This may cause us to need to
300 * read out the original contents in that border area. Right
301 * now we just read out the entire contents, including the
302 * middle area that will just get overwritten.
304 uint32_t box_start_x
= ptrans
->box
.x
& (utile_w
- 1);
305 uint32_t box_start_y
= ptrans
->box
.y
& (utile_h
- 1);
306 bool needs_load
= (usage
& PIPE_TRANSFER_READ
) != 0;
309 ptrans
->box
.width
+= box_start_x
;
310 ptrans
->box
.x
-= box_start_x
;
314 ptrans
->box
.height
+= box_start_y
;
315 ptrans
->box
.y
-= box_start_y
;
318 if (ptrans
->box
.width
& (utile_w
- 1)) {
319 /* We only need to force a load if our border region
320 * we're extending into is actually part of the
323 uint32_t slice_width
= u_minify(prsc
->width0
, level
);
324 if (ptrans
->box
.x
+ ptrans
->box
.width
!= slice_width
)
326 ptrans
->box
.width
= align(ptrans
->box
.width
, utile_w
);
328 if (ptrans
->box
.height
& (utile_h
- 1)) {
329 uint32_t slice_height
= u_minify(prsc
->height0
, level
);
330 if (ptrans
->box
.y
+ ptrans
->box
.height
!= slice_height
)
332 ptrans
->box
.height
= align(ptrans
->box
.height
, utile_h
);
335 ptrans
->stride
= ptrans
->box
.width
* rsc
->cpp
;
336 ptrans
->layer_stride
= ptrans
->stride
* ptrans
->box
.height
;
338 trans
->map
= malloc(ptrans
->layer_stride
* ptrans
->box
.depth
);
341 vc4_load_tiled_image(trans
->map
, ptrans
->stride
,
342 buf
+ slice
->offset
+
343 ptrans
->box
.z
* rsc
->cube_map_stride
,
345 slice
->tiling
, rsc
->cpp
,
349 box_start_x
* rsc
->cpp
+
350 box_start_y
* ptrans
->stride
);
352 ptrans
->stride
= slice
->stride
;
353 ptrans
->layer_stride
= ptrans
->stride
;
355 return buf
+ slice
->offset
+
356 ptrans
->box
.y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
357 ptrans
->box
.x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
358 ptrans
->box
.z
* rsc
->cube_map_stride
;
363 vc4_resource_transfer_unmap(pctx
, ptrans
);
368 vc4_resource_destroy(struct pipe_screen
*pscreen
,
369 struct pipe_resource
*prsc
)
371 struct vc4_screen
*screen
= vc4_screen(pscreen
);
372 struct vc4_resource
*rsc
= vc4_resource(prsc
);
373 vc4_bo_unreference(&rsc
->bo
);
376 renderonly_scanout_destroy(rsc
->scanout
, screen
->ro
);
382 vc4_resource_get_handle(struct pipe_screen
*pscreen
,
383 struct pipe_context
*pctx
,
384 struct pipe_resource
*prsc
,
385 struct winsys_handle
*whandle
,
388 struct vc4_screen
*screen
= vc4_screen(pscreen
);
389 struct vc4_resource
*rsc
= vc4_resource(prsc
);
391 whandle
->stride
= rsc
->slices
[0].stride
;
394 /* If we're passing some reference to our BO out to some other part of
395 * the system, then we can't do any optimizations about only us being
396 * the ones seeing it (like BO caching or shadow update avoidance).
398 rsc
->bo
->private = false;
401 whandle
->modifier
= DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
;
403 whandle
->modifier
= DRM_FORMAT_MOD_LINEAR
;
405 switch (whandle
->type
) {
406 case WINSYS_HANDLE_TYPE_SHARED
:
408 /* This could probably be supported, assuming that a
409 * control node was used for pl111.
411 fprintf(stderr
, "flink unsupported with pl111\n");
415 return vc4_bo_flink(rsc
->bo
, &whandle
->handle
);
416 case WINSYS_HANDLE_TYPE_KMS
:
417 if (screen
->ro
&& renderonly_get_handle(rsc
->scanout
, whandle
))
419 whandle
->handle
= rsc
->bo
->handle
;
421 case WINSYS_HANDLE_TYPE_FD
:
422 /* FDs are cross-device, so we can export directly from vc4.
424 whandle
->handle
= vc4_bo_get_dmabuf(rsc
->bo
);
425 return whandle
->handle
!= -1;
432 vc4_setup_slices(struct vc4_resource
*rsc
, const char *caller
)
434 struct pipe_resource
*prsc
= &rsc
->base
;
435 uint32_t width
= prsc
->width0
;
436 uint32_t height
= prsc
->height0
;
437 if (prsc
->format
== PIPE_FORMAT_ETC1_RGB8
) {
438 width
= (width
+ 3) >> 2;
439 height
= (height
+ 3) >> 2;
442 uint32_t pot_width
= util_next_power_of_two(width
);
443 uint32_t pot_height
= util_next_power_of_two(height
);
445 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
446 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
448 for (int i
= prsc
->last_level
; i
>= 0; i
--) {
449 struct vc4_resource_slice
*slice
= &rsc
->slices
[i
];
451 uint32_t level_width
, level_height
;
454 level_height
= height
;
456 level_width
= u_minify(pot_width
, i
);
457 level_height
= u_minify(pot_height
, i
);
461 slice
->tiling
= VC4_TILING_FORMAT_LINEAR
;
462 if (prsc
->nr_samples
> 1) {
463 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
464 level_width
= align(level_width
, 32);
465 level_height
= align(level_height
, 32);
467 level_width
= align(level_width
, utile_w
);
470 if (vc4_size_is_lt(level_width
, level_height
,
472 slice
->tiling
= VC4_TILING_FORMAT_LT
;
473 level_width
= align(level_width
, utile_w
);
474 level_height
= align(level_height
, utile_h
);
476 slice
->tiling
= VC4_TILING_FORMAT_T
;
477 level_width
= align(level_width
,
479 level_height
= align(level_height
,
484 slice
->offset
= offset
;
485 slice
->stride
= (level_width
* rsc
->cpp
*
486 MAX2(prsc
->nr_samples
, 1));
487 slice
->size
= level_height
* slice
->stride
;
489 offset
+= slice
->size
;
491 if (vc4_debug
& VC4_DEBUG_SURFACE
) {
492 static const char tiling_chars
[] = {
493 [VC4_TILING_FORMAT_LINEAR
] = 'R',
494 [VC4_TILING_FORMAT_LT
] = 'L',
495 [VC4_TILING_FORMAT_T
] = 'T'
498 "rsc %s %p (format %s: vc4 %d), %dx%d: "
499 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
501 util_format_short_name(prsc
->format
),
503 prsc
->width0
, prsc
->height0
,
504 i
, tiling_chars
[slice
->tiling
],
505 level_width
, level_height
,
506 slice
->stride
, slice
->offset
);
510 /* The texture base pointer that has to point to level 0 doesn't have
511 * intra-page bits, so we have to align it, and thus shift up all the
514 uint32_t page_align_offset
= (align(rsc
->slices
[0].offset
, 4096) -
515 rsc
->slices
[0].offset
);
516 if (page_align_offset
) {
517 for (int i
= 0; i
<= prsc
->last_level
; i
++)
518 rsc
->slices
[i
].offset
+= page_align_offset
;
521 /* Cube map faces appear as whole miptrees at a page-aligned offset
522 * from the first face's miptree.
524 if (prsc
->target
== PIPE_TEXTURE_CUBE
) {
525 rsc
->cube_map_stride
= align(rsc
->slices
[0].offset
+
526 rsc
->slices
[0].size
, 4096);
530 static struct vc4_resource
*
531 vc4_resource_setup(struct pipe_screen
*pscreen
,
532 const struct pipe_resource
*tmpl
)
534 struct vc4_resource
*rsc
= CALLOC_STRUCT(vc4_resource
);
537 struct pipe_resource
*prsc
= &rsc
->base
;
541 pipe_reference_init(&prsc
->reference
, 1);
542 prsc
->screen
= pscreen
;
544 if (prsc
->nr_samples
<= 1)
545 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
547 rsc
->cpp
= sizeof(uint32_t);
554 static enum vc4_texture_data_type
555 get_resource_texture_format(struct pipe_resource
*prsc
)
557 struct vc4_resource
*rsc
= vc4_resource(prsc
);
558 uint8_t format
= vc4_get_tex_format(prsc
->format
);
561 if (prsc
->nr_samples
> 1) {
564 if (format
== VC4_TEXTURE_TYPE_RGBA8888
)
565 return VC4_TEXTURE_TYPE_RGBA32R
;
575 find_modifier(uint64_t needle
, const uint64_t *haystack
, int count
)
579 for (i
= 0; i
< count
; i
++) {
580 if (haystack
[i
] == needle
)
587 static struct pipe_resource
*
588 vc4_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
589 const struct pipe_resource
*tmpl
,
590 const uint64_t *modifiers
,
593 struct vc4_screen
*screen
= vc4_screen(pscreen
);
594 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
595 struct pipe_resource
*prsc
= &rsc
->base
;
596 bool linear_ok
= find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
597 /* Use a tiled layout if we can, for better 3D performance. */
598 bool should_tile
= true;
600 /* VBOs/PBOs are untiled (and 1 height). */
601 if (tmpl
->target
== PIPE_BUFFER
)
604 /* MSAA buffers are linear. */
605 if (tmpl
->nr_samples
> 1)
608 /* No tiling when we're sharing with another device (pl111). */
609 if (screen
->ro
&& (tmpl
->bind
& PIPE_BIND_SCANOUT
))
612 /* Cursors are always linear, and the user can request linear as well.
614 if (tmpl
->bind
& (PIPE_BIND_LINEAR
| PIPE_BIND_CURSOR
))
617 /* No shared objects with LT format -- the kernel only has T-format
618 * metadata. LT objects are small enough it's not worth the trouble to
619 * give them metadata to tile.
621 if ((tmpl
->bind
& (PIPE_BIND_SHARED
| PIPE_BIND_SCANOUT
)) &&
622 vc4_size_is_lt(prsc
->width0
, prsc
->height0
, rsc
->cpp
))
625 /* If we're sharing or scanning out, we need the ioctl present to
626 * inform the kernel or the other side.
628 if ((tmpl
->bind
& (PIPE_BIND_SHARED
|
629 PIPE_BIND_SCANOUT
)) && !screen
->has_tiling_ioctl
)
632 /* No user-specified modifier; determine our own. */
633 if (count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
) {
635 rsc
->tiled
= should_tile
;
636 } else if (should_tile
&&
637 find_modifier(DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
,
640 } else if (linear_ok
) {
643 fprintf(stderr
, "Unsupported modifier requested\n");
647 if (tmpl
->target
!= PIPE_BUFFER
)
648 rsc
->vc4_format
= get_resource_texture_format(prsc
);
650 vc4_setup_slices(rsc
, "create");
651 if (!vc4_resource_bo_alloc(rsc
))
654 if (screen
->has_tiling_ioctl
) {
657 modifier
= DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
;
659 modifier
= DRM_FORMAT_MOD_LINEAR
;
660 struct drm_vc4_set_tiling set_tiling
= {
661 .handle
= rsc
->bo
->handle
,
662 .modifier
= modifier
,
664 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_SET_TILING
,
670 if (screen
->ro
&& tmpl
->bind
& PIPE_BIND_SCANOUT
) {
672 renderonly_scanout_for_resource(prsc
, screen
->ro
, NULL
);
677 vc4_bo_label(screen
, rsc
->bo
, "%sresource %dx%d@%d/%d",
678 (tmpl
->bind
& PIPE_BIND_SCANOUT
) ? "scanout " : "",
679 tmpl
->width0
, tmpl
->height0
,
680 rsc
->cpp
* 8, prsc
->last_level
);
684 vc4_resource_destroy(pscreen
, prsc
);
688 struct pipe_resource
*
689 vc4_resource_create(struct pipe_screen
*pscreen
,
690 const struct pipe_resource
*tmpl
)
692 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
693 return vc4_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
696 static struct pipe_resource
*
697 vc4_resource_from_handle(struct pipe_screen
*pscreen
,
698 const struct pipe_resource
*tmpl
,
699 struct winsys_handle
*whandle
,
702 struct vc4_screen
*screen
= vc4_screen(pscreen
);
703 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
704 struct pipe_resource
*prsc
= &rsc
->base
;
705 struct vc4_resource_slice
*slice
= &rsc
->slices
[0];
710 switch (whandle
->type
) {
711 case WINSYS_HANDLE_TYPE_SHARED
:
712 rsc
->bo
= vc4_bo_open_name(screen
,
713 whandle
->handle
, whandle
->stride
);
715 case WINSYS_HANDLE_TYPE_FD
:
716 rsc
->bo
= vc4_bo_open_dmabuf(screen
,
717 whandle
->handle
, whandle
->stride
);
721 "Attempt to import unsupported handle type %d\n",
728 struct drm_vc4_get_tiling get_tiling
= {
729 .handle
= rsc
->bo
->handle
,
731 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_GET_TILING
, &get_tiling
);
734 whandle
->modifier
= DRM_FORMAT_MOD_LINEAR
;
735 } else if (whandle
->modifier
== DRM_FORMAT_MOD_INVALID
) {
736 whandle
->modifier
= get_tiling
.modifier
;
737 } else if (whandle
->modifier
!= get_tiling
.modifier
) {
739 "Modifier 0x%llx vs. tiling (0x%llx) mismatch\n",
740 (long long)whandle
->modifier
, get_tiling
.modifier
);
744 switch (whandle
->modifier
) {
745 case DRM_FORMAT_MOD_LINEAR
:
748 case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
:
753 "Attempt to import unsupported modifier 0x%llx\n",
754 (long long)whandle
->modifier
);
758 rsc
->vc4_format
= get_resource_texture_format(prsc
);
759 vc4_setup_slices(rsc
, "import");
761 if (whandle
->offset
!= 0) {
764 "Attempt to import unsupported "
765 "winsys offset %u\n",
770 rsc
->slices
[0].offset
+= whandle
->offset
;
772 if (rsc
->slices
[0].offset
+ rsc
->slices
[0].size
>
774 fprintf(stderr
, "Attempt to import "
775 "with overflowing offset (%d + %d > %d)\n",
784 /* Make sure that renderonly has a handle to our buffer in the
785 * display's fd, so that a later renderonly_get_handle()
786 * returns correct handles or GEM names.
789 renderonly_create_gpu_import_for_resource(prsc
,
796 if (rsc
->tiled
&& whandle
->stride
!= slice
->stride
) {
797 static bool warned
= false;
801 "Attempting to import %dx%d %s with "
802 "unsupported stride %d instead of %d\n",
803 prsc
->width0
, prsc
->height0
,
804 util_format_short_name(prsc
->format
),
809 } else if (!rsc
->tiled
) {
810 slice
->stride
= whandle
->stride
;
816 vc4_resource_destroy(pscreen
, prsc
);
820 static struct pipe_surface
*
821 vc4_create_surface(struct pipe_context
*pctx
,
822 struct pipe_resource
*ptex
,
823 const struct pipe_surface
*surf_tmpl
)
825 struct vc4_surface
*surface
= CALLOC_STRUCT(vc4_surface
);
826 struct vc4_resource
*rsc
= vc4_resource(ptex
);
831 assert(surf_tmpl
->u
.tex
.first_layer
== surf_tmpl
->u
.tex
.last_layer
);
833 struct pipe_surface
*psurf
= &surface
->base
;
834 unsigned level
= surf_tmpl
->u
.tex
.level
;
836 pipe_reference_init(&psurf
->reference
, 1);
837 pipe_resource_reference(&psurf
->texture
, ptex
);
839 psurf
->context
= pctx
;
840 psurf
->format
= surf_tmpl
->format
;
841 psurf
->width
= u_minify(ptex
->width0
, level
);
842 psurf
->height
= u_minify(ptex
->height0
, level
);
843 psurf
->u
.tex
.level
= level
;
844 psurf
->u
.tex
.first_layer
= surf_tmpl
->u
.tex
.first_layer
;
845 psurf
->u
.tex
.last_layer
= surf_tmpl
->u
.tex
.last_layer
;
846 surface
->offset
= (rsc
->slices
[level
].offset
+
847 psurf
->u
.tex
.first_layer
* rsc
->cube_map_stride
);
848 surface
->tiling
= rsc
->slices
[level
].tiling
;
850 return &surface
->base
;
854 vc4_surface_destroy(struct pipe_context
*pctx
, struct pipe_surface
*psurf
)
856 pipe_resource_reference(&psurf
->texture
, NULL
);
861 vc4_dump_surface_non_msaa(struct pipe_surface
*psurf
)
863 struct pipe_resource
*prsc
= psurf
->texture
;
864 struct vc4_resource
*rsc
= vc4_resource(prsc
);
865 uint32_t *map
= vc4_bo_map(rsc
->bo
);
866 uint32_t stride
= rsc
->slices
[0].stride
/ 4;
867 uint32_t width
= psurf
->width
;
868 uint32_t height
= psurf
->height
;
869 uint32_t chunk_w
= width
/ 79;
870 uint32_t chunk_h
= height
/ 40;
871 uint32_t found_colors
[10];
872 uint32_t num_found_colors
= 0;
874 if (rsc
->vc4_format
!= VC4_TEXTURE_TYPE_RGBA32R
) {
875 fprintf(stderr
, "%s: Unsupported format %s\n",
876 __func__
, util_format_short_name(psurf
->format
));
880 for (int by
= 0; by
< height
; by
+= chunk_h
) {
881 for (int bx
= 0; bx
< width
; bx
+= chunk_w
) {
882 int all_found_color
= -1; /* nothing found */
884 for (int y
= by
; y
< MIN2(height
, by
+ chunk_h
); y
++) {
885 for (int x
= bx
; x
< MIN2(width
, bx
+ chunk_w
); x
++) {
886 uint32_t pix
= map
[y
* stride
+ x
];
889 for (i
= 0; i
< num_found_colors
; i
++) {
890 if (pix
== found_colors
[i
])
893 if (i
== num_found_colors
&&
895 ARRAY_SIZE(found_colors
)) {
896 found_colors
[num_found_colors
++] = pix
;
899 if (i
< num_found_colors
) {
900 if (all_found_color
== -1)
902 else if (i
!= all_found_color
)
903 all_found_color
= ARRAY_SIZE(found_colors
);
907 /* If all pixels for this chunk have a consistent
908 * value, then print a character for it. Either a
909 * fixed name (particularly common for piglit tests),
910 * or a runtime-generated number.
912 if (all_found_color
>= 0 &&
913 all_found_color
< ARRAY_SIZE(found_colors
)) {
914 static const struct {
926 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
927 if (named_colors
[i
].val
==
928 found_colors
[all_found_color
]) {
929 fprintf(stderr
, "%s",
934 /* For unnamed colors, print a number and the
935 * numbers will have values printed at the
938 if (i
== ARRAY_SIZE(named_colors
)) {
939 fprintf(stderr
, "%c",
940 '0' + all_found_color
);
943 /* If there's no consistent color, print this.
945 fprintf(stderr
, ".");
948 fprintf(stderr
, "\n");
951 for (int i
= 0; i
< num_found_colors
; i
++) {
952 fprintf(stderr
, "color %d: 0x%08x\n", i
, found_colors
[i
]);
957 vc4_surface_msaa_get_sample(struct pipe_surface
*psurf
,
958 uint32_t x
, uint32_t y
, uint32_t sample
)
960 struct pipe_resource
*prsc
= psurf
->texture
;
961 struct vc4_resource
*rsc
= vc4_resource(prsc
);
962 uint32_t tile_w
= 32, tile_h
= 32;
963 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, 32);
965 uint32_t tile_x
= x
/ tile_w
;
966 uint32_t tile_y
= y
/ tile_h
;
967 uint32_t *tile
= (vc4_bo_map(rsc
->bo
) +
968 VC4_TILE_BUFFER_SIZE
* (tile_y
* tiles_w
+ tile_x
));
969 uint32_t subtile_x
= x
% tile_w
;
970 uint32_t subtile_y
= y
% tile_h
;
972 uint32_t quad_samples
= VC4_MAX_SAMPLES
* 4;
973 uint32_t tile_stride
= quad_samples
* tile_w
/ 2;
975 return *((uint32_t *)tile
+
976 (subtile_y
>> 1) * tile_stride
+
977 (subtile_x
>> 1) * quad_samples
+
978 ((subtile_y
& 1) << 1) +
984 vc4_dump_surface_msaa_char(struct pipe_surface
*psurf
,
985 uint32_t start_x
, uint32_t start_y
,
986 uint32_t w
, uint32_t h
)
988 bool all_same_color
= true;
989 uint32_t all_pix
= 0;
991 for (int y
= start_y
; y
< start_y
+ h
; y
++) {
992 for (int x
= start_x
; x
< start_x
+ w
; x
++) {
993 for (int s
= 0; s
< VC4_MAX_SAMPLES
; s
++) {
994 uint32_t pix
= vc4_surface_msaa_get_sample(psurf
,
997 if (x
== start_x
&& y
== start_y
)
999 else if (all_pix
!= pix
)
1000 all_same_color
= false;
1004 if (all_same_color
) {
1005 static const struct {
1008 } named_colors
[] = {
1009 { 0xff000000, "█" },
1010 { 0x00000000, "█" },
1011 { 0xffff0000, "r" },
1012 { 0xff00ff00, "g" },
1013 { 0xff0000ff, "b" },
1014 { 0xffffffff, "w" },
1017 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
1018 if (named_colors
[i
].val
== all_pix
) {
1019 fprintf(stderr
, "%s",
1024 fprintf(stderr
, "x");
1026 fprintf(stderr
, ".");
1031 vc4_dump_surface_msaa(struct pipe_surface
*psurf
)
1033 uint32_t tile_w
= 32, tile_h
= 32;
1034 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, tile_w
);
1035 uint32_t tiles_h
= DIV_ROUND_UP(psurf
->height
, tile_h
);
1036 uint32_t char_w
= 140, char_h
= 60;
1037 uint32_t char_w_per_tile
= char_w
/ tiles_w
- 1;
1038 uint32_t char_h_per_tile
= char_h
/ tiles_h
- 1;
1040 fprintf(stderr
, "Surface: %dx%d (%dx MSAA)\n",
1041 psurf
->width
, psurf
->height
, psurf
->texture
->nr_samples
);
1043 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
1044 fprintf(stderr
, "-");
1045 fprintf(stderr
, "\n");
1047 for (int ty
= 0; ty
< psurf
->height
; ty
+= tile_h
) {
1048 for (int y
= 0; y
< char_h_per_tile
; y
++) {
1050 for (int tx
= 0; tx
< psurf
->width
; tx
+= tile_w
) {
1051 for (int x
= 0; x
< char_w_per_tile
; x
++) {
1052 uint32_t bx1
= (x
* tile_w
/
1054 uint32_t bx2
= ((x
+ 1) * tile_w
/
1056 uint32_t by1
= (y
* tile_h
/
1058 uint32_t by2
= ((y
+ 1) * tile_h
/
1061 vc4_dump_surface_msaa_char(psurf
,
1067 fprintf(stderr
, "|");
1069 fprintf(stderr
, "\n");
1072 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
1073 fprintf(stderr
, "-");
1074 fprintf(stderr
, "\n");
1078 /** Debug routine to dump the contents of an 8888 surface to the console */
1080 vc4_dump_surface(struct pipe_surface
*psurf
)
1085 if (psurf
->texture
->nr_samples
> 1)
1086 vc4_dump_surface_msaa(psurf
);
1088 vc4_dump_surface_non_msaa(psurf
);
1092 vc4_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*resource
)
1094 /* All calls to flush_resource are followed by a flush of the context,
1095 * so there's nothing to do.
1100 vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx
,
1101 struct pipe_sampler_view
*pview
)
1103 struct vc4_sampler_view
*view
= vc4_sampler_view(pview
);
1104 struct vc4_resource
*shadow
= vc4_resource(view
->texture
);
1105 struct vc4_resource
*orig
= vc4_resource(pview
->texture
);
1107 assert(view
->texture
!= pview
->texture
);
1109 if (shadow
->writes
== orig
->writes
&& orig
->bo
->private)
1112 perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
1113 orig
->base
.width0
, orig
->base
.height0
,
1114 pview
->u
.tex
.first_level
,
1115 pview
->u
.tex
.first_level
? "base level" : "raster layout");
1117 for (int i
= 0; i
<= shadow
->base
.last_level
; i
++) {
1118 unsigned width
= u_minify(shadow
->base
.width0
, i
);
1119 unsigned height
= u_minify(shadow
->base
.height0
, i
);
1120 struct pipe_blit_info info
= {
1122 .resource
= &shadow
->base
,
1132 .format
= shadow
->base
.format
,
1135 .resource
= &orig
->base
,
1136 .level
= pview
->u
.tex
.first_level
+ i
,
1145 .format
= orig
->base
.format
,
1149 pctx
->blit(pctx
, &info
);
1152 shadow
->writes
= orig
->writes
;
1156 * Converts a 4-byte index buffer to 2 bytes.
1158 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
1159 * include 4-byte index support, and we have to shrink it down.
1161 * There's no fallback support for when indices end up being larger than 2^16,
1162 * though it will at least assertion fail. Also, if the original index data
1163 * was in user memory, it would be nice to not have uploaded it to a VBO
1164 * before translating.
1166 struct pipe_resource
*
1167 vc4_get_shadow_index_buffer(struct pipe_context
*pctx
,
1168 const struct pipe_draw_info
*info
,
1171 uint32_t *shadow_offset
)
1173 struct vc4_context
*vc4
= vc4_context(pctx
);
1174 struct vc4_resource
*orig
= vc4_resource(info
->index
.resource
);
1175 perf_debug("Fallback conversion for %d uint indices\n", count
);
1178 struct pipe_resource
*shadow_rsc
= NULL
;
1179 u_upload_alloc(vc4
->uploader
, 0, count
* 2, 4,
1180 shadow_offset
, &shadow_rsc
, &data
);
1181 uint16_t *dst
= data
;
1183 struct pipe_transfer
*src_transfer
= NULL
;
1184 const uint32_t *src
;
1185 if (info
->has_user_indices
) {
1186 src
= info
->index
.user
;
1188 src
= pipe_buffer_map_range(pctx
, &orig
->base
,
1191 PIPE_TRANSFER_READ
, &src_transfer
);
1194 for (int i
= 0; i
< count
; i
++) {
1195 uint32_t src_index
= src
[i
];
1196 assert(src_index
<= 0xffff);
1201 pctx
->transfer_unmap(pctx
, src_transfer
);
1207 vc4_resource_screen_init(struct pipe_screen
*pscreen
)
1209 struct vc4_screen
*screen
= vc4_screen(pscreen
);
1211 pscreen
->resource_create
= vc4_resource_create
;
1212 pscreen
->resource_create_with_modifiers
=
1213 vc4_resource_create_with_modifiers
;
1214 pscreen
->resource_from_handle
= vc4_resource_from_handle
;
1215 pscreen
->resource_destroy
= u_resource_destroy_vtbl
;
1216 pscreen
->resource_get_handle
= vc4_resource_get_handle
;
1217 pscreen
->resource_destroy
= vc4_resource_destroy
;
1219 /* Test if the kernel has GET_TILING; it will return -EINVAL if the
1220 * ioctl does not exist, but -ENOENT if we pass an impossible handle.
1221 * 0 cannot be a valid GEM object, so use that.
1223 struct drm_vc4_get_tiling get_tiling
= {
1226 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_GET_TILING
, &get_tiling
);
1227 if (ret
== -1 && errno
== ENOENT
)
1228 screen
->has_tiling_ioctl
= true;
1232 vc4_resource_context_init(struct pipe_context
*pctx
)
1234 pctx
->transfer_map
= vc4_resource_transfer_map
;
1235 pctx
->transfer_flush_region
= u_default_transfer_flush_region
;
1236 pctx
->transfer_unmap
= vc4_resource_transfer_unmap
;
1237 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1238 pctx
->texture_subdata
= u_default_texture_subdata
;
1239 pctx
->create_surface
= vc4_create_surface
;
1240 pctx
->surface_destroy
= vc4_surface_destroy
;
1241 pctx
->resource_copy_region
= util_resource_copy_region
;
1242 pctx
->blit
= vc4_blit
;
1243 pctx
->flush_resource
= vc4_flush_resource
;