2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "util/u_blit.h"
26 #include "util/u_memory.h"
27 #include "util/u_format.h"
28 #include "util/u_inlines.h"
29 #include "util/u_surface.h"
30 #include "util/u_upload_mgr.h"
32 #include "vc4_screen.h"
33 #include "vc4_context.h"
34 #include "vc4_resource.h"
35 #include "vc4_tiling.h"
37 static bool miptree_debug
= false;
40 vc4_resource_bo_alloc(struct vc4_resource
*rsc
)
42 struct pipe_resource
*prsc
= &rsc
->base
.b
;
43 struct pipe_screen
*pscreen
= prsc
->screen
;
47 fprintf(stderr
, "alloc %p: size %d + offset %d -> %d\n",
50 rsc
->slices
[0].offset
,
51 rsc
->slices
[0].offset
+
53 rsc
->cube_map_stride
* (prsc
->array_size
- 1));
56 bo
= vc4_bo_alloc(vc4_screen(pscreen
),
57 rsc
->slices
[0].offset
+
59 rsc
->cube_map_stride
* (prsc
->array_size
- 1),
62 vc4_bo_unreference(&rsc
->bo
);
71 vc4_resource_transfer_unmap(struct pipe_context
*pctx
,
72 struct pipe_transfer
*ptrans
)
74 struct vc4_context
*vc4
= vc4_context(pctx
);
75 struct vc4_transfer
*trans
= vc4_transfer(ptrans
);
78 struct vc4_resource
*rsc
;
79 struct vc4_resource_slice
*slice
;
80 if (trans
->ss_resource
) {
81 rsc
= vc4_resource(trans
->ss_resource
);
82 slice
= &rsc
->slices
[0];
84 rsc
= vc4_resource(ptrans
->resource
);
85 slice
= &rsc
->slices
[ptrans
->level
];
88 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
) {
89 vc4_store_tiled_image(rsc
->bo
->map
+ slice
->offset
+
90 ptrans
->box
.z
* rsc
->cube_map_stride
,
92 trans
->map
, ptrans
->stride
,
93 slice
->tiling
, rsc
->cpp
,
99 if (trans
->ss_resource
&& (ptrans
->usage
& PIPE_TRANSFER_WRITE
)) {
100 struct pipe_blit_info blit
;
101 memset(&blit
, 0, sizeof(blit
));
103 blit
.src
.resource
= trans
->ss_resource
;
104 blit
.src
.format
= trans
->ss_resource
->format
;
105 blit
.src
.box
.width
= trans
->ss_box
.width
;
106 blit
.src
.box
.height
= trans
->ss_box
.height
;
107 blit
.src
.box
.depth
= 1;
109 blit
.dst
.resource
= ptrans
->resource
;
110 blit
.dst
.format
= ptrans
->resource
->format
;
111 blit
.dst
.level
= ptrans
->level
;
112 blit
.dst
.box
= trans
->ss_box
;
114 blit
.mask
= util_format_get_mask(ptrans
->resource
->format
);
115 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
117 pctx
->blit(pctx
, &blit
);
120 pipe_resource_reference(&trans
->ss_resource
, NULL
);
123 pipe_resource_reference(&ptrans
->resource
, NULL
);
124 util_slab_free(&vc4
->transfer_pool
, ptrans
);
127 static struct pipe_resource
*
128 vc4_get_temp_resource(struct pipe_context
*pctx
,
129 struct pipe_resource
*prsc
,
130 const struct pipe_box
*box
)
132 struct pipe_resource temp_setup
;
134 memset(&temp_setup
, 0, sizeof(temp_setup
));
135 temp_setup
.target
= prsc
->target
;
136 temp_setup
.format
= prsc
->format
;
137 temp_setup
.width0
= box
->width
;
138 temp_setup
.height0
= box
->height
;
139 temp_setup
.depth0
= 1;
140 temp_setup
.array_size
= 1;
142 return pctx
->screen
->resource_create(pctx
->screen
, &temp_setup
);
146 vc4_resource_transfer_map(struct pipe_context
*pctx
,
147 struct pipe_resource
*prsc
,
148 unsigned level
, unsigned usage
,
149 const struct pipe_box
*box
,
150 struct pipe_transfer
**pptrans
)
152 struct vc4_context
*vc4
= vc4_context(pctx
);
153 struct vc4_resource
*rsc
= vc4_resource(prsc
);
154 struct vc4_transfer
*trans
;
155 struct pipe_transfer
*ptrans
;
156 enum pipe_format format
= prsc
->format
;
159 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
160 if (vc4_resource_bo_alloc(rsc
)) {
162 /* If it might be bound as one of our vertex buffers,
163 * make sure we re-emit vertex buffer state.
165 if (prsc
->bind
& PIPE_BIND_VERTEX_BUFFER
)
166 vc4
->dirty
|= VC4_DIRTY_VTXBUF
;
168 /* If we failed to reallocate, flush everything so
169 * that we don't violate any syncing requirements.
173 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
174 if (vc4_cl_references_bo(pctx
, rsc
->bo
)) {
175 if ((usage
& PIPE_TRANSFER_DISCARD_RANGE
) &&
176 prsc
->last_level
== 0 &&
177 prsc
->width0
== box
->width
&&
178 prsc
->height0
== box
->height
&&
179 prsc
->depth0
== box
->depth
&&
180 vc4_resource_bo_alloc(rsc
)) {
181 if (prsc
->bind
& PIPE_BIND_VERTEX_BUFFER
)
182 vc4
->dirty
|= VC4_DIRTY_VTXBUF
;
189 if (usage
& PIPE_TRANSFER_WRITE
)
192 trans
= util_slab_alloc(&vc4
->transfer_pool
);
196 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
198 /* util_slab_alloc() doesn't zero: */
199 memset(trans
, 0, sizeof(*trans
));
200 ptrans
= &trans
->base
;
202 pipe_resource_reference(&ptrans
->resource
, prsc
);
203 ptrans
->level
= level
;
204 ptrans
->usage
= usage
;
207 /* If the resource is multisampled, we need to resolve to single
208 * sample. This seems like it should be handled at a higher layer.
210 if (prsc
->nr_samples
> 1) {
211 trans
->ss_resource
= vc4_get_temp_resource(pctx
, prsc
, box
);
212 if (!trans
->ss_resource
)
214 assert(!trans
->ss_resource
->nr_samples
);
216 /* The ptrans->box gets modified for tile alignment, so save
217 * the original box for unmap time.
219 trans
->ss_box
= *box
;
221 if (usage
& PIPE_TRANSFER_READ
) {
222 struct pipe_blit_info blit
;
223 memset(&blit
, 0, sizeof(blit
));
225 blit
.src
.resource
= ptrans
->resource
;
226 blit
.src
.format
= ptrans
->resource
->format
;
227 blit
.src
.level
= ptrans
->level
;
228 blit
.src
.box
= trans
->ss_box
;
230 blit
.dst
.resource
= trans
->ss_resource
;
231 blit
.dst
.format
= trans
->ss_resource
->format
;
232 blit
.dst
.box
.width
= trans
->ss_box
.width
;
233 blit
.dst
.box
.height
= trans
->ss_box
.height
;
234 blit
.dst
.box
.depth
= 1;
236 blit
.mask
= util_format_get_mask(prsc
->format
);
237 blit
.filter
= PIPE_TEX_FILTER_NEAREST
;
239 pctx
->blit(pctx
, &blit
);
243 /* The rest of the mapping process should use our temporary. */
244 prsc
= trans
->ss_resource
;
245 rsc
= vc4_resource(prsc
);
251 /* Note that the current kernel implementation is synchronous, so no
252 * need to do syncing stuff here yet.
255 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)
256 buf
= vc4_bo_map_unsynchronized(rsc
->bo
);
258 buf
= vc4_bo_map(rsc
->bo
);
260 fprintf(stderr
, "Failed to map bo\n");
266 struct vc4_resource_slice
*slice
= &rsc
->slices
[level
];
268 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
269 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
271 /* No direct mappings of tiled, since we need to manually
274 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
)
277 /* We need to align the box to utile boundaries, since that's
278 * what load/store operate on.
280 uint32_t orig_width
= ptrans
->box
.width
;
281 uint32_t orig_height
= ptrans
->box
.height
;
282 uint32_t box_start_x
= ptrans
->box
.x
& (utile_w
- 1);
283 uint32_t box_start_y
= ptrans
->box
.y
& (utile_h
- 1);
284 ptrans
->box
.width
+= box_start_x
;
285 ptrans
->box
.x
-= box_start_x
;
286 ptrans
->box
.height
+= box_start_y
;
287 ptrans
->box
.y
-= box_start_y
;
288 ptrans
->box
.width
= align(ptrans
->box
.width
, utile_w
);
289 ptrans
->box
.height
= align(ptrans
->box
.height
, utile_h
);
291 ptrans
->stride
= ptrans
->box
.width
* rsc
->cpp
;
292 ptrans
->layer_stride
= ptrans
->stride
;
294 trans
->map
= malloc(ptrans
->stride
* ptrans
->box
.height
);
295 if (usage
& PIPE_TRANSFER_READ
||
296 ptrans
->box
.width
!= orig_width
||
297 ptrans
->box
.height
!= orig_height
) {
298 vc4_load_tiled_image(trans
->map
, ptrans
->stride
,
299 buf
+ slice
->offset
+
300 ptrans
->box
.z
* rsc
->cube_map_stride
,
302 slice
->tiling
, rsc
->cpp
,
306 box_start_x
* rsc
->cpp
+
307 box_start_y
* ptrans
->stride
);
309 ptrans
->stride
= slice
->stride
;
310 ptrans
->layer_stride
= ptrans
->stride
;
312 return buf
+ slice
->offset
+
313 ptrans
->box
.y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
314 ptrans
->box
.x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
315 ptrans
->box
.z
* rsc
->cube_map_stride
;
320 vc4_resource_transfer_unmap(pctx
, ptrans
);
325 vc4_resource_destroy(struct pipe_screen
*pscreen
,
326 struct pipe_resource
*prsc
)
328 struct vc4_resource
*rsc
= vc4_resource(prsc
);
329 pipe_resource_reference(&rsc
->shadow_parent
, NULL
);
330 vc4_bo_unreference(&rsc
->bo
);
335 vc4_resource_get_handle(struct pipe_screen
*pscreen
,
336 struct pipe_resource
*prsc
,
337 struct winsys_handle
*handle
)
339 struct vc4_resource
*rsc
= vc4_resource(prsc
);
341 return vc4_screen_bo_get_handle(pscreen
, rsc
->bo
, rsc
->slices
[0].stride
,
345 static const struct u_resource_vtbl vc4_resource_vtbl
= {
346 .resource_get_handle
= vc4_resource_get_handle
,
347 .resource_destroy
= vc4_resource_destroy
,
348 .transfer_map
= vc4_resource_transfer_map
,
349 .transfer_flush_region
= u_default_transfer_flush_region
,
350 .transfer_unmap
= vc4_resource_transfer_unmap
,
351 .transfer_inline_write
= u_default_transfer_inline_write
,
355 vc4_setup_slices(struct vc4_resource
*rsc
)
357 struct pipe_resource
*prsc
= &rsc
->base
.b
;
358 uint32_t width
= prsc
->width0
;
359 uint32_t height
= prsc
->height0
;
360 uint32_t pot_width
= util_next_power_of_two(width
);
361 uint32_t pot_height
= util_next_power_of_two(height
);
363 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
364 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
366 for (int i
= prsc
->last_level
; i
>= 0; i
--) {
367 struct vc4_resource_slice
*slice
= &rsc
->slices
[i
];
369 uint32_t level_width
, level_height
;
372 level_height
= height
;
374 level_width
= u_minify(pot_width
, i
);
375 level_height
= u_minify(pot_height
, i
);
379 slice
->tiling
= VC4_TILING_FORMAT_LINEAR
;
380 if (prsc
->nr_samples
> 1) {
381 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
382 level_width
= align(level_width
, 32);
383 level_height
= align(level_height
, 32);
385 level_width
= align(level_width
, utile_w
);
388 if (vc4_size_is_lt(level_width
, level_height
,
390 slice
->tiling
= VC4_TILING_FORMAT_LT
;
391 level_width
= align(level_width
, utile_w
);
392 level_height
= align(level_height
, utile_h
);
394 slice
->tiling
= VC4_TILING_FORMAT_T
;
395 level_width
= align(level_width
,
397 level_height
= align(level_height
,
402 slice
->offset
= offset
;
403 slice
->stride
= (level_width
* rsc
->cpp
*
404 MAX2(prsc
->nr_samples
, 1));
405 slice
->size
= level_height
* slice
->stride
;
407 offset
+= slice
->size
;
410 static const char tiling_chars
[] = {
411 [VC4_TILING_FORMAT_LINEAR
] = 'R',
412 [VC4_TILING_FORMAT_LT
] = 'L',
413 [VC4_TILING_FORMAT_T
] = 'T'
416 "rsc setup %p (format %d), %dx%d: "
417 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
418 rsc
, rsc
->vc4_format
,
419 prsc
->width0
, prsc
->height0
,
420 i
, tiling_chars
[slice
->tiling
],
421 level_width
, level_height
,
422 slice
->stride
, slice
->offset
);
426 /* The texture base pointer that has to point to level 0 doesn't have
427 * intra-page bits, so we have to align it, and thus shift up all the
430 uint32_t page_align_offset
= (align(rsc
->slices
[0].offset
, 4096) -
431 rsc
->slices
[0].offset
);
432 if (page_align_offset
) {
433 for (int i
= 0; i
<= prsc
->last_level
; i
++)
434 rsc
->slices
[i
].offset
+= page_align_offset
;
437 /* Cube map faces appear as whole miptrees at a page-aligned offset
438 * from the first face's miptree.
440 if (prsc
->target
== PIPE_TEXTURE_CUBE
) {
441 rsc
->cube_map_stride
= align(rsc
->slices
[0].offset
+
442 rsc
->slices
[0].size
, 4096);
446 static struct vc4_resource
*
447 vc4_resource_setup(struct pipe_screen
*pscreen
,
448 const struct pipe_resource
*tmpl
)
450 struct vc4_resource
*rsc
= CALLOC_STRUCT(vc4_resource
);
453 struct pipe_resource
*prsc
= &rsc
->base
.b
;
457 pipe_reference_init(&prsc
->reference
, 1);
458 prsc
->screen
= pscreen
;
460 rsc
->base
.vtbl
= &vc4_resource_vtbl
;
461 if (prsc
->nr_samples
<= 1)
462 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
464 rsc
->cpp
= sizeof(uint32_t);
471 static enum vc4_texture_data_type
472 get_resource_texture_format(struct pipe_resource
*prsc
)
474 struct vc4_resource
*rsc
= vc4_resource(prsc
);
475 uint8_t format
= vc4_get_tex_format(prsc
->format
);
478 if (prsc
->nr_samples
> 1) {
481 assert(format
== VC4_TEXTURE_TYPE_RGBA8888
);
482 return VC4_TEXTURE_TYPE_RGBA32R
;
489 struct pipe_resource
*
490 vc4_resource_create(struct pipe_screen
*pscreen
,
491 const struct pipe_resource
*tmpl
)
493 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
494 struct pipe_resource
*prsc
= &rsc
->base
.b
;
496 /* We have to make shared be untiled, since we don't have any way to
497 * communicate metadata about tiling currently.
499 if (tmpl
->target
== PIPE_BUFFER
||
500 tmpl
->nr_samples
> 1 ||
501 (tmpl
->bind
& (PIPE_BIND_SCANOUT
|
504 PIPE_BIND_CURSOR
))) {
510 if (tmpl
->target
!= PIPE_BUFFER
)
511 rsc
->vc4_format
= get_resource_texture_format(prsc
);
513 vc4_setup_slices(rsc
);
514 if (!vc4_resource_bo_alloc(rsc
))
519 vc4_resource_destroy(pscreen
, prsc
);
523 static struct pipe_resource
*
524 vc4_resource_from_handle(struct pipe_screen
*pscreen
,
525 const struct pipe_resource
*tmpl
,
526 struct winsys_handle
*handle
,
529 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
530 struct pipe_resource
*prsc
= &rsc
->base
.b
;
531 struct vc4_resource_slice
*slice
= &rsc
->slices
[0];
537 rsc
->bo
= vc4_screen_bo_from_handle(pscreen
, handle
);
541 if (!using_vc4_simulator
)
542 slice
->stride
= handle
->stride
;
544 slice
->stride
= align(prsc
->width0
* rsc
->cpp
, 16);
546 slice
->tiling
= VC4_TILING_FORMAT_LINEAR
;
548 rsc
->vc4_format
= get_resource_texture_format(prsc
);
552 "rsc import %p (format %d), %dx%d: "
553 "level 0 (R) -> stride %d@0x%08x\n",
554 rsc
, rsc
->vc4_format
,
555 prsc
->width0
, prsc
->height0
,
556 slice
->stride
, slice
->offset
);
562 vc4_resource_destroy(pscreen
, prsc
);
566 static struct pipe_surface
*
567 vc4_create_surface(struct pipe_context
*pctx
,
568 struct pipe_resource
*ptex
,
569 const struct pipe_surface
*surf_tmpl
)
571 struct vc4_surface
*surface
= CALLOC_STRUCT(vc4_surface
);
572 struct vc4_resource
*rsc
= vc4_resource(ptex
);
577 assert(surf_tmpl
->u
.tex
.first_layer
== surf_tmpl
->u
.tex
.last_layer
);
579 struct pipe_surface
*psurf
= &surface
->base
;
580 unsigned level
= surf_tmpl
->u
.tex
.level
;
582 pipe_reference_init(&psurf
->reference
, 1);
583 pipe_resource_reference(&psurf
->texture
, ptex
);
585 psurf
->context
= pctx
;
586 psurf
->format
= surf_tmpl
->format
;
587 psurf
->width
= u_minify(ptex
->width0
, level
);
588 psurf
->height
= u_minify(ptex
->height0
, level
);
589 psurf
->u
.tex
.level
= level
;
590 psurf
->u
.tex
.first_layer
= surf_tmpl
->u
.tex
.first_layer
;
591 psurf
->u
.tex
.last_layer
= surf_tmpl
->u
.tex
.last_layer
;
592 surface
->offset
= rsc
->slices
[level
].offset
;
593 surface
->tiling
= rsc
->slices
[level
].tiling
;
595 return &surface
->base
;
599 vc4_surface_destroy(struct pipe_context
*pctx
, struct pipe_surface
*psurf
)
601 pipe_resource_reference(&psurf
->texture
, NULL
);
606 vc4_dump_surface_non_msaa(struct pipe_surface
*psurf
)
608 struct pipe_resource
*prsc
= psurf
->texture
;
609 struct vc4_resource
*rsc
= vc4_resource(prsc
);
610 uint32_t *map
= vc4_bo_map(rsc
->bo
);
611 uint32_t stride
= rsc
->slices
[0].stride
/ 4;
612 uint32_t width
= psurf
->width
;
613 uint32_t height
= psurf
->height
;
614 uint32_t chunk_w
= width
/ 79;
615 uint32_t chunk_h
= height
/ 40;
616 uint32_t found_colors
[10];
617 uint32_t num_found_colors
= 0;
619 if (rsc
->vc4_format
!= VC4_TEXTURE_TYPE_RGBA32R
) {
620 fprintf(stderr
, "%s: Unsupported format %s\n",
621 __func__
, util_format_short_name(psurf
->format
));
625 for (int by
= 0; by
< height
; by
+= chunk_h
) {
626 for (int bx
= 0; bx
< width
; bx
+= chunk_w
) {
627 int all_found_color
= -1; /* nothing found */
629 for (int y
= by
; y
< MIN2(height
, by
+ chunk_h
); y
++) {
630 for (int x
= bx
; x
< MIN2(width
, bx
+ chunk_w
); x
++) {
631 uint32_t pix
= map
[y
* stride
+ x
];
634 for (i
= 0; i
< num_found_colors
; i
++) {
635 if (pix
== found_colors
[i
])
638 if (i
== num_found_colors
&&
640 ARRAY_SIZE(found_colors
)) {
641 found_colors
[num_found_colors
++] = pix
;
644 if (i
< num_found_colors
) {
645 if (all_found_color
== -1)
647 else if (i
!= all_found_color
)
648 all_found_color
= ARRAY_SIZE(found_colors
);
652 /* If all pixels for this chunk have a consistent
653 * value, then print a character for it. Either a
654 * fixed name (particularly common for piglit tests),
655 * or a runtime-generated number.
657 if (all_found_color
>= 0 &&
658 all_found_color
< ARRAY_SIZE(found_colors
)) {
659 static const struct {
671 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
672 if (named_colors
[i
].val
==
673 found_colors
[all_found_color
]) {
674 fprintf(stderr
, "%s",
679 /* For unnamed colors, print a number and the
680 * numbers will have values printed at the
683 if (i
== ARRAY_SIZE(named_colors
)) {
684 fprintf(stderr
, "%c",
685 '0' + all_found_color
);
688 /* If there's no consistent color, print this.
690 fprintf(stderr
, ".");
693 fprintf(stderr
, "\n");
696 for (int i
= 0; i
< num_found_colors
; i
++) {
697 fprintf(stderr
, "color %d: 0x%08x\n", i
, found_colors
[i
]);
702 vc4_surface_msaa_get_sample(struct pipe_surface
*psurf
,
703 uint32_t x
, uint32_t y
, uint32_t sample
)
705 struct pipe_resource
*prsc
= psurf
->texture
;
706 struct vc4_resource
*rsc
= vc4_resource(prsc
);
707 uint32_t tile_w
= 32, tile_h
= 32;
708 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, 32);
710 uint32_t tile_x
= x
/ tile_w
;
711 uint32_t tile_y
= y
/ tile_h
;
712 uint32_t *tile
= (vc4_bo_map(rsc
->bo
) +
713 VC4_TILE_BUFFER_SIZE
* (tile_y
* tiles_w
+ tile_x
));
714 uint32_t subtile_x
= x
% tile_w
;
715 uint32_t subtile_y
= y
% tile_h
;
717 uint32_t quad_samples
= VC4_MAX_SAMPLES
* 4;
718 uint32_t tile_stride
= quad_samples
* tile_w
/ 2;
720 return *((uint32_t *)tile
+
721 (subtile_y
>> 1) * tile_stride
+
722 (subtile_x
>> 1) * quad_samples
+
723 ((subtile_y
& 1) << 1) +
729 vc4_dump_surface_msaa_char(struct pipe_surface
*psurf
,
730 uint32_t start_x
, uint32_t start_y
,
731 uint32_t w
, uint32_t h
)
733 bool all_same_color
= true;
734 uint32_t all_pix
= 0;
736 for (int y
= start_y
; y
< start_y
+ h
; y
++) {
737 for (int x
= start_x
; x
< start_x
+ w
; x
++) {
738 for (int s
= 0; s
< VC4_MAX_SAMPLES
; s
++) {
739 uint32_t pix
= vc4_surface_msaa_get_sample(psurf
,
742 if (x
== start_x
&& y
== start_y
)
744 else if (all_pix
!= pix
)
745 all_same_color
= false;
749 if (all_same_color
) {
750 static const struct {
762 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
763 if (named_colors
[i
].val
== all_pix
) {
764 fprintf(stderr
, "%s",
769 fprintf(stderr
, "x");
771 fprintf(stderr
, ".");
776 vc4_dump_surface_msaa(struct pipe_surface
*psurf
)
778 uint32_t tile_w
= 32, tile_h
= 32;
779 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, tile_w
);
780 uint32_t tiles_h
= DIV_ROUND_UP(psurf
->height
, tile_h
);
781 uint32_t char_w
= 140, char_h
= 60;
782 uint32_t char_w_per_tile
= char_w
/ tiles_w
- 1;
783 uint32_t char_h_per_tile
= char_h
/ tiles_h
- 1;
784 uint32_t found_colors
[10];
785 uint32_t num_found_colors
= 0;
787 fprintf(stderr
, "Surface: %dx%d (%dx MSAA)\n",
788 psurf
->width
, psurf
->height
, psurf
->texture
->nr_samples
);
790 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
791 fprintf(stderr
, "-");
792 fprintf(stderr
, "\n");
794 for (int ty
= 0; ty
< psurf
->height
; ty
+= tile_h
) {
795 for (int y
= 0; y
< char_h_per_tile
; y
++) {
797 for (int tx
= 0; tx
< psurf
->width
; tx
+= tile_w
) {
798 for (int x
= 0; x
< char_w_per_tile
; x
++) {
799 uint32_t bx1
= (x
* tile_w
/
801 uint32_t bx2
= ((x
+ 1) * tile_w
/
803 uint32_t by1
= (y
* tile_h
/
805 uint32_t by2
= ((y
+ 1) * tile_h
/
808 vc4_dump_surface_msaa_char(psurf
,
814 fprintf(stderr
, "|");
816 fprintf(stderr
, "\n");
819 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
820 fprintf(stderr
, "-");
821 fprintf(stderr
, "\n");
824 for (int i
= 0; i
< num_found_colors
; i
++) {
825 fprintf(stderr
, "color %d: 0x%08x\n", i
, found_colors
[i
]);
829 /** Debug routine to dump the contents of an 8888 surface to the console */
831 vc4_dump_surface(struct pipe_surface
*psurf
)
836 if (psurf
->texture
->nr_samples
> 1)
837 vc4_dump_surface_msaa(psurf
);
839 vc4_dump_surface_non_msaa(psurf
);
843 vc4_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*resource
)
845 /* All calls to flush_resource are followed by a flush of the context,
846 * so there's nothing to do.
851 vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx
,
852 struct pipe_sampler_view
*view
)
854 struct vc4_resource
*shadow
= vc4_resource(view
->texture
);
855 struct vc4_resource
*orig
= vc4_resource(shadow
->shadow_parent
);
858 if (shadow
->writes
== orig
->writes
&& orig
->bo
->private)
861 perf_debug("Updating shadow texture due to %s\n",
862 view
->u
.tex
.first_level
? "base level" : "raster layout");
864 for (int i
= 0; i
<= shadow
->base
.b
.last_level
; i
++) {
865 unsigned width
= u_minify(shadow
->base
.b
.width0
, i
);
866 unsigned height
= u_minify(shadow
->base
.b
.height0
, i
);
867 struct pipe_blit_info info
= {
869 .resource
= &shadow
->base
.b
,
879 .format
= shadow
->base
.b
.format
,
882 .resource
= &orig
->base
.b
,
883 .level
= view
->u
.tex
.first_level
+ i
,
892 .format
= orig
->base
.b
.format
,
896 pctx
->blit(pctx
, &info
);
899 shadow
->writes
= orig
->writes
;
903 * Converts a 4-byte index buffer to 2 bytes.
905 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
906 * include 4-byte index support, and we have to shrink it down.
908 * There's no fallback support for when indices end up being larger than 2^16,
909 * though it will at least assertion fail. Also, if the original index data
910 * was in user memory, it would be nice to not have uploaded it to a VBO
911 * before translating.
913 struct pipe_resource
*
914 vc4_get_shadow_index_buffer(struct pipe_context
*pctx
,
915 const struct pipe_index_buffer
*ib
,
917 uint32_t *shadow_offset
)
919 struct vc4_context
*vc4
= vc4_context(pctx
);
920 struct vc4_resource
*orig
= vc4_resource(ib
->buffer
);
921 perf_debug("Fallback conversion for %d uint indices\n", count
);
924 struct pipe_resource
*shadow_rsc
= NULL
;
925 u_upload_alloc(vc4
->uploader
, 0, count
* 2, 4,
926 shadow_offset
, &shadow_rsc
, &data
);
927 uint16_t *dst
= data
;
929 struct pipe_transfer
*src_transfer
= NULL
;
931 if (ib
->user_buffer
) {
932 src
= ib
->user_buffer
;
934 src
= pipe_buffer_map_range(pctx
, &orig
->base
.b
,
937 PIPE_TRANSFER_READ
, &src_transfer
);
940 for (int i
= 0; i
< count
; i
++) {
941 uint32_t src_index
= src
[i
];
942 assert(src_index
<= 0xffff);
947 pctx
->transfer_unmap(pctx
, src_transfer
);
953 vc4_resource_screen_init(struct pipe_screen
*pscreen
)
955 pscreen
->resource_create
= vc4_resource_create
;
956 pscreen
->resource_from_handle
= vc4_resource_from_handle
;
957 pscreen
->resource_get_handle
= u_resource_get_handle_vtbl
;
958 pscreen
->resource_destroy
= u_resource_destroy_vtbl
;
962 vc4_resource_context_init(struct pipe_context
*pctx
)
964 pctx
->transfer_map
= u_transfer_map_vtbl
;
965 pctx
->transfer_flush_region
= u_transfer_flush_region_vtbl
;
966 pctx
->transfer_unmap
= u_transfer_unmap_vtbl
;
967 pctx
->transfer_inline_write
= u_transfer_inline_write_vtbl
;
968 pctx
->create_surface
= vc4_create_surface
;
969 pctx
->surface_destroy
= vc4_surface_destroy
;
970 pctx
->resource_copy_region
= util_resource_copy_region
;
971 pctx
->blit
= vc4_blit
;
972 pctx
->flush_resource
= vc4_flush_resource
;