2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "pipe/p_defines.h"
26 #include "util/u_blit.h"
27 #include "util/u_memory.h"
28 #include "util/u_format.h"
29 #include "util/u_inlines.h"
30 #include "util/u_surface.h"
31 #include "util/u_transfer_helper.h"
32 #include "util/u_upload_mgr.h"
34 #include "drm_fourcc.h"
36 #include "vc4_screen.h"
37 #include "vc4_context.h"
38 #include "vc4_resource.h"
39 #include "vc4_tiling.h"
42 vc4_resource_bo_alloc(struct vc4_resource
*rsc
)
44 struct pipe_resource
*prsc
= &rsc
->base
;
45 struct pipe_screen
*pscreen
= prsc
->screen
;
48 if (vc4_debug
& VC4_DEBUG_SURFACE
) {
49 fprintf(stderr
, "alloc %p: size %d + offset %d -> %d\n",
52 rsc
->slices
[0].offset
,
53 rsc
->slices
[0].offset
+
55 rsc
->cube_map_stride
* (prsc
->array_size
- 1));
58 bo
= vc4_bo_alloc(vc4_screen(pscreen
),
59 rsc
->slices
[0].offset
+
61 rsc
->cube_map_stride
* (prsc
->array_size
- 1),
64 vc4_bo_unreference(&rsc
->bo
);
73 vc4_resource_transfer_unmap(struct pipe_context
*pctx
,
74 struct pipe_transfer
*ptrans
)
76 struct vc4_context
*vc4
= vc4_context(pctx
);
77 struct vc4_transfer
*trans
= vc4_transfer(ptrans
);
80 struct vc4_resource
*rsc
= vc4_resource(ptrans
->resource
);
81 struct vc4_resource_slice
*slice
= &rsc
->slices
[ptrans
->level
];
83 if (ptrans
->usage
& PIPE_TRANSFER_WRITE
) {
84 vc4_store_tiled_image(rsc
->bo
->map
+ slice
->offset
+
85 ptrans
->box
.z
* rsc
->cube_map_stride
,
87 trans
->map
, ptrans
->stride
,
88 slice
->tiling
, rsc
->cpp
,
94 pipe_resource_reference(&ptrans
->resource
, NULL
);
95 slab_free(&vc4
->transfer_pool
, ptrans
);
99 vc4_resource_transfer_map(struct pipe_context
*pctx
,
100 struct pipe_resource
*prsc
,
101 unsigned level
, unsigned usage
,
102 const struct pipe_box
*box
,
103 struct pipe_transfer
**pptrans
)
105 struct vc4_context
*vc4
= vc4_context(pctx
);
106 struct vc4_resource
*rsc
= vc4_resource(prsc
);
107 struct vc4_transfer
*trans
;
108 struct pipe_transfer
*ptrans
;
109 enum pipe_format format
= prsc
->format
;
112 /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
115 if ((usage
& PIPE_TRANSFER_DISCARD_RANGE
) &&
116 !(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) &&
117 !(prsc
->flags
& PIPE_RESOURCE_FLAG_MAP_PERSISTENT
) &&
118 prsc
->last_level
== 0 &&
119 prsc
->width0
== box
->width
&&
120 prsc
->height0
== box
->height
&&
121 prsc
->depth0
== box
->depth
&&
122 prsc
->array_size
== 1 &&
124 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
127 if (usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
128 if (vc4_resource_bo_alloc(rsc
)) {
129 /* If it might be bound as one of our vertex buffers,
130 * make sure we re-emit vertex buffer state.
132 if (prsc
->bind
& PIPE_BIND_VERTEX_BUFFER
)
133 vc4
->dirty
|= VC4_DIRTY_VTXBUF
;
135 /* If we failed to reallocate, flush users so that we
136 * don't violate any syncing requirements.
138 vc4_flush_jobs_reading_resource(vc4
, prsc
);
140 } else if (!(usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)) {
141 /* If we're writing and the buffer is being used by the CL, we
142 * have to flush the CL first. If we're only reading, we need
143 * to flush if the CL has written our buffer.
145 if (usage
& PIPE_TRANSFER_WRITE
)
146 vc4_flush_jobs_reading_resource(vc4
, prsc
);
148 vc4_flush_jobs_writing_resource(vc4
, prsc
);
151 if (usage
& PIPE_TRANSFER_WRITE
) {
153 rsc
->initialized_buffers
= ~0;
156 trans
= slab_alloc(&vc4
->transfer_pool
);
160 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
162 /* slab_alloc_st() doesn't zero: */
163 memset(trans
, 0, sizeof(*trans
));
164 ptrans
= &trans
->base
;
166 pipe_resource_reference(&ptrans
->resource
, prsc
);
167 ptrans
->level
= level
;
168 ptrans
->usage
= usage
;
171 if (usage
& PIPE_TRANSFER_UNSYNCHRONIZED
)
172 buf
= vc4_bo_map_unsynchronized(rsc
->bo
);
174 buf
= vc4_bo_map(rsc
->bo
);
176 fprintf(stderr
, "Failed to map bo\n");
182 struct vc4_resource_slice
*slice
= &rsc
->slices
[level
];
184 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
185 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
187 /* No direct mappings of tiled, since we need to manually
190 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
)
193 if (format
== PIPE_FORMAT_ETC1_RGB8
) {
194 /* ETC1 is arranged as 64-bit blocks, where each block
195 * is 4x4 pixels. Texture tiling operates on the
196 * 64-bit block the way it would an uncompressed
199 assert(!(ptrans
->box
.x
& 3));
200 assert(!(ptrans
->box
.y
& 3));
203 ptrans
->box
.width
= (ptrans
->box
.width
+ 3) >> 2;
204 ptrans
->box
.height
= (ptrans
->box
.height
+ 3) >> 2;
207 /* We need to align the box to utile boundaries, since that's
208 * what load/store operates on. This may cause us to need to
209 * read out the original contents in that border area. Right
210 * now we just read out the entire contents, including the
211 * middle area that will just get overwritten.
213 uint32_t box_start_x
= ptrans
->box
.x
& (utile_w
- 1);
214 uint32_t box_start_y
= ptrans
->box
.y
& (utile_h
- 1);
215 bool needs_load
= (usage
& PIPE_TRANSFER_READ
) != 0;
218 ptrans
->box
.width
+= box_start_x
;
219 ptrans
->box
.x
-= box_start_x
;
223 ptrans
->box
.height
+= box_start_y
;
224 ptrans
->box
.y
-= box_start_y
;
227 if (ptrans
->box
.width
& (utile_w
- 1)) {
228 /* We only need to force a load if our border region
229 * we're extending into is actually part of the
232 uint32_t slice_width
= u_minify(prsc
->width0
, level
);
233 if (ptrans
->box
.x
+ ptrans
->box
.width
!= slice_width
)
235 ptrans
->box
.width
= align(ptrans
->box
.width
, utile_w
);
237 if (ptrans
->box
.height
& (utile_h
- 1)) {
238 uint32_t slice_height
= u_minify(prsc
->height0
, level
);
239 if (ptrans
->box
.y
+ ptrans
->box
.height
!= slice_height
)
241 ptrans
->box
.height
= align(ptrans
->box
.height
, utile_h
);
244 ptrans
->stride
= ptrans
->box
.width
* rsc
->cpp
;
245 ptrans
->layer_stride
= ptrans
->stride
* ptrans
->box
.height
;
247 trans
->map
= malloc(ptrans
->layer_stride
* ptrans
->box
.depth
);
250 vc4_load_tiled_image(trans
->map
, ptrans
->stride
,
251 buf
+ slice
->offset
+
252 ptrans
->box
.z
* rsc
->cube_map_stride
,
254 slice
->tiling
, rsc
->cpp
,
258 box_start_x
* rsc
->cpp
+
259 box_start_y
* ptrans
->stride
);
261 ptrans
->stride
= slice
->stride
;
262 ptrans
->layer_stride
= ptrans
->stride
;
264 return buf
+ slice
->offset
+
265 ptrans
->box
.y
/ util_format_get_blockheight(format
) * ptrans
->stride
+
266 ptrans
->box
.x
/ util_format_get_blockwidth(format
) * rsc
->cpp
+
267 ptrans
->box
.z
* rsc
->cube_map_stride
;
272 vc4_resource_transfer_unmap(pctx
, ptrans
);
277 vc4_resource_destroy(struct pipe_screen
*pscreen
,
278 struct pipe_resource
*prsc
)
280 struct vc4_screen
*screen
= vc4_screen(pscreen
);
281 struct vc4_resource
*rsc
= vc4_resource(prsc
);
282 vc4_bo_unreference(&rsc
->bo
);
285 renderonly_scanout_destroy(rsc
->scanout
, screen
->ro
);
291 vc4_resource_get_handle(struct pipe_screen
*pscreen
,
292 struct pipe_context
*pctx
,
293 struct pipe_resource
*prsc
,
294 struct winsys_handle
*whandle
,
297 struct vc4_screen
*screen
= vc4_screen(pscreen
);
298 struct vc4_resource
*rsc
= vc4_resource(prsc
);
300 whandle
->stride
= rsc
->slices
[0].stride
;
303 /* If we're passing some reference to our BO out to some other part of
304 * the system, then we can't do any optimizations about only us being
305 * the ones seeing it (like BO caching or shadow update avoidance).
307 rsc
->bo
->private = false;
310 whandle
->modifier
= DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
;
312 whandle
->modifier
= DRM_FORMAT_MOD_LINEAR
;
314 switch (whandle
->type
) {
315 case WINSYS_HANDLE_TYPE_SHARED
:
317 /* This could probably be supported, assuming that a
318 * control node was used for pl111.
320 fprintf(stderr
, "flink unsupported with pl111\n");
324 return vc4_bo_flink(rsc
->bo
, &whandle
->handle
);
325 case WINSYS_HANDLE_TYPE_KMS
:
326 if (screen
->ro
&& renderonly_get_handle(rsc
->scanout
, whandle
))
328 whandle
->handle
= rsc
->bo
->handle
;
330 case WINSYS_HANDLE_TYPE_FD
:
331 /* FDs are cross-device, so we can export directly from vc4.
333 whandle
->handle
= vc4_bo_get_dmabuf(rsc
->bo
);
334 return whandle
->handle
!= -1;
341 vc4_setup_slices(struct vc4_resource
*rsc
, const char *caller
)
343 struct pipe_resource
*prsc
= &rsc
->base
;
344 uint32_t width
= prsc
->width0
;
345 uint32_t height
= prsc
->height0
;
346 if (prsc
->format
== PIPE_FORMAT_ETC1_RGB8
) {
347 width
= (width
+ 3) >> 2;
348 height
= (height
+ 3) >> 2;
351 uint32_t pot_width
= util_next_power_of_two(width
);
352 uint32_t pot_height
= util_next_power_of_two(height
);
354 uint32_t utile_w
= vc4_utile_width(rsc
->cpp
);
355 uint32_t utile_h
= vc4_utile_height(rsc
->cpp
);
357 for (int i
= prsc
->last_level
; i
>= 0; i
--) {
358 struct vc4_resource_slice
*slice
= &rsc
->slices
[i
];
360 uint32_t level_width
, level_height
;
363 level_height
= height
;
365 level_width
= u_minify(pot_width
, i
);
366 level_height
= u_minify(pot_height
, i
);
370 slice
->tiling
= VC4_TILING_FORMAT_LINEAR
;
371 if (prsc
->nr_samples
> 1) {
372 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
373 level_width
= align(level_width
, 32);
374 level_height
= align(level_height
, 32);
376 level_width
= align(level_width
, utile_w
);
379 if (vc4_size_is_lt(level_width
, level_height
,
381 slice
->tiling
= VC4_TILING_FORMAT_LT
;
382 level_width
= align(level_width
, utile_w
);
383 level_height
= align(level_height
, utile_h
);
385 slice
->tiling
= VC4_TILING_FORMAT_T
;
386 level_width
= align(level_width
,
388 level_height
= align(level_height
,
393 slice
->offset
= offset
;
394 slice
->stride
= (level_width
* rsc
->cpp
*
395 MAX2(prsc
->nr_samples
, 1));
396 slice
->size
= level_height
* slice
->stride
;
398 offset
+= slice
->size
;
400 if (vc4_debug
& VC4_DEBUG_SURFACE
) {
401 static const char tiling_chars
[] = {
402 [VC4_TILING_FORMAT_LINEAR
] = 'R',
403 [VC4_TILING_FORMAT_LT
] = 'L',
404 [VC4_TILING_FORMAT_T
] = 'T'
407 "rsc %s %p (format %s: vc4 %d), %dx%d: "
408 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
410 util_format_short_name(prsc
->format
),
412 prsc
->width0
, prsc
->height0
,
413 i
, tiling_chars
[slice
->tiling
],
414 level_width
, level_height
,
415 slice
->stride
, slice
->offset
);
419 /* The texture base pointer that has to point to level 0 doesn't have
420 * intra-page bits, so we have to align it, and thus shift up all the
423 uint32_t page_align_offset
= (align(rsc
->slices
[0].offset
, 4096) -
424 rsc
->slices
[0].offset
);
425 if (page_align_offset
) {
426 for (int i
= 0; i
<= prsc
->last_level
; i
++)
427 rsc
->slices
[i
].offset
+= page_align_offset
;
430 /* Cube map faces appear as whole miptrees at a page-aligned offset
431 * from the first face's miptree.
433 if (prsc
->target
== PIPE_TEXTURE_CUBE
) {
434 rsc
->cube_map_stride
= align(rsc
->slices
[0].offset
+
435 rsc
->slices
[0].size
, 4096);
439 static struct vc4_resource
*
440 vc4_resource_setup(struct pipe_screen
*pscreen
,
441 const struct pipe_resource
*tmpl
)
443 struct vc4_resource
*rsc
= CALLOC_STRUCT(vc4_resource
);
446 struct pipe_resource
*prsc
= &rsc
->base
;
450 pipe_reference_init(&prsc
->reference
, 1);
451 prsc
->screen
= pscreen
;
453 if (prsc
->nr_samples
<= 1)
454 rsc
->cpp
= util_format_get_blocksize(tmpl
->format
);
456 rsc
->cpp
= sizeof(uint32_t);
463 static enum vc4_texture_data_type
464 get_resource_texture_format(struct pipe_resource
*prsc
)
466 struct vc4_resource
*rsc
= vc4_resource(prsc
);
467 uint8_t format
= vc4_get_tex_format(prsc
->format
);
470 if (prsc
->nr_samples
> 1) {
473 if (format
== VC4_TEXTURE_TYPE_RGBA8888
)
474 return VC4_TEXTURE_TYPE_RGBA32R
;
484 find_modifier(uint64_t needle
, const uint64_t *haystack
, int count
)
488 for (i
= 0; i
< count
; i
++) {
489 if (haystack
[i
] == needle
)
496 static struct pipe_resource
*
497 vc4_resource_create_with_modifiers(struct pipe_screen
*pscreen
,
498 const struct pipe_resource
*tmpl
,
499 const uint64_t *modifiers
,
502 struct vc4_screen
*screen
= vc4_screen(pscreen
);
503 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
504 struct pipe_resource
*prsc
= &rsc
->base
;
505 bool linear_ok
= find_modifier(DRM_FORMAT_MOD_LINEAR
, modifiers
, count
);
506 /* Use a tiled layout if we can, for better 3D performance. */
507 bool should_tile
= true;
509 /* VBOs/PBOs are untiled (and 1 height). */
510 if (tmpl
->target
== PIPE_BUFFER
)
513 /* MSAA buffers are linear. */
514 if (tmpl
->nr_samples
> 1)
517 /* No tiling when we're sharing with another device (pl111). */
518 if (screen
->ro
&& (tmpl
->bind
& PIPE_BIND_SCANOUT
))
521 /* Cursors are always linear, and the user can request linear as well.
523 if (tmpl
->bind
& (PIPE_BIND_LINEAR
| PIPE_BIND_CURSOR
))
526 /* No shared objects with LT format -- the kernel only has T-format
527 * metadata. LT objects are small enough it's not worth the trouble to
528 * give them metadata to tile.
530 if ((tmpl
->bind
& (PIPE_BIND_SHARED
| PIPE_BIND_SCANOUT
)) &&
531 vc4_size_is_lt(prsc
->width0
, prsc
->height0
, rsc
->cpp
))
534 /* If we're sharing or scanning out, we need the ioctl present to
535 * inform the kernel or the other side.
537 if ((tmpl
->bind
& (PIPE_BIND_SHARED
|
538 PIPE_BIND_SCANOUT
)) && !screen
->has_tiling_ioctl
)
541 /* No user-specified modifier; determine our own. */
542 if (count
== 1 && modifiers
[0] == DRM_FORMAT_MOD_INVALID
) {
544 rsc
->tiled
= should_tile
;
545 } else if (should_tile
&&
546 find_modifier(DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
,
549 } else if (linear_ok
) {
552 fprintf(stderr
, "Unsupported modifier requested\n");
556 if (tmpl
->target
!= PIPE_BUFFER
)
557 rsc
->vc4_format
= get_resource_texture_format(prsc
);
559 vc4_setup_slices(rsc
, "create");
560 if (!vc4_resource_bo_alloc(rsc
))
563 if (screen
->has_tiling_ioctl
) {
566 modifier
= DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
;
568 modifier
= DRM_FORMAT_MOD_LINEAR
;
569 struct drm_vc4_set_tiling set_tiling
= {
570 .handle
= rsc
->bo
->handle
,
571 .modifier
= modifier
,
573 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_SET_TILING
,
579 if (screen
->ro
&& tmpl
->bind
& PIPE_BIND_SCANOUT
) {
581 renderonly_scanout_for_resource(prsc
, screen
->ro
, NULL
);
586 vc4_bo_label(screen
, rsc
->bo
, "%sresource %dx%d@%d/%d",
587 (tmpl
->bind
& PIPE_BIND_SCANOUT
) ? "scanout " : "",
588 tmpl
->width0
, tmpl
->height0
,
589 rsc
->cpp
* 8, prsc
->last_level
);
593 vc4_resource_destroy(pscreen
, prsc
);
597 struct pipe_resource
*
598 vc4_resource_create(struct pipe_screen
*pscreen
,
599 const struct pipe_resource
*tmpl
)
601 const uint64_t mod
= DRM_FORMAT_MOD_INVALID
;
602 return vc4_resource_create_with_modifiers(pscreen
, tmpl
, &mod
, 1);
605 static struct pipe_resource
*
606 vc4_resource_from_handle(struct pipe_screen
*pscreen
,
607 const struct pipe_resource
*tmpl
,
608 struct winsys_handle
*whandle
,
611 struct vc4_screen
*screen
= vc4_screen(pscreen
);
612 struct vc4_resource
*rsc
= vc4_resource_setup(pscreen
, tmpl
);
613 struct pipe_resource
*prsc
= &rsc
->base
;
614 struct vc4_resource_slice
*slice
= &rsc
->slices
[0];
619 switch (whandle
->type
) {
620 case WINSYS_HANDLE_TYPE_SHARED
:
621 rsc
->bo
= vc4_bo_open_name(screen
,
622 whandle
->handle
, whandle
->stride
);
624 case WINSYS_HANDLE_TYPE_FD
:
625 rsc
->bo
= vc4_bo_open_dmabuf(screen
,
626 whandle
->handle
, whandle
->stride
);
630 "Attempt to import unsupported handle type %d\n",
637 struct drm_vc4_get_tiling get_tiling
= {
638 .handle
= rsc
->bo
->handle
,
640 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_GET_TILING
, &get_tiling
);
643 whandle
->modifier
= DRM_FORMAT_MOD_LINEAR
;
644 } else if (whandle
->modifier
== DRM_FORMAT_MOD_INVALID
) {
645 whandle
->modifier
= get_tiling
.modifier
;
646 } else if (whandle
->modifier
!= get_tiling
.modifier
) {
648 "Modifier 0x%llx vs. tiling (0x%llx) mismatch\n",
649 (long long)whandle
->modifier
, get_tiling
.modifier
);
653 switch (whandle
->modifier
) {
654 case DRM_FORMAT_MOD_LINEAR
:
657 case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED
:
662 "Attempt to import unsupported modifier 0x%llx\n",
663 (long long)whandle
->modifier
);
667 rsc
->vc4_format
= get_resource_texture_format(prsc
);
668 vc4_setup_slices(rsc
, "import");
670 if (whandle
->offset
!= 0) {
673 "Attempt to import unsupported "
674 "winsys offset %u\n",
679 rsc
->slices
[0].offset
+= whandle
->offset
;
681 if (rsc
->slices
[0].offset
+ rsc
->slices
[0].size
>
683 fprintf(stderr
, "Attempt to import "
684 "with overflowing offset (%d + %d > %d)\n",
693 /* Make sure that renderonly has a handle to our buffer in the
694 * display's fd, so that a later renderonly_get_handle()
695 * returns correct handles or GEM names.
698 renderonly_create_gpu_import_for_resource(prsc
,
705 if (rsc
->tiled
&& whandle
->stride
!= slice
->stride
) {
706 static bool warned
= false;
710 "Attempting to import %dx%d %s with "
711 "unsupported stride %d instead of %d\n",
712 prsc
->width0
, prsc
->height0
,
713 util_format_short_name(prsc
->format
),
718 } else if (!rsc
->tiled
) {
719 slice
->stride
= whandle
->stride
;
725 vc4_resource_destroy(pscreen
, prsc
);
729 static struct pipe_surface
*
730 vc4_create_surface(struct pipe_context
*pctx
,
731 struct pipe_resource
*ptex
,
732 const struct pipe_surface
*surf_tmpl
)
734 struct vc4_surface
*surface
= CALLOC_STRUCT(vc4_surface
);
735 struct vc4_resource
*rsc
= vc4_resource(ptex
);
740 assert(surf_tmpl
->u
.tex
.first_layer
== surf_tmpl
->u
.tex
.last_layer
);
742 struct pipe_surface
*psurf
= &surface
->base
;
743 unsigned level
= surf_tmpl
->u
.tex
.level
;
745 pipe_reference_init(&psurf
->reference
, 1);
746 pipe_resource_reference(&psurf
->texture
, ptex
);
748 psurf
->context
= pctx
;
749 psurf
->format
= surf_tmpl
->format
;
750 psurf
->width
= u_minify(ptex
->width0
, level
);
751 psurf
->height
= u_minify(ptex
->height0
, level
);
752 psurf
->u
.tex
.level
= level
;
753 psurf
->u
.tex
.first_layer
= surf_tmpl
->u
.tex
.first_layer
;
754 psurf
->u
.tex
.last_layer
= surf_tmpl
->u
.tex
.last_layer
;
755 surface
->offset
= (rsc
->slices
[level
].offset
+
756 psurf
->u
.tex
.first_layer
* rsc
->cube_map_stride
);
757 surface
->tiling
= rsc
->slices
[level
].tiling
;
759 return &surface
->base
;
763 vc4_surface_destroy(struct pipe_context
*pctx
, struct pipe_surface
*psurf
)
765 pipe_resource_reference(&psurf
->texture
, NULL
);
770 vc4_dump_surface_non_msaa(struct pipe_surface
*psurf
)
772 struct pipe_resource
*prsc
= psurf
->texture
;
773 struct vc4_resource
*rsc
= vc4_resource(prsc
);
774 uint32_t *map
= vc4_bo_map(rsc
->bo
);
775 uint32_t stride
= rsc
->slices
[0].stride
/ 4;
776 uint32_t width
= psurf
->width
;
777 uint32_t height
= psurf
->height
;
778 uint32_t chunk_w
= width
/ 79;
779 uint32_t chunk_h
= height
/ 40;
780 uint32_t found_colors
[10];
781 uint32_t num_found_colors
= 0;
783 if (rsc
->vc4_format
!= VC4_TEXTURE_TYPE_RGBA32R
) {
784 fprintf(stderr
, "%s: Unsupported format %s\n",
785 __func__
, util_format_short_name(psurf
->format
));
789 for (int by
= 0; by
< height
; by
+= chunk_h
) {
790 for (int bx
= 0; bx
< width
; bx
+= chunk_w
) {
791 int all_found_color
= -1; /* nothing found */
793 for (int y
= by
; y
< MIN2(height
, by
+ chunk_h
); y
++) {
794 for (int x
= bx
; x
< MIN2(width
, bx
+ chunk_w
); x
++) {
795 uint32_t pix
= map
[y
* stride
+ x
];
798 for (i
= 0; i
< num_found_colors
; i
++) {
799 if (pix
== found_colors
[i
])
802 if (i
== num_found_colors
&&
804 ARRAY_SIZE(found_colors
)) {
805 found_colors
[num_found_colors
++] = pix
;
808 if (i
< num_found_colors
) {
809 if (all_found_color
== -1)
811 else if (i
!= all_found_color
)
812 all_found_color
= ARRAY_SIZE(found_colors
);
816 /* If all pixels for this chunk have a consistent
817 * value, then print a character for it. Either a
818 * fixed name (particularly common for piglit tests),
819 * or a runtime-generated number.
821 if (all_found_color
>= 0 &&
822 all_found_color
< ARRAY_SIZE(found_colors
)) {
823 static const struct {
835 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
836 if (named_colors
[i
].val
==
837 found_colors
[all_found_color
]) {
838 fprintf(stderr
, "%s",
843 /* For unnamed colors, print a number and the
844 * numbers will have values printed at the
847 if (i
== ARRAY_SIZE(named_colors
)) {
848 fprintf(stderr
, "%c",
849 '0' + all_found_color
);
852 /* If there's no consistent color, print this.
854 fprintf(stderr
, ".");
857 fprintf(stderr
, "\n");
860 for (int i
= 0; i
< num_found_colors
; i
++) {
861 fprintf(stderr
, "color %d: 0x%08x\n", i
, found_colors
[i
]);
866 vc4_surface_msaa_get_sample(struct pipe_surface
*psurf
,
867 uint32_t x
, uint32_t y
, uint32_t sample
)
869 struct pipe_resource
*prsc
= psurf
->texture
;
870 struct vc4_resource
*rsc
= vc4_resource(prsc
);
871 uint32_t tile_w
= 32, tile_h
= 32;
872 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, 32);
874 uint32_t tile_x
= x
/ tile_w
;
875 uint32_t tile_y
= y
/ tile_h
;
876 uint32_t *tile
= (vc4_bo_map(rsc
->bo
) +
877 VC4_TILE_BUFFER_SIZE
* (tile_y
* tiles_w
+ tile_x
));
878 uint32_t subtile_x
= x
% tile_w
;
879 uint32_t subtile_y
= y
% tile_h
;
881 uint32_t quad_samples
= VC4_MAX_SAMPLES
* 4;
882 uint32_t tile_stride
= quad_samples
* tile_w
/ 2;
884 return *((uint32_t *)tile
+
885 (subtile_y
>> 1) * tile_stride
+
886 (subtile_x
>> 1) * quad_samples
+
887 ((subtile_y
& 1) << 1) +
893 vc4_dump_surface_msaa_char(struct pipe_surface
*psurf
,
894 uint32_t start_x
, uint32_t start_y
,
895 uint32_t w
, uint32_t h
)
897 bool all_same_color
= true;
898 uint32_t all_pix
= 0;
900 for (int y
= start_y
; y
< start_y
+ h
; y
++) {
901 for (int x
= start_x
; x
< start_x
+ w
; x
++) {
902 for (int s
= 0; s
< VC4_MAX_SAMPLES
; s
++) {
903 uint32_t pix
= vc4_surface_msaa_get_sample(psurf
,
906 if (x
== start_x
&& y
== start_y
)
908 else if (all_pix
!= pix
)
909 all_same_color
= false;
913 if (all_same_color
) {
914 static const struct {
926 for (i
= 0; i
< ARRAY_SIZE(named_colors
); i
++) {
927 if (named_colors
[i
].val
== all_pix
) {
928 fprintf(stderr
, "%s",
933 fprintf(stderr
, "x");
935 fprintf(stderr
, ".");
940 vc4_dump_surface_msaa(struct pipe_surface
*psurf
)
942 uint32_t tile_w
= 32, tile_h
= 32;
943 uint32_t tiles_w
= DIV_ROUND_UP(psurf
->width
, tile_w
);
944 uint32_t tiles_h
= DIV_ROUND_UP(psurf
->height
, tile_h
);
945 uint32_t char_w
= 140, char_h
= 60;
946 uint32_t char_w_per_tile
= char_w
/ tiles_w
- 1;
947 uint32_t char_h_per_tile
= char_h
/ tiles_h
- 1;
949 fprintf(stderr
, "Surface: %dx%d (%dx MSAA)\n",
950 psurf
->width
, psurf
->height
, psurf
->texture
->nr_samples
);
952 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
953 fprintf(stderr
, "-");
954 fprintf(stderr
, "\n");
956 for (int ty
= 0; ty
< psurf
->height
; ty
+= tile_h
) {
957 for (int y
= 0; y
< char_h_per_tile
; y
++) {
959 for (int tx
= 0; tx
< psurf
->width
; tx
+= tile_w
) {
960 for (int x
= 0; x
< char_w_per_tile
; x
++) {
961 uint32_t bx1
= (x
* tile_w
/
963 uint32_t bx2
= ((x
+ 1) * tile_w
/
965 uint32_t by1
= (y
* tile_h
/
967 uint32_t by2
= ((y
+ 1) * tile_h
/
970 vc4_dump_surface_msaa_char(psurf
,
976 fprintf(stderr
, "|");
978 fprintf(stderr
, "\n");
981 for (int x
= 0; x
< (char_w_per_tile
+ 1) * tiles_w
; x
++)
982 fprintf(stderr
, "-");
983 fprintf(stderr
, "\n");
987 /** Debug routine to dump the contents of an 8888 surface to the console */
989 vc4_dump_surface(struct pipe_surface
*psurf
)
994 if (psurf
->texture
->nr_samples
> 1)
995 vc4_dump_surface_msaa(psurf
);
997 vc4_dump_surface_non_msaa(psurf
);
1001 vc4_flush_resource(struct pipe_context
*pctx
, struct pipe_resource
*resource
)
1003 /* All calls to flush_resource are followed by a flush of the context,
1004 * so there's nothing to do.
1009 vc4_update_shadow_baselevel_texture(struct pipe_context
*pctx
,
1010 struct pipe_sampler_view
*pview
)
1012 struct vc4_sampler_view
*view
= vc4_sampler_view(pview
);
1013 struct vc4_resource
*shadow
= vc4_resource(view
->texture
);
1014 struct vc4_resource
*orig
= vc4_resource(pview
->texture
);
1016 assert(view
->texture
!= pview
->texture
);
1018 if (shadow
->writes
== orig
->writes
&& orig
->bo
->private)
1021 perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
1022 orig
->base
.width0
, orig
->base
.height0
,
1023 pview
->u
.tex
.first_level
,
1024 pview
->u
.tex
.first_level
? "base level" : "raster layout");
1026 for (int i
= 0; i
<= shadow
->base
.last_level
; i
++) {
1027 unsigned width
= u_minify(shadow
->base
.width0
, i
);
1028 unsigned height
= u_minify(shadow
->base
.height0
, i
);
1029 struct pipe_blit_info info
= {
1031 .resource
= &shadow
->base
,
1041 .format
= shadow
->base
.format
,
1044 .resource
= &orig
->base
,
1045 .level
= pview
->u
.tex
.first_level
+ i
,
1054 .format
= orig
->base
.format
,
1058 pctx
->blit(pctx
, &info
);
1061 shadow
->writes
= orig
->writes
;
1065 * Converts a 4-byte index buffer to 2 bytes.
1067 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
1068 * include 4-byte index support, and we have to shrink it down.
1070 * There's no fallback support for when indices end up being larger than 2^16,
1071 * though it will at least assertion fail. Also, if the original index data
1072 * was in user memory, it would be nice to not have uploaded it to a VBO
1073 * before translating.
1075 struct pipe_resource
*
1076 vc4_get_shadow_index_buffer(struct pipe_context
*pctx
,
1077 const struct pipe_draw_info
*info
,
1080 uint32_t *shadow_offset
)
1082 struct vc4_context
*vc4
= vc4_context(pctx
);
1083 struct vc4_resource
*orig
= vc4_resource(info
->index
.resource
);
1084 perf_debug("Fallback conversion for %d uint indices\n", count
);
1087 struct pipe_resource
*shadow_rsc
= NULL
;
1088 u_upload_alloc(vc4
->uploader
, 0, count
* 2, 4,
1089 shadow_offset
, &shadow_rsc
, &data
);
1090 uint16_t *dst
= data
;
1092 struct pipe_transfer
*src_transfer
= NULL
;
1093 const uint32_t *src
;
1094 if (info
->has_user_indices
) {
1095 src
= info
->index
.user
;
1097 src
= pipe_buffer_map_range(pctx
, &orig
->base
,
1100 PIPE_TRANSFER_READ
, &src_transfer
);
1103 for (int i
= 0; i
< count
; i
++) {
1104 uint32_t src_index
= src
[i
];
1105 assert(src_index
<= 0xffff);
1110 pctx
->transfer_unmap(pctx
, src_transfer
);
1115 static const struct u_transfer_vtbl transfer_vtbl
= {
1116 .resource_create
= vc4_resource_create
,
1117 .resource_destroy
= vc4_resource_destroy
,
1118 .transfer_map
= vc4_resource_transfer_map
,
1119 .transfer_unmap
= vc4_resource_transfer_unmap
,
1120 .transfer_flush_region
= u_default_transfer_flush_region
,
1124 vc4_resource_screen_init(struct pipe_screen
*pscreen
)
1126 struct vc4_screen
*screen
= vc4_screen(pscreen
);
1128 pscreen
->resource_create
= vc4_resource_create
;
1129 pscreen
->resource_create_with_modifiers
=
1130 vc4_resource_create_with_modifiers
;
1131 pscreen
->resource_from_handle
= vc4_resource_from_handle
;
1132 pscreen
->resource_destroy
= u_resource_destroy_vtbl
;
1133 pscreen
->resource_get_handle
= vc4_resource_get_handle
;
1134 pscreen
->resource_destroy
= vc4_resource_destroy
;
1135 pscreen
->transfer_helper
= u_transfer_helper_create(&transfer_vtbl
,
1136 false, false, true);
1138 /* Test if the kernel has GET_TILING; it will return -EINVAL if the
1139 * ioctl does not exist, but -ENOENT if we pass an impossible handle.
1140 * 0 cannot be a valid GEM object, so use that.
1142 struct drm_vc4_get_tiling get_tiling
= {
1145 int ret
= vc4_ioctl(screen
->fd
, DRM_IOCTL_VC4_GET_TILING
, &get_tiling
);
1146 if (ret
== -1 && errno
== ENOENT
)
1147 screen
->has_tiling_ioctl
= true;
1151 vc4_resource_context_init(struct pipe_context
*pctx
)
1153 pctx
->transfer_map
= u_transfer_helper_transfer_map
;
1154 pctx
->transfer_flush_region
= u_transfer_helper_transfer_flush_region
;
1155 pctx
->transfer_unmap
= u_transfer_helper_transfer_unmap
;
1156 pctx
->buffer_subdata
= u_default_buffer_subdata
;
1157 pctx
->texture_subdata
= u_default_texture_subdata
;
1158 pctx
->create_surface
= vc4_create_surface
;
1159 pctx
->surface_destroy
= vc4_surface_destroy
;
1160 pctx
->resource_copy_region
= util_resource_copy_region
;
1161 pctx
->blit
= vc4_blit
;
1162 pctx
->flush_resource
= vc4_flush_resource
;