vc4: Return GL_OUT_OF_MEMORY when buffer allocation fails.
[mesa.git] / src / gallium / drivers / vc4 / vc4_resource.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_memory.h"
26 #include "util/u_format.h"
27 #include "util/u_inlines.h"
28 #include "util/u_surface.h"
29 #include "util/u_upload_mgr.h"
30
31 #include "vc4_screen.h"
32 #include "vc4_context.h"
33 #include "vc4_resource.h"
34 #include "vc4_tiling.h"
35
36 static bool miptree_debug = false;
37
38 static bool
39 vc4_resource_bo_alloc(struct vc4_resource *rsc)
40 {
41 struct pipe_resource *prsc = &rsc->base.b;
42 struct pipe_screen *pscreen = prsc->screen;
43 struct vc4_bo *bo;
44
45 if (miptree_debug) {
46 fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
47 rsc,
48 rsc->slices[0].size,
49 rsc->slices[0].offset,
50 rsc->slices[0].offset +
51 rsc->slices[0].size +
52 rsc->cube_map_stride * (prsc->array_size - 1));
53 }
54
55 bo = vc4_bo_alloc(vc4_screen(pscreen),
56 rsc->slices[0].offset +
57 rsc->slices[0].size +
58 rsc->cube_map_stride * (prsc->array_size - 1),
59 "resource");
60 if (bo) {
61 vc4_bo_unreference(&rsc->bo);
62 rsc->bo = bo;
63 return true;
64 } else {
65 return false;
66 }
67 }
68
69 static void
70 vc4_resource_transfer_unmap(struct pipe_context *pctx,
71 struct pipe_transfer *ptrans)
72 {
73 struct vc4_context *vc4 = vc4_context(pctx);
74 struct vc4_transfer *trans = vc4_transfer(ptrans);
75 struct pipe_resource *prsc = ptrans->resource;
76 struct vc4_resource *rsc = vc4_resource(prsc);
77 struct vc4_resource_slice *slice = &rsc->slices[ptrans->level];
78
79 if (trans->map) {
80 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
81 vc4_store_tiled_image(rsc->bo->map + slice->offset +
82 ptrans->box.z * rsc->cube_map_stride,
83 slice->stride,
84 trans->map, ptrans->stride,
85 slice->tiling, rsc->cpp,
86 &ptrans->box);
87 }
88 free(trans->map);
89 }
90
91 pipe_resource_reference(&ptrans->resource, NULL);
92 util_slab_free(&vc4->transfer_pool, ptrans);
93 }
94
95 static void *
96 vc4_resource_transfer_map(struct pipe_context *pctx,
97 struct pipe_resource *prsc,
98 unsigned level, unsigned usage,
99 const struct pipe_box *box,
100 struct pipe_transfer **pptrans)
101 {
102 struct vc4_context *vc4 = vc4_context(pctx);
103 struct vc4_resource *rsc = vc4_resource(prsc);
104 struct vc4_resource_slice *slice = &rsc->slices[level];
105 struct vc4_transfer *trans;
106 struct pipe_transfer *ptrans;
107 enum pipe_format format = prsc->format;
108 char *buf;
109
110 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
111 if (vc4_resource_bo_alloc(rsc)) {
112
113 /* If it might be bound as one of our vertex buffers,
114 * make sure we re-emit vertex buffer state.
115 */
116 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
117 vc4->dirty |= VC4_DIRTY_VTXBUF;
118 } else {
119 /* If we failed to reallocate, flush everything so
120 * that we don't violate any syncing requirements.
121 */
122 vc4_flush(pctx);
123 }
124 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
125 if (vc4_cl_references_bo(pctx, rsc->bo)) {
126 if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
127 prsc->last_level == 0 &&
128 prsc->width0 == box->width &&
129 prsc->height0 == box->height &&
130 prsc->depth0 == box->depth &&
131 vc4_resource_bo_alloc(rsc)) {
132 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
133 vc4->dirty |= VC4_DIRTY_VTXBUF;
134 } else {
135 vc4_flush(pctx);
136 }
137 }
138 }
139
140 if (usage & PIPE_TRANSFER_WRITE)
141 rsc->writes++;
142
143 trans = util_slab_alloc(&vc4->transfer_pool);
144 if (!trans)
145 return NULL;
146
147 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
148
149 /* util_slab_alloc() doesn't zero: */
150 memset(trans, 0, sizeof(*trans));
151 ptrans = &trans->base;
152
153 pipe_resource_reference(&ptrans->resource, prsc);
154 ptrans->level = level;
155 ptrans->usage = usage;
156 ptrans->box = *box;
157
158 /* Note that the current kernel implementation is synchronous, so no
159 * need to do syncing stuff here yet.
160 */
161
162 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
163 buf = vc4_bo_map_unsynchronized(rsc->bo);
164 else
165 buf = vc4_bo_map(rsc->bo);
166 if (!buf) {
167 fprintf(stderr, "Failed to map bo\n");
168 goto fail;
169 }
170
171 *pptrans = ptrans;
172
173 if (rsc->tiled) {
174 uint32_t utile_w = vc4_utile_width(rsc->cpp);
175 uint32_t utile_h = vc4_utile_height(rsc->cpp);
176
177 /* No direct mappings of tiled, since we need to manually
178 * tile/untile.
179 */
180 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
181 return NULL;
182
183 /* We need to align the box to utile boundaries, since that's
184 * what load/store operate on.
185 */
186 uint32_t orig_width = ptrans->box.width;
187 uint32_t orig_height = ptrans->box.height;
188 uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
189 uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
190 ptrans->box.width += box_start_x;
191 ptrans->box.x -= box_start_x;
192 ptrans->box.height += box_start_y;
193 ptrans->box.y -= box_start_y;
194 ptrans->box.width = align(ptrans->box.width, utile_w);
195 ptrans->box.height = align(ptrans->box.height, utile_h);
196
197 ptrans->stride = ptrans->box.width * rsc->cpp;
198 ptrans->layer_stride = ptrans->stride;
199
200 trans->map = malloc(ptrans->stride * ptrans->box.height);
201 if (usage & PIPE_TRANSFER_READ ||
202 ptrans->box.width != orig_width ||
203 ptrans->box.height != orig_height) {
204 vc4_load_tiled_image(trans->map, ptrans->stride,
205 buf + slice->offset +
206 box->z * rsc->cube_map_stride,
207 slice->stride,
208 slice->tiling, rsc->cpp,
209 &ptrans->box);
210 }
211 return (trans->map +
212 box_start_x * rsc->cpp +
213 box_start_y * ptrans->stride);
214 } else {
215 ptrans->stride = slice->stride;
216 ptrans->layer_stride = ptrans->stride;
217
218 return buf + slice->offset +
219 box->y / util_format_get_blockheight(format) * ptrans->stride +
220 box->x / util_format_get_blockwidth(format) * rsc->cpp +
221 box->z * rsc->cube_map_stride;
222 }
223
224
225 fail:
226 vc4_resource_transfer_unmap(pctx, ptrans);
227 return NULL;
228 }
229
230 static void
231 vc4_resource_destroy(struct pipe_screen *pscreen,
232 struct pipe_resource *prsc)
233 {
234 struct vc4_resource *rsc = vc4_resource(prsc);
235 pipe_resource_reference(&rsc->shadow_parent, NULL);
236 vc4_bo_unreference(&rsc->bo);
237 free(rsc);
238 }
239
240 static boolean
241 vc4_resource_get_handle(struct pipe_screen *pscreen,
242 struct pipe_resource *prsc,
243 struct winsys_handle *handle)
244 {
245 struct vc4_resource *rsc = vc4_resource(prsc);
246
247 return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
248 handle);
249 }
250
251 static const struct u_resource_vtbl vc4_resource_vtbl = {
252 .resource_get_handle = vc4_resource_get_handle,
253 .resource_destroy = vc4_resource_destroy,
254 .transfer_map = vc4_resource_transfer_map,
255 .transfer_flush_region = u_default_transfer_flush_region,
256 .transfer_unmap = vc4_resource_transfer_unmap,
257 .transfer_inline_write = u_default_transfer_inline_write,
258 };
259
260 static void
261 vc4_setup_slices(struct vc4_resource *rsc)
262 {
263 struct pipe_resource *prsc = &rsc->base.b;
264 uint32_t width = prsc->width0;
265 uint32_t height = prsc->height0;
266 uint32_t pot_width = util_next_power_of_two(width);
267 uint32_t pot_height = util_next_power_of_two(height);
268 uint32_t offset = 0;
269 uint32_t utile_w = vc4_utile_width(rsc->cpp);
270 uint32_t utile_h = vc4_utile_height(rsc->cpp);
271
272 for (int i = prsc->last_level; i >= 0; i--) {
273 struct vc4_resource_slice *slice = &rsc->slices[i];
274
275 uint32_t level_width, level_height;
276 if (i == 0) {
277 level_width = width;
278 level_height = height;
279 } else {
280 level_width = u_minify(pot_width, i);
281 level_height = u_minify(pot_height, i);
282 }
283
284 if (!rsc->tiled) {
285 slice->tiling = VC4_TILING_FORMAT_LINEAR;
286 level_width = align(level_width, utile_w);
287 } else {
288 if (vc4_size_is_lt(level_width, level_height,
289 rsc->cpp)) {
290 slice->tiling = VC4_TILING_FORMAT_LT;
291 level_width = align(level_width, utile_w);
292 level_height = align(level_height, utile_h);
293 } else {
294 slice->tiling = VC4_TILING_FORMAT_T;
295 level_width = align(level_width,
296 4 * 2 * utile_w);
297 level_height = align(level_height,
298 4 * 2 * utile_h);
299 }
300 }
301
302 slice->offset = offset;
303 slice->stride = level_width * rsc->cpp;
304 slice->size = level_height * slice->stride;
305
306 offset += slice->size;
307
308 if (miptree_debug) {
309 static const char tiling_chars[] = {
310 [VC4_TILING_FORMAT_LINEAR] = 'R',
311 [VC4_TILING_FORMAT_LT] = 'L',
312 [VC4_TILING_FORMAT_T] = 'T'
313 };
314 fprintf(stderr,
315 "rsc setup %p (format %d), %dx%d: "
316 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
317 rsc, rsc->vc4_format,
318 prsc->width0, prsc->height0,
319 i, tiling_chars[slice->tiling],
320 level_width, level_height,
321 slice->stride, slice->offset);
322 }
323 }
324
325 /* The texture base pointer that has to point to level 0 doesn't have
326 * intra-page bits, so we have to align it, and thus shift up all the
327 * smaller slices.
328 */
329 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
330 rsc->slices[0].offset);
331 if (page_align_offset) {
332 for (int i = 0; i <= prsc->last_level; i++)
333 rsc->slices[i].offset += page_align_offset;
334 }
335
336 /* Cube map faces appear as whole miptrees at a page-aligned offset
337 * from the first face's miptree.
338 */
339 if (prsc->target == PIPE_TEXTURE_CUBE) {
340 rsc->cube_map_stride = align(rsc->slices[0].offset +
341 rsc->slices[0].size, 4096);
342 }
343 }
344
345 static struct vc4_resource *
346 vc4_resource_setup(struct pipe_screen *pscreen,
347 const struct pipe_resource *tmpl)
348 {
349 struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
350 if (!rsc)
351 return NULL;
352 struct pipe_resource *prsc = &rsc->base.b;
353
354 *prsc = *tmpl;
355
356 pipe_reference_init(&prsc->reference, 1);
357 prsc->screen = pscreen;
358
359 rsc->base.vtbl = &vc4_resource_vtbl;
360 rsc->cpp = util_format_get_blocksize(tmpl->format);
361
362 assert(rsc->cpp);
363
364 return rsc;
365 }
366
367 static enum vc4_texture_data_type
368 get_resource_texture_format(struct pipe_resource *prsc)
369 {
370 struct vc4_resource *rsc = vc4_resource(prsc);
371 uint8_t format = vc4_get_tex_format(prsc->format);
372
373 if (!rsc->tiled) {
374 assert(format == VC4_TEXTURE_TYPE_RGBA8888);
375 return VC4_TEXTURE_TYPE_RGBA32R;
376 }
377
378 return format;
379 }
380
381 struct pipe_resource *
382 vc4_resource_create(struct pipe_screen *pscreen,
383 const struct pipe_resource *tmpl)
384 {
385 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
386 struct pipe_resource *prsc = &rsc->base.b;
387
388 /* We have to make shared be untiled, since we don't have any way to
389 * communicate metadata about tiling currently.
390 */
391 if (tmpl->target == PIPE_BUFFER ||
392 (tmpl->bind & (PIPE_BIND_SCANOUT |
393 PIPE_BIND_LINEAR |
394 PIPE_BIND_SHARED |
395 PIPE_BIND_CURSOR))) {
396 rsc->tiled = false;
397 } else {
398 rsc->tiled = true;
399 }
400
401 if (tmpl->target != PIPE_BUFFER)
402 rsc->vc4_format = get_resource_texture_format(prsc);
403
404 vc4_setup_slices(rsc);
405 if (!vc4_resource_bo_alloc(rsc))
406 goto fail;
407
408 return prsc;
409 fail:
410 vc4_resource_destroy(pscreen, prsc);
411 return NULL;
412 }
413
414 static struct pipe_resource *
415 vc4_resource_from_handle(struct pipe_screen *pscreen,
416 const struct pipe_resource *tmpl,
417 struct winsys_handle *handle)
418 {
419 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
420 struct pipe_resource *prsc = &rsc->base.b;
421 struct vc4_resource_slice *slice = &rsc->slices[0];
422
423 if (!rsc)
424 return NULL;
425
426 rsc->tiled = false;
427 rsc->bo = vc4_screen_bo_from_handle(pscreen, handle);
428 if (!rsc->bo)
429 goto fail;
430
431 if (!using_vc4_simulator)
432 slice->stride = handle->stride;
433 else
434 slice->stride = align(prsc->width0 * rsc->cpp, 16);
435
436 slice->tiling = VC4_TILING_FORMAT_LINEAR;
437
438 rsc->vc4_format = get_resource_texture_format(prsc);
439
440 if (miptree_debug) {
441 fprintf(stderr,
442 "rsc import %p (format %d), %dx%d: "
443 "level 0 (R) -> stride %d@0x%08x\n",
444 rsc, rsc->vc4_format,
445 prsc->width0, prsc->height0,
446 slice->stride, slice->offset);
447 }
448
449 return prsc;
450
451 fail:
452 vc4_resource_destroy(pscreen, prsc);
453 return NULL;
454 }
455
456 static struct pipe_surface *
457 vc4_create_surface(struct pipe_context *pctx,
458 struct pipe_resource *ptex,
459 const struct pipe_surface *surf_tmpl)
460 {
461 struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
462 struct vc4_resource *rsc = vc4_resource(ptex);
463
464 if (!surface)
465 return NULL;
466
467 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
468
469 struct pipe_surface *psurf = &surface->base;
470 unsigned level = surf_tmpl->u.tex.level;
471
472 pipe_reference_init(&psurf->reference, 1);
473 pipe_resource_reference(&psurf->texture, ptex);
474
475 psurf->context = pctx;
476 psurf->format = surf_tmpl->format;
477 psurf->width = u_minify(ptex->width0, level);
478 psurf->height = u_minify(ptex->height0, level);
479 psurf->u.tex.level = level;
480 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
481 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
482 surface->offset = rsc->slices[level].offset;
483 surface->tiling = rsc->slices[level].tiling;
484
485 return &surface->base;
486 }
487
488 static void
489 vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
490 {
491 pipe_resource_reference(&psurf->texture, NULL);
492 FREE(psurf);
493 }
494
495 /** Debug routine to dump the contents of an 8888 surface to the console */
496 void
497 vc4_dump_surface(struct pipe_surface *psurf)
498 {
499 if (!psurf)
500 return;
501
502 struct pipe_resource *prsc = psurf->texture;
503 struct vc4_resource *rsc = vc4_resource(prsc);
504 uint32_t *map = vc4_bo_map(rsc->bo);
505 uint32_t stride = rsc->slices[0].stride / 4;
506 uint32_t width = psurf->width;
507 uint32_t height = psurf->height;
508 uint32_t chunk_w = width / 79;
509 uint32_t chunk_h = height / 40;
510 uint32_t found_colors[10];
511 uint32_t num_found_colors = 0;
512
513 if (rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R) {
514 fprintf(stderr, "%s: Unsupported format %s\n",
515 __func__, util_format_short_name(psurf->format));
516 return;
517 }
518
519 for (int by = 0; by < height; by += chunk_h) {
520 for (int bx = 0; bx < width; bx += chunk_w) {
521 int all_found_color = -1; /* nothing found */
522
523 for (int y = by; y < MIN2(height, by + chunk_h); y++) {
524 for (int x = bx; x < MIN2(width, bx + chunk_w); x++) {
525 uint32_t pix = map[y * stride + x];
526
527 int i;
528 for (i = 0; i < num_found_colors; i++) {
529 if (pix == found_colors[i])
530 break;
531 }
532 if (i == num_found_colors &&
533 num_found_colors <
534 ARRAY_SIZE(found_colors)) {
535 found_colors[num_found_colors++] = pix;
536 }
537
538 if (i < num_found_colors) {
539 if (all_found_color == -1)
540 all_found_color = i;
541 else if (i != all_found_color)
542 all_found_color = ARRAY_SIZE(found_colors);
543 }
544 }
545 }
546 /* If all pixels for this chunk have a consistent
547 * value, then print a character for it. Either a
548 * fixed name (particularly common for piglit tests),
549 * or a runtime-generated number.
550 */
551 if (all_found_color >= 0 &&
552 all_found_color < ARRAY_SIZE(found_colors)) {
553 static const struct {
554 uint32_t val;
555 const char *c;
556 } named_colors[] = {
557 { 0xff000000, "█" },
558 { 0x00000000, "█" },
559 { 0xffff0000, "r" },
560 { 0xff00ff00, "g" },
561 { 0xff0000ff, "b" },
562 { 0xffffffff, "w" },
563 };
564 int i;
565 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
566 if (named_colors[i].val ==
567 found_colors[all_found_color]) {
568 fprintf(stderr, "%s",
569 named_colors[i].c);
570 break;
571 }
572 }
573 /* For unnamed colors, print a number and the
574 * numbers will have values printed at the
575 * end.
576 */
577 if (i == ARRAY_SIZE(named_colors)) {
578 fprintf(stderr, "%c",
579 '0' + all_found_color);
580 }
581 } else {
582 /* If there's no consistent color, print this.
583 */
584 fprintf(stderr, ".");
585 }
586 }
587 fprintf(stderr, "\n");
588 }
589
590 for (int i = 0; i < num_found_colors; i++) {
591 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
592 }
593 }
594
595 static void
596 vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
597 {
598 /* All calls to flush_resource are followed by a flush of the context,
599 * so there's nothing to do.
600 */
601 }
602
603 void
604 vc4_update_shadow_baselevel_texture(struct pipe_context *pctx,
605 struct pipe_sampler_view *view)
606 {
607 struct vc4_resource *shadow = vc4_resource(view->texture);
608 struct vc4_resource *orig = vc4_resource(shadow->shadow_parent);
609 assert(orig);
610
611 if (shadow->writes == orig->writes && orig->bo->private)
612 return;
613
614 perf_debug("Updating shadow texture due to %s\n",
615 view->u.tex.first_level ? "base level" : "raster layout");
616
617 for (int i = 0; i <= shadow->base.b.last_level; i++) {
618 unsigned width = u_minify(shadow->base.b.width0, i);
619 unsigned height = u_minify(shadow->base.b.height0, i);
620 struct pipe_blit_info info = {
621 .dst = {
622 .resource = &shadow->base.b,
623 .level = i,
624 .box = {
625 .x = 0,
626 .y = 0,
627 .z = 0,
628 .width = width,
629 .height = height,
630 .depth = 1,
631 },
632 .format = shadow->base.b.format,
633 },
634 .src = {
635 .resource = &orig->base.b,
636 .level = view->u.tex.first_level + i,
637 .box = {
638 .x = 0,
639 .y = 0,
640 .z = 0,
641 .width = width,
642 .height = height,
643 .depth = 1,
644 },
645 .format = orig->base.b.format,
646 },
647 .mask = ~0,
648 };
649 pctx->blit(pctx, &info);
650 }
651
652 shadow->writes = orig->writes;
653 }
654
655 /**
656 * Converts a 4-byte index buffer to 2 bytes.
657 *
658 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
659 * include 4-byte index support, and we have to shrink it down.
660 *
661 * There's no fallback support for when indices end up being larger than 2^16,
662 * though it will at least assertion fail. Also, if the original index data
663 * was in user memory, it would be nice to not have uploaded it to a VBO
664 * before translating.
665 */
666 struct pipe_resource *
667 vc4_get_shadow_index_buffer(struct pipe_context *pctx,
668 const struct pipe_index_buffer *ib,
669 uint32_t count,
670 uint32_t *shadow_offset)
671 {
672 struct vc4_context *vc4 = vc4_context(pctx);
673 struct vc4_resource *orig = vc4_resource(ib->buffer);
674 perf_debug("Fallback conversion for %d uint indices\n", count);
675
676 void *data;
677 struct pipe_resource *shadow_rsc = NULL;
678 u_upload_alloc(vc4->uploader, 0, count * 2,
679 shadow_offset, &shadow_rsc, &data);
680 uint16_t *dst = data;
681
682 struct pipe_transfer *src_transfer = NULL;
683 const uint32_t *src;
684 if (ib->user_buffer) {
685 src = ib->user_buffer;
686 } else {
687 src = pipe_buffer_map_range(pctx, &orig->base.b,
688 ib->offset,
689 count * 4,
690 PIPE_TRANSFER_READ, &src_transfer);
691 }
692
693 for (int i = 0; i < count; i++) {
694 uint32_t src_index = src[i];
695 assert(src_index <= 0xffff);
696 dst[i] = src_index;
697 }
698
699 if (src_transfer)
700 pctx->transfer_unmap(pctx, src_transfer);
701
702 return shadow_rsc;
703 }
704
705 void
706 vc4_resource_screen_init(struct pipe_screen *pscreen)
707 {
708 pscreen->resource_create = vc4_resource_create;
709 pscreen->resource_from_handle = vc4_resource_from_handle;
710 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
711 pscreen->resource_destroy = u_resource_destroy_vtbl;
712 }
713
714 void
715 vc4_resource_context_init(struct pipe_context *pctx)
716 {
717 pctx->transfer_map = u_transfer_map_vtbl;
718 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
719 pctx->transfer_unmap = u_transfer_unmap_vtbl;
720 pctx->transfer_inline_write = u_transfer_inline_write_vtbl;
721 pctx->create_surface = vc4_create_surface;
722 pctx->surface_destroy = vc4_surface_destroy;
723 pctx->resource_copy_region = util_resource_copy_region;
724 pctx->blit = vc4_blit;
725 pctx->flush_resource = vc4_flush_resource;
726 }