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vc4: Implement job shuffling
[mesa.git] / src / gallium / drivers / vc4 / vc4_resource.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_blit.h"
26 #include "util/u_memory.h"
27 #include "util/u_format.h"
28 #include "util/u_inlines.h"
29 #include "util/u_surface.h"
30 #include "util/u_upload_mgr.h"
31
32 #include "vc4_screen.h"
33 #include "vc4_context.h"
34 #include "vc4_resource.h"
35 #include "vc4_tiling.h"
36
37 static bool miptree_debug = false;
38
39 static bool
40 vc4_resource_bo_alloc(struct vc4_resource *rsc)
41 {
42 struct pipe_resource *prsc = &rsc->base.b;
43 struct pipe_screen *pscreen = prsc->screen;
44 struct vc4_bo *bo;
45
46 if (miptree_debug) {
47 fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
48 rsc,
49 rsc->slices[0].size,
50 rsc->slices[0].offset,
51 rsc->slices[0].offset +
52 rsc->slices[0].size +
53 rsc->cube_map_stride * (prsc->array_size - 1));
54 }
55
56 bo = vc4_bo_alloc(vc4_screen(pscreen),
57 rsc->slices[0].offset +
58 rsc->slices[0].size +
59 rsc->cube_map_stride * (prsc->array_size - 1),
60 "resource");
61 if (bo) {
62 vc4_bo_unreference(&rsc->bo);
63 rsc->bo = bo;
64 return true;
65 } else {
66 return false;
67 }
68 }
69
70 static void
71 vc4_resource_transfer_unmap(struct pipe_context *pctx,
72 struct pipe_transfer *ptrans)
73 {
74 struct vc4_context *vc4 = vc4_context(pctx);
75 struct vc4_transfer *trans = vc4_transfer(ptrans);
76
77 if (trans->map) {
78 struct vc4_resource *rsc;
79 struct vc4_resource_slice *slice;
80 if (trans->ss_resource) {
81 rsc = vc4_resource(trans->ss_resource);
82 slice = &rsc->slices[0];
83 } else {
84 rsc = vc4_resource(ptrans->resource);
85 slice = &rsc->slices[ptrans->level];
86 }
87
88 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
89 vc4_store_tiled_image(rsc->bo->map + slice->offset +
90 ptrans->box.z * rsc->cube_map_stride,
91 slice->stride,
92 trans->map, ptrans->stride,
93 slice->tiling, rsc->cpp,
94 &ptrans->box);
95 }
96 free(trans->map);
97 }
98
99 if (trans->ss_resource && (ptrans->usage & PIPE_TRANSFER_WRITE)) {
100 struct pipe_blit_info blit;
101 memset(&blit, 0, sizeof(blit));
102
103 blit.src.resource = trans->ss_resource;
104 blit.src.format = trans->ss_resource->format;
105 blit.src.box.width = trans->ss_box.width;
106 blit.src.box.height = trans->ss_box.height;
107 blit.src.box.depth = 1;
108
109 blit.dst.resource = ptrans->resource;
110 blit.dst.format = ptrans->resource->format;
111 blit.dst.level = ptrans->level;
112 blit.dst.box = trans->ss_box;
113
114 blit.mask = util_format_get_mask(ptrans->resource->format);
115 blit.filter = PIPE_TEX_FILTER_NEAREST;
116
117 pctx->blit(pctx, &blit);
118
119 pipe_resource_reference(&trans->ss_resource, NULL);
120 }
121
122 pipe_resource_reference(&ptrans->resource, NULL);
123 slab_free_st(&vc4->transfer_pool, ptrans);
124 }
125
126 static struct pipe_resource *
127 vc4_get_temp_resource(struct pipe_context *pctx,
128 struct pipe_resource *prsc,
129 const struct pipe_box *box)
130 {
131 struct pipe_resource temp_setup;
132
133 memset(&temp_setup, 0, sizeof(temp_setup));
134 temp_setup.target = prsc->target;
135 temp_setup.format = prsc->format;
136 temp_setup.width0 = box->width;
137 temp_setup.height0 = box->height;
138 temp_setup.depth0 = 1;
139 temp_setup.array_size = 1;
140
141 return pctx->screen->resource_create(pctx->screen, &temp_setup);
142 }
143
144 static void *
145 vc4_resource_transfer_map(struct pipe_context *pctx,
146 struct pipe_resource *prsc,
147 unsigned level, unsigned usage,
148 const struct pipe_box *box,
149 struct pipe_transfer **pptrans)
150 {
151 struct vc4_context *vc4 = vc4_context(pctx);
152 struct vc4_resource *rsc = vc4_resource(prsc);
153 struct vc4_transfer *trans;
154 struct pipe_transfer *ptrans;
155 enum pipe_format format = prsc->format;
156 char *buf;
157
158 /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
159 * being mapped.
160 */
161 if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
162 !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
163 !(prsc->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) &&
164 prsc->last_level == 0 &&
165 prsc->width0 == box->width &&
166 prsc->height0 == box->height &&
167 prsc->depth0 == box->depth &&
168 prsc->array_size == 1) {
169 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
170 }
171
172 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
173 if (vc4_resource_bo_alloc(rsc)) {
174 /* If it might be bound as one of our vertex buffers,
175 * make sure we re-emit vertex buffer state.
176 */
177 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
178 vc4->dirty |= VC4_DIRTY_VTXBUF;
179 } else {
180 /* If we failed to reallocate, flush users so that we
181 * don't violate any syncing requirements.
182 */
183 vc4_flush_jobs_reading_resource(vc4, prsc);
184 }
185 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
186 /* If we're writing and the buffer is being used by the CL, we
187 * have to flush the CL first. If we're only reading, we need
188 * to flush if the CL has written our buffer.
189 */
190 if (usage & PIPE_TRANSFER_WRITE)
191 vc4_flush_jobs_reading_resource(vc4, prsc);
192 else
193 vc4_flush_jobs_writing_resource(vc4, prsc);
194 }
195
196 if (usage & PIPE_TRANSFER_WRITE)
197 rsc->writes++;
198
199 trans = slab_alloc_st(&vc4->transfer_pool);
200 if (!trans)
201 return NULL;
202
203 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
204
205 /* slab_alloc_st() doesn't zero: */
206 memset(trans, 0, sizeof(*trans));
207 ptrans = &trans->base;
208
209 pipe_resource_reference(&ptrans->resource, prsc);
210 ptrans->level = level;
211 ptrans->usage = usage;
212 ptrans->box = *box;
213
214 /* If the resource is multisampled, we need to resolve to single
215 * sample. This seems like it should be handled at a higher layer.
216 */
217 if (prsc->nr_samples > 1) {
218 trans->ss_resource = vc4_get_temp_resource(pctx, prsc, box);
219 if (!trans->ss_resource)
220 goto fail;
221 assert(!trans->ss_resource->nr_samples);
222
223 /* The ptrans->box gets modified for tile alignment, so save
224 * the original box for unmap time.
225 */
226 trans->ss_box = *box;
227
228 if (usage & PIPE_TRANSFER_READ) {
229 struct pipe_blit_info blit;
230 memset(&blit, 0, sizeof(blit));
231
232 blit.src.resource = ptrans->resource;
233 blit.src.format = ptrans->resource->format;
234 blit.src.level = ptrans->level;
235 blit.src.box = trans->ss_box;
236
237 blit.dst.resource = trans->ss_resource;
238 blit.dst.format = trans->ss_resource->format;
239 blit.dst.box.width = trans->ss_box.width;
240 blit.dst.box.height = trans->ss_box.height;
241 blit.dst.box.depth = 1;
242
243 blit.mask = util_format_get_mask(prsc->format);
244 blit.filter = PIPE_TEX_FILTER_NEAREST;
245
246 pctx->blit(pctx, &blit);
247 vc4_flush_jobs_writing_resource(vc4, blit.dst.resource);
248 }
249
250 /* The rest of the mapping process should use our temporary. */
251 prsc = trans->ss_resource;
252 rsc = vc4_resource(prsc);
253 ptrans->box.x = 0;
254 ptrans->box.y = 0;
255 ptrans->box.z = 0;
256 }
257
258 /* Note that the current kernel implementation is synchronous, so no
259 * need to do syncing stuff here yet.
260 */
261
262 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
263 buf = vc4_bo_map_unsynchronized(rsc->bo);
264 else
265 buf = vc4_bo_map(rsc->bo);
266 if (!buf) {
267 fprintf(stderr, "Failed to map bo\n");
268 goto fail;
269 }
270
271 *pptrans = ptrans;
272
273 struct vc4_resource_slice *slice = &rsc->slices[level];
274 if (rsc->tiled) {
275 uint32_t utile_w = vc4_utile_width(rsc->cpp);
276 uint32_t utile_h = vc4_utile_height(rsc->cpp);
277
278 /* No direct mappings of tiled, since we need to manually
279 * tile/untile.
280 */
281 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
282 return NULL;
283
284 /* We need to align the box to utile boundaries, since that's
285 * what load/store operate on.
286 */
287 uint32_t orig_width = ptrans->box.width;
288 uint32_t orig_height = ptrans->box.height;
289 uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
290 uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
291 ptrans->box.width += box_start_x;
292 ptrans->box.x -= box_start_x;
293 ptrans->box.height += box_start_y;
294 ptrans->box.y -= box_start_y;
295 ptrans->box.width = align(ptrans->box.width, utile_w);
296 ptrans->box.height = align(ptrans->box.height, utile_h);
297
298 ptrans->stride = ptrans->box.width * rsc->cpp;
299 ptrans->layer_stride = ptrans->stride * ptrans->box.height;
300
301 trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
302 if (usage & PIPE_TRANSFER_READ ||
303 ptrans->box.width != orig_width ||
304 ptrans->box.height != orig_height) {
305 vc4_load_tiled_image(trans->map, ptrans->stride,
306 buf + slice->offset +
307 ptrans->box.z * rsc->cube_map_stride,
308 slice->stride,
309 slice->tiling, rsc->cpp,
310 &ptrans->box);
311 }
312 return (trans->map +
313 box_start_x * rsc->cpp +
314 box_start_y * ptrans->stride);
315 } else {
316 ptrans->stride = slice->stride;
317 ptrans->layer_stride = ptrans->stride;
318
319 return buf + slice->offset +
320 ptrans->box.y / util_format_get_blockheight(format) * ptrans->stride +
321 ptrans->box.x / util_format_get_blockwidth(format) * rsc->cpp +
322 ptrans->box.z * rsc->cube_map_stride;
323 }
324
325
326 fail:
327 vc4_resource_transfer_unmap(pctx, ptrans);
328 return NULL;
329 }
330
331 static void
332 vc4_resource_destroy(struct pipe_screen *pscreen,
333 struct pipe_resource *prsc)
334 {
335 struct vc4_resource *rsc = vc4_resource(prsc);
336 pipe_resource_reference(&rsc->shadow_parent, NULL);
337 vc4_bo_unreference(&rsc->bo);
338 free(rsc);
339 }
340
341 static boolean
342 vc4_resource_get_handle(struct pipe_screen *pscreen,
343 struct pipe_resource *prsc,
344 struct winsys_handle *handle)
345 {
346 struct vc4_resource *rsc = vc4_resource(prsc);
347
348 return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
349 handle);
350 }
351
352 static const struct u_resource_vtbl vc4_resource_vtbl = {
353 .resource_get_handle = vc4_resource_get_handle,
354 .resource_destroy = vc4_resource_destroy,
355 .transfer_map = vc4_resource_transfer_map,
356 .transfer_flush_region = u_default_transfer_flush_region,
357 .transfer_unmap = vc4_resource_transfer_unmap,
358 };
359
360 static void
361 vc4_setup_slices(struct vc4_resource *rsc)
362 {
363 struct pipe_resource *prsc = &rsc->base.b;
364 uint32_t width = prsc->width0;
365 uint32_t height = prsc->height0;
366 uint32_t pot_width = util_next_power_of_two(width);
367 uint32_t pot_height = util_next_power_of_two(height);
368 uint32_t offset = 0;
369 uint32_t utile_w = vc4_utile_width(rsc->cpp);
370 uint32_t utile_h = vc4_utile_height(rsc->cpp);
371
372 for (int i = prsc->last_level; i >= 0; i--) {
373 struct vc4_resource_slice *slice = &rsc->slices[i];
374
375 uint32_t level_width, level_height;
376 if (i == 0) {
377 level_width = width;
378 level_height = height;
379 } else {
380 level_width = u_minify(pot_width, i);
381 level_height = u_minify(pot_height, i);
382 }
383
384 if (!rsc->tiled) {
385 slice->tiling = VC4_TILING_FORMAT_LINEAR;
386 if (prsc->nr_samples > 1) {
387 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
388 level_width = align(level_width, 32);
389 level_height = align(level_height, 32);
390 } else {
391 level_width = align(level_width, utile_w);
392 }
393 } else {
394 if (vc4_size_is_lt(level_width, level_height,
395 rsc->cpp)) {
396 slice->tiling = VC4_TILING_FORMAT_LT;
397 level_width = align(level_width, utile_w);
398 level_height = align(level_height, utile_h);
399 } else {
400 slice->tiling = VC4_TILING_FORMAT_T;
401 level_width = align(level_width,
402 4 * 2 * utile_w);
403 level_height = align(level_height,
404 4 * 2 * utile_h);
405 }
406 }
407
408 slice->offset = offset;
409 slice->stride = (level_width * rsc->cpp *
410 MAX2(prsc->nr_samples, 1));
411 slice->size = level_height * slice->stride;
412
413 offset += slice->size;
414
415 if (miptree_debug) {
416 static const char tiling_chars[] = {
417 [VC4_TILING_FORMAT_LINEAR] = 'R',
418 [VC4_TILING_FORMAT_LT] = 'L',
419 [VC4_TILING_FORMAT_T] = 'T'
420 };
421 fprintf(stderr,
422 "rsc setup %p (format %d), %dx%d: "
423 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
424 rsc, rsc->vc4_format,
425 prsc->width0, prsc->height0,
426 i, tiling_chars[slice->tiling],
427 level_width, level_height,
428 slice->stride, slice->offset);
429 }
430 }
431
432 /* The texture base pointer that has to point to level 0 doesn't have
433 * intra-page bits, so we have to align it, and thus shift up all the
434 * smaller slices.
435 */
436 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
437 rsc->slices[0].offset);
438 if (page_align_offset) {
439 for (int i = 0; i <= prsc->last_level; i++)
440 rsc->slices[i].offset += page_align_offset;
441 }
442
443 /* Cube map faces appear as whole miptrees at a page-aligned offset
444 * from the first face's miptree.
445 */
446 if (prsc->target == PIPE_TEXTURE_CUBE) {
447 rsc->cube_map_stride = align(rsc->slices[0].offset +
448 rsc->slices[0].size, 4096);
449 }
450 }
451
452 static struct vc4_resource *
453 vc4_resource_setup(struct pipe_screen *pscreen,
454 const struct pipe_resource *tmpl)
455 {
456 struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
457 if (!rsc)
458 return NULL;
459 struct pipe_resource *prsc = &rsc->base.b;
460
461 *prsc = *tmpl;
462
463 pipe_reference_init(&prsc->reference, 1);
464 prsc->screen = pscreen;
465
466 rsc->base.vtbl = &vc4_resource_vtbl;
467 if (prsc->nr_samples <= 1)
468 rsc->cpp = util_format_get_blocksize(tmpl->format);
469 else
470 rsc->cpp = sizeof(uint32_t);
471
472 assert(rsc->cpp);
473
474 return rsc;
475 }
476
477 static enum vc4_texture_data_type
478 get_resource_texture_format(struct pipe_resource *prsc)
479 {
480 struct vc4_resource *rsc = vc4_resource(prsc);
481 uint8_t format = vc4_get_tex_format(prsc->format);
482
483 if (!rsc->tiled) {
484 if (prsc->nr_samples > 1) {
485 return ~0;
486 } else {
487 assert(format == VC4_TEXTURE_TYPE_RGBA8888);
488 return VC4_TEXTURE_TYPE_RGBA32R;
489 }
490 }
491
492 return format;
493 }
494
495 struct pipe_resource *
496 vc4_resource_create(struct pipe_screen *pscreen,
497 const struct pipe_resource *tmpl)
498 {
499 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
500 struct pipe_resource *prsc = &rsc->base.b;
501
502 /* We have to make shared be untiled, since we don't have any way to
503 * communicate metadata about tiling currently.
504 */
505 if (tmpl->target == PIPE_BUFFER ||
506 tmpl->nr_samples > 1 ||
507 (tmpl->bind & (PIPE_BIND_SCANOUT |
508 PIPE_BIND_LINEAR |
509 PIPE_BIND_SHARED |
510 PIPE_BIND_CURSOR))) {
511 rsc->tiled = false;
512 } else {
513 rsc->tiled = true;
514 }
515
516 if (tmpl->target != PIPE_BUFFER)
517 rsc->vc4_format = get_resource_texture_format(prsc);
518
519 vc4_setup_slices(rsc);
520 if (!vc4_resource_bo_alloc(rsc))
521 goto fail;
522
523 return prsc;
524 fail:
525 vc4_resource_destroy(pscreen, prsc);
526 return NULL;
527 }
528
529 static struct pipe_resource *
530 vc4_resource_from_handle(struct pipe_screen *pscreen,
531 const struct pipe_resource *tmpl,
532 struct winsys_handle *handle,
533 unsigned usage)
534 {
535 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
536 struct pipe_resource *prsc = &rsc->base.b;
537 struct vc4_resource_slice *slice = &rsc->slices[0];
538 uint32_t expected_stride =
539 align(prsc->width0, vc4_utile_width(rsc->cpp)) * rsc->cpp;
540
541 if (!rsc)
542 return NULL;
543
544 if (handle->stride != expected_stride) {
545 static bool warned = false;
546 if (!warned) {
547 warned = true;
548 fprintf(stderr,
549 "Attempting to import %dx%d %s with "
550 "unsupported stride %d instead of %d\n",
551 prsc->width0, prsc->height0,
552 util_format_short_name(prsc->format),
553 handle->stride,
554 expected_stride);
555 }
556 goto fail;
557 }
558
559 rsc->tiled = false;
560 rsc->bo = vc4_screen_bo_from_handle(pscreen, handle);
561 if (!rsc->bo)
562 goto fail;
563
564 slice->stride = handle->stride;
565 slice->tiling = VC4_TILING_FORMAT_LINEAR;
566
567 rsc->vc4_format = get_resource_texture_format(prsc);
568
569 if (miptree_debug) {
570 fprintf(stderr,
571 "rsc import %p (format %d), %dx%d: "
572 "level 0 (R) -> stride %d@0x%08x\n",
573 rsc, rsc->vc4_format,
574 prsc->width0, prsc->height0,
575 slice->stride, slice->offset);
576 }
577
578 return prsc;
579
580 fail:
581 vc4_resource_destroy(pscreen, prsc);
582 return NULL;
583 }
584
585 static struct pipe_surface *
586 vc4_create_surface(struct pipe_context *pctx,
587 struct pipe_resource *ptex,
588 const struct pipe_surface *surf_tmpl)
589 {
590 struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
591 struct vc4_resource *rsc = vc4_resource(ptex);
592
593 if (!surface)
594 return NULL;
595
596 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
597
598 struct pipe_surface *psurf = &surface->base;
599 unsigned level = surf_tmpl->u.tex.level;
600
601 pipe_reference_init(&psurf->reference, 1);
602 pipe_resource_reference(&psurf->texture, ptex);
603
604 psurf->context = pctx;
605 psurf->format = surf_tmpl->format;
606 psurf->width = u_minify(ptex->width0, level);
607 psurf->height = u_minify(ptex->height0, level);
608 psurf->u.tex.level = level;
609 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
610 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
611 surface->offset = (rsc->slices[level].offset +
612 psurf->u.tex.first_layer * rsc->cube_map_stride);
613 surface->tiling = rsc->slices[level].tiling;
614
615 return &surface->base;
616 }
617
618 static void
619 vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
620 {
621 pipe_resource_reference(&psurf->texture, NULL);
622 FREE(psurf);
623 }
624
625 static void
626 vc4_dump_surface_non_msaa(struct pipe_surface *psurf)
627 {
628 struct pipe_resource *prsc = psurf->texture;
629 struct vc4_resource *rsc = vc4_resource(prsc);
630 uint32_t *map = vc4_bo_map(rsc->bo);
631 uint32_t stride = rsc->slices[0].stride / 4;
632 uint32_t width = psurf->width;
633 uint32_t height = psurf->height;
634 uint32_t chunk_w = width / 79;
635 uint32_t chunk_h = height / 40;
636 uint32_t found_colors[10];
637 uint32_t num_found_colors = 0;
638
639 if (rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R) {
640 fprintf(stderr, "%s: Unsupported format %s\n",
641 __func__, util_format_short_name(psurf->format));
642 return;
643 }
644
645 for (int by = 0; by < height; by += chunk_h) {
646 for (int bx = 0; bx < width; bx += chunk_w) {
647 int all_found_color = -1; /* nothing found */
648
649 for (int y = by; y < MIN2(height, by + chunk_h); y++) {
650 for (int x = bx; x < MIN2(width, bx + chunk_w); x++) {
651 uint32_t pix = map[y * stride + x];
652
653 int i;
654 for (i = 0; i < num_found_colors; i++) {
655 if (pix == found_colors[i])
656 break;
657 }
658 if (i == num_found_colors &&
659 num_found_colors <
660 ARRAY_SIZE(found_colors)) {
661 found_colors[num_found_colors++] = pix;
662 }
663
664 if (i < num_found_colors) {
665 if (all_found_color == -1)
666 all_found_color = i;
667 else if (i != all_found_color)
668 all_found_color = ARRAY_SIZE(found_colors);
669 }
670 }
671 }
672 /* If all pixels for this chunk have a consistent
673 * value, then print a character for it. Either a
674 * fixed name (particularly common for piglit tests),
675 * or a runtime-generated number.
676 */
677 if (all_found_color >= 0 &&
678 all_found_color < ARRAY_SIZE(found_colors)) {
679 static const struct {
680 uint32_t val;
681 const char *c;
682 } named_colors[] = {
683 { 0xff000000, "█" },
684 { 0x00000000, "█" },
685 { 0xffff0000, "r" },
686 { 0xff00ff00, "g" },
687 { 0xff0000ff, "b" },
688 { 0xffffffff, "w" },
689 };
690 int i;
691 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
692 if (named_colors[i].val ==
693 found_colors[all_found_color]) {
694 fprintf(stderr, "%s",
695 named_colors[i].c);
696 break;
697 }
698 }
699 /* For unnamed colors, print a number and the
700 * numbers will have values printed at the
701 * end.
702 */
703 if (i == ARRAY_SIZE(named_colors)) {
704 fprintf(stderr, "%c",
705 '0' + all_found_color);
706 }
707 } else {
708 /* If there's no consistent color, print this.
709 */
710 fprintf(stderr, ".");
711 }
712 }
713 fprintf(stderr, "\n");
714 }
715
716 for (int i = 0; i < num_found_colors; i++) {
717 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
718 }
719 }
720
721 static uint32_t
722 vc4_surface_msaa_get_sample(struct pipe_surface *psurf,
723 uint32_t x, uint32_t y, uint32_t sample)
724 {
725 struct pipe_resource *prsc = psurf->texture;
726 struct vc4_resource *rsc = vc4_resource(prsc);
727 uint32_t tile_w = 32, tile_h = 32;
728 uint32_t tiles_w = DIV_ROUND_UP(psurf->width, 32);
729
730 uint32_t tile_x = x / tile_w;
731 uint32_t tile_y = y / tile_h;
732 uint32_t *tile = (vc4_bo_map(rsc->bo) +
733 VC4_TILE_BUFFER_SIZE * (tile_y * tiles_w + tile_x));
734 uint32_t subtile_x = x % tile_w;
735 uint32_t subtile_y = y % tile_h;
736
737 uint32_t quad_samples = VC4_MAX_SAMPLES * 4;
738 uint32_t tile_stride = quad_samples * tile_w / 2;
739
740 return *((uint32_t *)tile +
741 (subtile_y >> 1) * tile_stride +
742 (subtile_x >> 1) * quad_samples +
743 ((subtile_y & 1) << 1) +
744 (subtile_x & 1) +
745 sample);
746 }
747
748 static void
749 vc4_dump_surface_msaa_char(struct pipe_surface *psurf,
750 uint32_t start_x, uint32_t start_y,
751 uint32_t w, uint32_t h)
752 {
753 bool all_same_color = true;
754 uint32_t all_pix = 0;
755
756 for (int y = start_y; y < start_y + h; y++) {
757 for (int x = start_x; x < start_x + w; x++) {
758 for (int s = 0; s < VC4_MAX_SAMPLES; s++) {
759 uint32_t pix = vc4_surface_msaa_get_sample(psurf,
760 x, y,
761 s);
762 if (x == start_x && y == start_y)
763 all_pix = pix;
764 else if (all_pix != pix)
765 all_same_color = false;
766 }
767 }
768 }
769 if (all_same_color) {
770 static const struct {
771 uint32_t val;
772 const char *c;
773 } named_colors[] = {
774 { 0xff000000, "█" },
775 { 0x00000000, "█" },
776 { 0xffff0000, "r" },
777 { 0xff00ff00, "g" },
778 { 0xff0000ff, "b" },
779 { 0xffffffff, "w" },
780 };
781 int i;
782 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
783 if (named_colors[i].val == all_pix) {
784 fprintf(stderr, "%s",
785 named_colors[i].c);
786 return;
787 }
788 }
789 fprintf(stderr, "x");
790 } else {
791 fprintf(stderr, ".");
792 }
793 }
794
795 static void
796 vc4_dump_surface_msaa(struct pipe_surface *psurf)
797 {
798 uint32_t tile_w = 32, tile_h = 32;
799 uint32_t tiles_w = DIV_ROUND_UP(psurf->width, tile_w);
800 uint32_t tiles_h = DIV_ROUND_UP(psurf->height, tile_h);
801 uint32_t char_w = 140, char_h = 60;
802 uint32_t char_w_per_tile = char_w / tiles_w - 1;
803 uint32_t char_h_per_tile = char_h / tiles_h - 1;
804 uint32_t found_colors[10];
805 uint32_t num_found_colors = 0;
806
807 fprintf(stderr, "Surface: %dx%d (%dx MSAA)\n",
808 psurf->width, psurf->height, psurf->texture->nr_samples);
809
810 for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
811 fprintf(stderr, "-");
812 fprintf(stderr, "\n");
813
814 for (int ty = 0; ty < psurf->height; ty += tile_h) {
815 for (int y = 0; y < char_h_per_tile; y++) {
816
817 for (int tx = 0; tx < psurf->width; tx += tile_w) {
818 for (int x = 0; x < char_w_per_tile; x++) {
819 uint32_t bx1 = (x * tile_w /
820 char_w_per_tile);
821 uint32_t bx2 = ((x + 1) * tile_w /
822 char_w_per_tile);
823 uint32_t by1 = (y * tile_h /
824 char_h_per_tile);
825 uint32_t by2 = ((y + 1) * tile_h /
826 char_h_per_tile);
827
828 vc4_dump_surface_msaa_char(psurf,
829 tx + bx1,
830 ty + by1,
831 bx2 - bx1,
832 by2 - by1);
833 }
834 fprintf(stderr, "|");
835 }
836 fprintf(stderr, "\n");
837 }
838
839 for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
840 fprintf(stderr, "-");
841 fprintf(stderr, "\n");
842 }
843
844 for (int i = 0; i < num_found_colors; i++) {
845 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
846 }
847 }
848
849 /** Debug routine to dump the contents of an 8888 surface to the console */
850 void
851 vc4_dump_surface(struct pipe_surface *psurf)
852 {
853 if (!psurf)
854 return;
855
856 if (psurf->texture->nr_samples > 1)
857 vc4_dump_surface_msaa(psurf);
858 else
859 vc4_dump_surface_non_msaa(psurf);
860 }
861
862 static void
863 vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
864 {
865 /* All calls to flush_resource are followed by a flush of the context,
866 * so there's nothing to do.
867 */
868 }
869
870 void
871 vc4_update_shadow_baselevel_texture(struct pipe_context *pctx,
872 struct pipe_sampler_view *view)
873 {
874 struct vc4_resource *shadow = vc4_resource(view->texture);
875 struct vc4_resource *orig = vc4_resource(shadow->shadow_parent);
876 assert(orig);
877
878 if (shadow->writes == orig->writes && orig->bo->private)
879 return;
880
881 perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
882 orig->base.b.width0, orig->base.b.height0,
883 view->u.tex.first_level,
884 view->u.tex.first_level ? "base level" : "raster layout");
885
886 for (int i = 0; i <= shadow->base.b.last_level; i++) {
887 unsigned width = u_minify(shadow->base.b.width0, i);
888 unsigned height = u_minify(shadow->base.b.height0, i);
889 struct pipe_blit_info info = {
890 .dst = {
891 .resource = &shadow->base.b,
892 .level = i,
893 .box = {
894 .x = 0,
895 .y = 0,
896 .z = 0,
897 .width = width,
898 .height = height,
899 .depth = 1,
900 },
901 .format = shadow->base.b.format,
902 },
903 .src = {
904 .resource = &orig->base.b,
905 .level = view->u.tex.first_level + i,
906 .box = {
907 .x = 0,
908 .y = 0,
909 .z = 0,
910 .width = width,
911 .height = height,
912 .depth = 1,
913 },
914 .format = orig->base.b.format,
915 },
916 .mask = ~0,
917 };
918 pctx->blit(pctx, &info);
919 }
920
921 shadow->writes = orig->writes;
922 }
923
924 /**
925 * Converts a 4-byte index buffer to 2 bytes.
926 *
927 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
928 * include 4-byte index support, and we have to shrink it down.
929 *
930 * There's no fallback support for when indices end up being larger than 2^16,
931 * though it will at least assertion fail. Also, if the original index data
932 * was in user memory, it would be nice to not have uploaded it to a VBO
933 * before translating.
934 */
935 struct pipe_resource *
936 vc4_get_shadow_index_buffer(struct pipe_context *pctx,
937 const struct pipe_index_buffer *ib,
938 uint32_t count,
939 uint32_t *shadow_offset)
940 {
941 struct vc4_context *vc4 = vc4_context(pctx);
942 struct vc4_resource *orig = vc4_resource(ib->buffer);
943 perf_debug("Fallback conversion for %d uint indices\n", count);
944
945 void *data;
946 struct pipe_resource *shadow_rsc = NULL;
947 u_upload_alloc(vc4->uploader, 0, count * 2, 4,
948 shadow_offset, &shadow_rsc, &data);
949 uint16_t *dst = data;
950
951 struct pipe_transfer *src_transfer = NULL;
952 const uint32_t *src;
953 if (ib->user_buffer) {
954 src = ib->user_buffer;
955 } else {
956 src = pipe_buffer_map_range(pctx, &orig->base.b,
957 ib->offset,
958 count * 4,
959 PIPE_TRANSFER_READ, &src_transfer);
960 }
961
962 for (int i = 0; i < count; i++) {
963 uint32_t src_index = src[i];
964 assert(src_index <= 0xffff);
965 dst[i] = src_index;
966 }
967
968 if (src_transfer)
969 pctx->transfer_unmap(pctx, src_transfer);
970
971 return shadow_rsc;
972 }
973
974 void
975 vc4_resource_screen_init(struct pipe_screen *pscreen)
976 {
977 pscreen->resource_create = vc4_resource_create;
978 pscreen->resource_from_handle = vc4_resource_from_handle;
979 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
980 pscreen->resource_destroy = u_resource_destroy_vtbl;
981 }
982
983 void
984 vc4_resource_context_init(struct pipe_context *pctx)
985 {
986 pctx->transfer_map = u_transfer_map_vtbl;
987 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
988 pctx->transfer_unmap = u_transfer_unmap_vtbl;
989 pctx->buffer_subdata = u_default_buffer_subdata;
990 pctx->texture_subdata = u_default_texture_subdata;
991 pctx->create_surface = vc4_create_surface;
992 pctx->surface_destroy = vc4_surface_destroy;
993 pctx->resource_copy_region = util_resource_copy_region;
994 pctx->blit = vc4_blit;
995 pctx->flush_resource = vc4_flush_resource;
996 }