gallium: add PIPE_CAP_TGSI_PACK_HALF_FLOAT to indicate UP2H/PK2H support
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40 { "cl", VC4_DEBUG_CL,
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "nir", VC4_DEBUG_NIR,
47 "Dump NIR during program compile" },
48 { "tgsi", VC4_DEBUG_TGSI,
49 "Dump TGSI during program compile" },
50 { "shaderdb", VC4_DEBUG_SHADERDB,
51 "Dump program compile information for shader-db analysis" },
52 { "perf", VC4_DEBUG_PERF,
53 "Print during performance-related events" },
54 { "norast", VC4_DEBUG_NORAST,
55 "Skip actual hardware execution of commands" },
56 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57 "Flush after each draw call" },
58 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59 "Wait for finish after each flush" },
60 #if USE_VC4_SIMULATOR
61 { "dump", VC4_DEBUG_DUMP,
62 "Write a GPU command stream trace file" },
63 #endif
64 { NULL }
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
68 uint32_t vc4_debug;
69
70 static const char *
71 vc4_screen_get_name(struct pipe_screen *pscreen)
72 {
73 return "VC4";
74 }
75
76 static const char *
77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
78 {
79 return "Broadcom";
80 }
81
82 static void
83 vc4_screen_destroy(struct pipe_screen *pscreen)
84 {
85 vc4_bufmgr_destroy(pscreen);
86 ralloc_free(pscreen);
87 }
88
89 static int
90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
91 {
92 switch (param) {
93 /* Supported features (boolean caps). */
94 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
95 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_USER_CONSTANT_BUFFERS:
98 case PIPE_CAP_TEXTURE_SHADOW_MAP:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_TWO_SIDED_STENCIL:
101 case PIPE_CAP_USER_INDEX_BUFFERS:
102 case PIPE_CAP_TEXTURE_MULTISAMPLE:
103 return 1;
104
105 /* lying for GL 2.0 */
106 case PIPE_CAP_OCCLUSION_QUERY:
107 case PIPE_CAP_POINT_SPRITE:
108 return 1;
109
110 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
111 return 256;
112
113 case PIPE_CAP_GLSL_FEATURE_LEVEL:
114 return 120;
115
116 case PIPE_CAP_MAX_VIEWPORTS:
117 return 1;
118
119 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
120 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
121 return 1;
122
123 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
124 return 1;
125
126 /* Unsupported features. */
127 case PIPE_CAP_ANISOTROPIC_FILTER:
128 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
129 case PIPE_CAP_CUBE_MAP_ARRAY:
130 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
131 case PIPE_CAP_TEXTURE_SWIZZLE:
132 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
133 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
134 case PIPE_CAP_SEAMLESS_CUBE_MAP:
135 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
136 case PIPE_CAP_TGSI_INSTANCEID:
137 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
138 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
139 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
140 case PIPE_CAP_COMPUTE:
141 case PIPE_CAP_START_INSTANCE:
142 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
143 case PIPE_CAP_SHADER_STENCIL_EXPORT:
144 case PIPE_CAP_TGSI_TEXCOORD:
145 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
146 case PIPE_CAP_CONDITIONAL_RENDER:
147 case PIPE_CAP_PRIMITIVE_RESTART:
148 case PIPE_CAP_TEXTURE_BARRIER:
149 case PIPE_CAP_SM3:
150 case PIPE_CAP_INDEP_BLEND_ENABLE:
151 case PIPE_CAP_INDEP_BLEND_FUNC:
152 case PIPE_CAP_DEPTH_CLIP_DISABLE:
153 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
154 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
155 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
156 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
157 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
158 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
159 case PIPE_CAP_USER_VERTEX_BUFFERS:
160 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
161 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
162 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
163 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
164 case PIPE_CAP_TEXTURE_GATHER_SM5:
165 case PIPE_CAP_FAKE_SW_MSAA:
166 case PIPE_CAP_TEXTURE_QUERY_LOD:
167 case PIPE_CAP_SAMPLE_SHADING:
168 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
169 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
170 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
171 case PIPE_CAP_MAX_TEXEL_OFFSET:
172 case PIPE_CAP_MAX_VERTEX_STREAMS:
173 case PIPE_CAP_DRAW_INDIRECT:
174 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
175 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
176 case PIPE_CAP_SAMPLER_VIEW_TARGET:
177 case PIPE_CAP_CLIP_HALFZ:
178 case PIPE_CAP_VERTEXID_NOBASE:
179 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
180 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
181 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
182 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
183 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
184 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
185 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
186 case PIPE_CAP_DEPTH_BOUNDS_TEST:
187 case PIPE_CAP_TGSI_TXQS:
188 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
189 case PIPE_CAP_SHAREABLE_SHADERS:
190 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
191 case PIPE_CAP_CLEAR_TEXTURE:
192 case PIPE_CAP_DRAW_PARAMETERS:
193 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
194 return 0;
195
196 /* Stream output. */
197 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
198 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
199 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
200 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
201 return 0;
202
203 /* Geometry shader output, unsupported. */
204 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
205 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
206 return 0;
207
208 /* Texturing. */
209 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
210 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
211 return VC4_MAX_MIP_LEVELS;
212 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
213 /* Note: Not supported in hardware, just faking it. */
214 return 5;
215 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
216 return 0;
217
218 /* Render targets. */
219 case PIPE_CAP_MAX_RENDER_TARGETS:
220 return 1;
221
222 /* Queries. */
223 case PIPE_CAP_QUERY_TIME_ELAPSED:
224 case PIPE_CAP_QUERY_TIMESTAMP:
225 return 0;
226
227 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
228 case PIPE_CAP_MIN_TEXEL_OFFSET:
229 return 0;
230
231 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
232 return 2048;
233
234 case PIPE_CAP_ENDIANNESS:
235 return PIPE_ENDIAN_LITTLE;
236
237 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
238 return 64;
239
240 case PIPE_CAP_VENDOR_ID:
241 return 0x14E4;
242 case PIPE_CAP_DEVICE_ID:
243 return 0xFFFFFFFF;
244 case PIPE_CAP_ACCELERATED:
245 return 1;
246 case PIPE_CAP_VIDEO_MEMORY: {
247 uint64_t system_memory;
248
249 if (!os_get_total_physical_memory(&system_memory))
250 return 0;
251
252 return (int)(system_memory >> 20);
253 }
254 case PIPE_CAP_UMA:
255 return 1;
256
257 default:
258 fprintf(stderr, "unknown param %d\n", param);
259 return 0;
260 }
261 }
262
263 static float
264 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
265 {
266 switch (param) {
267 case PIPE_CAPF_MAX_LINE_WIDTH:
268 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
269 return 32;
270
271 case PIPE_CAPF_MAX_POINT_WIDTH:
272 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
273 return 512.0f;
274
275 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
276 return 0.0f;
277 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
278 return 0.0f;
279 case PIPE_CAPF_GUARD_BAND_LEFT:
280 case PIPE_CAPF_GUARD_BAND_TOP:
281 case PIPE_CAPF_GUARD_BAND_RIGHT:
282 case PIPE_CAPF_GUARD_BAND_BOTTOM:
283 return 0.0f;
284 default:
285 fprintf(stderr, "unknown paramf %d\n", param);
286 return 0;
287 }
288 }
289
290 static int
291 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
292 enum pipe_shader_cap param)
293 {
294 if (shader != PIPE_SHADER_VERTEX &&
295 shader != PIPE_SHADER_FRAGMENT) {
296 return 0;
297 }
298
299 /* this is probably not totally correct.. but it's a start: */
300 switch (param) {
301 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
302 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
303 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
304 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
305 return 16384;
306 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
307 return 0;
308 case PIPE_SHADER_CAP_MAX_INPUTS:
309 if (shader == PIPE_SHADER_FRAGMENT)
310 return 8;
311 else
312 return 16;
313 case PIPE_SHADER_CAP_MAX_OUTPUTS:
314 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
315 case PIPE_SHADER_CAP_MAX_TEMPS:
316 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
317 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
318 return 16 * 1024 * sizeof(float);
319 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
320 return 1;
321 case PIPE_SHADER_CAP_MAX_PREDS:
322 return 0; /* nothing uses this */
323 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
324 return 0;
325 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
326 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
327 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
328 return 0;
329 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
330 return 1;
331 case PIPE_SHADER_CAP_SUBROUTINES:
332 return 0;
333 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
334 return 0;
335 case PIPE_SHADER_CAP_INTEGERS:
336 return 1;
337 case PIPE_SHADER_CAP_DOUBLES:
338 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
339 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
340 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
341 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
342 return 0;
343 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
344 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
345 return VC4_MAX_TEXTURE_SAMPLERS;
346 case PIPE_SHADER_CAP_PREFERRED_IR:
347 return PIPE_SHADER_IR_TGSI;
348 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
349 return 32;
350 default:
351 fprintf(stderr, "unknown shader param %d\n", param);
352 return 0;
353 }
354 return 0;
355 }
356
357 static boolean
358 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
359 enum pipe_format format,
360 enum pipe_texture_target target,
361 unsigned sample_count,
362 unsigned usage)
363 {
364 unsigned retval = 0;
365
366 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
367 !util_format_is_supported(format, usage)) {
368 return FALSE;
369 }
370
371 if (usage & PIPE_BIND_VERTEX_BUFFER) {
372 switch (format) {
373 case PIPE_FORMAT_R32G32B32A32_FLOAT:
374 case PIPE_FORMAT_R32G32B32_FLOAT:
375 case PIPE_FORMAT_R32G32_FLOAT:
376 case PIPE_FORMAT_R32_FLOAT:
377 case PIPE_FORMAT_R32G32B32A32_SNORM:
378 case PIPE_FORMAT_R32G32B32_SNORM:
379 case PIPE_FORMAT_R32G32_SNORM:
380 case PIPE_FORMAT_R32_SNORM:
381 case PIPE_FORMAT_R32G32B32A32_SSCALED:
382 case PIPE_FORMAT_R32G32B32_SSCALED:
383 case PIPE_FORMAT_R32G32_SSCALED:
384 case PIPE_FORMAT_R32_SSCALED:
385 case PIPE_FORMAT_R16G16B16A16_UNORM:
386 case PIPE_FORMAT_R16G16B16_UNORM:
387 case PIPE_FORMAT_R16G16_UNORM:
388 case PIPE_FORMAT_R16_UNORM:
389 case PIPE_FORMAT_R16G16B16A16_SNORM:
390 case PIPE_FORMAT_R16G16B16_SNORM:
391 case PIPE_FORMAT_R16G16_SNORM:
392 case PIPE_FORMAT_R16_SNORM:
393 case PIPE_FORMAT_R16G16B16A16_USCALED:
394 case PIPE_FORMAT_R16G16B16_USCALED:
395 case PIPE_FORMAT_R16G16_USCALED:
396 case PIPE_FORMAT_R16_USCALED:
397 case PIPE_FORMAT_R16G16B16A16_SSCALED:
398 case PIPE_FORMAT_R16G16B16_SSCALED:
399 case PIPE_FORMAT_R16G16_SSCALED:
400 case PIPE_FORMAT_R16_SSCALED:
401 case PIPE_FORMAT_R8G8B8A8_UNORM:
402 case PIPE_FORMAT_R8G8B8_UNORM:
403 case PIPE_FORMAT_R8G8_UNORM:
404 case PIPE_FORMAT_R8_UNORM:
405 case PIPE_FORMAT_R8G8B8A8_SNORM:
406 case PIPE_FORMAT_R8G8B8_SNORM:
407 case PIPE_FORMAT_R8G8_SNORM:
408 case PIPE_FORMAT_R8_SNORM:
409 case PIPE_FORMAT_R8G8B8A8_USCALED:
410 case PIPE_FORMAT_R8G8B8_USCALED:
411 case PIPE_FORMAT_R8G8_USCALED:
412 case PIPE_FORMAT_R8_USCALED:
413 case PIPE_FORMAT_R8G8B8A8_SSCALED:
414 case PIPE_FORMAT_R8G8B8_SSCALED:
415 case PIPE_FORMAT_R8G8_SSCALED:
416 case PIPE_FORMAT_R8_SSCALED:
417 retval |= PIPE_BIND_VERTEX_BUFFER;
418 break;
419 default:
420 break;
421 }
422 }
423
424 if ((usage & PIPE_BIND_RENDER_TARGET) &&
425 (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
426 vc4_rt_format_supported(format)) {
427 retval |= PIPE_BIND_RENDER_TARGET;
428 }
429
430 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
431 (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
432 (vc4_tex_format_supported(format))) {
433 retval |= PIPE_BIND_SAMPLER_VIEW;
434 }
435
436 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
437 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
438 format == PIPE_FORMAT_X8Z24_UNORM)) {
439 retval |= PIPE_BIND_DEPTH_STENCIL;
440 }
441
442 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
443 (format == PIPE_FORMAT_I8_UINT ||
444 format == PIPE_FORMAT_I16_UINT)) {
445 retval |= PIPE_BIND_INDEX_BUFFER;
446 }
447
448 if (usage & PIPE_BIND_TRANSFER_READ)
449 retval |= PIPE_BIND_TRANSFER_READ;
450 if (usage & PIPE_BIND_TRANSFER_WRITE)
451 retval |= PIPE_BIND_TRANSFER_WRITE;
452
453 #if 0
454 if (retval != usage) {
455 fprintf(stderr,
456 "not supported: format=%s, target=%d, sample_count=%d, "
457 "usage=0x%x, retval=0x%x\n", util_format_name(format),
458 target, sample_count, usage, retval);
459 }
460 #endif
461
462 return retval == usage;
463 }
464
465 struct pipe_screen *
466 vc4_screen_create(int fd)
467 {
468 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
469 struct pipe_screen *pscreen;
470
471 pscreen = &screen->base;
472
473 pscreen->destroy = vc4_screen_destroy;
474 pscreen->get_param = vc4_screen_get_param;
475 pscreen->get_paramf = vc4_screen_get_paramf;
476 pscreen->get_shader_param = vc4_screen_get_shader_param;
477 pscreen->context_create = vc4_context_create;
478 pscreen->is_format_supported = vc4_screen_is_format_supported;
479
480 screen->fd = fd;
481 list_inithead(&screen->bo_cache.time_list);
482
483 vc4_fence_init(screen);
484
485 vc4_debug = debug_get_option_vc4_debug();
486 if (vc4_debug & VC4_DEBUG_SHADERDB)
487 vc4_debug |= VC4_DEBUG_NORAST;
488
489 #if USE_VC4_SIMULATOR
490 vc4_simulator_init(screen);
491 #endif
492
493 vc4_resource_screen_init(pscreen);
494
495 pscreen->get_name = vc4_screen_get_name;
496 pscreen->get_vendor = vc4_screen_get_vendor;
497 pscreen->get_device_vendor = vc4_screen_get_vendor;
498
499 return pscreen;
500 }
501
502 boolean
503 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
504 struct vc4_bo *bo,
505 unsigned stride,
506 struct winsys_handle *whandle)
507 {
508 whandle->stride = stride;
509
510 /* If we're passing some reference to our BO out to some other part of
511 * the system, then we can't do any optimizations about only us being
512 * the ones seeing it (like BO caching or shadow update avoidance).
513 */
514 bo->private = false;
515
516 switch (whandle->type) {
517 case DRM_API_HANDLE_TYPE_SHARED:
518 return vc4_bo_flink(bo, &whandle->handle);
519 case DRM_API_HANDLE_TYPE_KMS:
520 whandle->handle = bo->handle;
521 return TRUE;
522 case DRM_API_HANDLE_TYPE_FD:
523 whandle->handle = vc4_bo_get_dmabuf(bo);
524 return whandle->handle != -1;
525 }
526
527 return FALSE;
528 }
529
530 struct vc4_bo *
531 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
532 struct winsys_handle *whandle)
533 {
534 struct vc4_screen *screen = vc4_screen(pscreen);
535
536 switch (whandle->type) {
537 case DRM_API_HANDLE_TYPE_SHARED:
538 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
539 case DRM_API_HANDLE_TYPE_FD:
540 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
541 default:
542 fprintf(stderr,
543 "Attempt to import unsupported handle type %d\n",
544 whandle->type);
545 return NULL;
546 }
547 }