vc4: Drop pointless raddr conflict handling on SF.
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33
34 #include "vc4_screen.h"
35 #include "vc4_context.h"
36 #include "vc4_resource.h"
37
38 static const struct debug_named_value debug_options[] = {
39 { "cl", VC4_DEBUG_CL,
40 "Dump command list during creation" },
41 { "qpu", VC4_DEBUG_QPU,
42 "Dump generated QPU instructions" },
43 { "qir", VC4_DEBUG_QIR,
44 "Dump QPU IR during program compile" },
45 { "tgsi", VC4_DEBUG_TGSI,
46 "Dump TGSI during program compile" },
47 { "shaderdb", VC4_DEBUG_SHADERDB,
48 "Dump program compile information for shader-db analysis" },
49 { "perf", VC4_DEBUG_PERF,
50 "Print during performance-related events" },
51 { "norast", VC4_DEBUG_NORAST,
52 "Skip actual hardware execution of commands" },
53 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
54 "Flush after each draw call" },
55 { NULL }
56 };
57
58 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
59 uint32_t vc4_debug;
60
61 static const char *
62 vc4_screen_get_name(struct pipe_screen *pscreen)
63 {
64 return "VC4";
65 }
66
67 static const char *
68 vc4_screen_get_vendor(struct pipe_screen *pscreen)
69 {
70 return "Broadcom";
71 }
72
73 static void
74 vc4_screen_destroy(struct pipe_screen *pscreen)
75 {
76 free(pscreen);
77 }
78
79 static int
80 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
81 {
82 switch (param) {
83 /* Supported features (boolean caps). */
84 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
85 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
86 case PIPE_CAP_NPOT_TEXTURES:
87 case PIPE_CAP_USER_CONSTANT_BUFFERS:
88 case PIPE_CAP_TEXTURE_SHADOW_MAP:
89 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
90 case PIPE_CAP_TWO_SIDED_STENCIL:
91 return 1;
92
93 /* lying for GL 2.0 */
94 case PIPE_CAP_OCCLUSION_QUERY:
95 case PIPE_CAP_POINT_SPRITE:
96 return 1;
97
98 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
99 return 256;
100
101 case PIPE_CAP_GLSL_FEATURE_LEVEL:
102 return 120;
103
104 case PIPE_CAP_MAX_VIEWPORTS:
105 return 1;
106
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
109 return 1;
110
111 /* Unsupported features. */
112 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
113 case PIPE_CAP_ANISOTROPIC_FILTER:
114 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
115 case PIPE_CAP_CUBE_MAP_ARRAY:
116 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
117 case PIPE_CAP_TEXTURE_SWIZZLE:
118 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
119 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
120 case PIPE_CAP_SEAMLESS_CUBE_MAP:
121 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
122 case PIPE_CAP_TGSI_INSTANCEID:
123 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
124 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
125 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
126 case PIPE_CAP_COMPUTE:
127 case PIPE_CAP_START_INSTANCE:
128 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
129 case PIPE_CAP_SHADER_STENCIL_EXPORT:
130 case PIPE_CAP_TGSI_TEXCOORD:
131 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
132 case PIPE_CAP_CONDITIONAL_RENDER:
133 case PIPE_CAP_PRIMITIVE_RESTART:
134 case PIPE_CAP_TEXTURE_MULTISAMPLE:
135 case PIPE_CAP_TEXTURE_BARRIER:
136 case PIPE_CAP_SM3:
137 case PIPE_CAP_INDEP_BLEND_ENABLE:
138 case PIPE_CAP_INDEP_BLEND_FUNC:
139 case PIPE_CAP_DEPTH_CLIP_DISABLE:
140 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
141 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
142 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
143 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
144 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
145 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
146 case PIPE_CAP_USER_VERTEX_BUFFERS:
147 case PIPE_CAP_USER_INDEX_BUFFERS:
148 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
149 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
150 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
151 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
152 case PIPE_CAP_TEXTURE_GATHER_SM5:
153 case PIPE_CAP_FAKE_SW_MSAA:
154 case PIPE_CAP_TEXTURE_QUERY_LOD:
155 case PIPE_CAP_SAMPLE_SHADING:
156 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
157 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
158 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
159 case PIPE_CAP_MAX_TEXEL_OFFSET:
160 case PIPE_CAP_MAX_VERTEX_STREAMS:
161 case PIPE_CAP_DRAW_INDIRECT:
162 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
163 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
164 return 0;
165
166 /* Stream output. */
167 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
168 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
169 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
170 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
171 return 0;
172
173 /* Geometry shader output, unsupported. */
174 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
175 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
176 return 0;
177
178 /* Texturing. */
179 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
180 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
181 return VC4_MAX_MIP_LEVELS;
182 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
183 /* Note: Not supported in hardware, just faking it. */
184 return 5;
185 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
186 return 0;
187
188 /* Render targets. */
189 case PIPE_CAP_MAX_RENDER_TARGETS:
190 return 1;
191
192 /* Queries. */
193 case PIPE_CAP_QUERY_TIME_ELAPSED:
194 case PIPE_CAP_QUERY_TIMESTAMP:
195 return 0;
196
197 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
198 case PIPE_CAP_MIN_TEXEL_OFFSET:
199 return 0;
200
201 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
202 return 2048;
203
204 case PIPE_CAP_ENDIANNESS:
205 return PIPE_ENDIAN_LITTLE;
206
207 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
208 return 64;
209
210 case PIPE_CAP_VENDOR_ID:
211 return 0x14E4;
212 case PIPE_CAP_DEVICE_ID:
213 return 0xFFFFFFFF;
214 case PIPE_CAP_ACCELERATED:
215 return 1;
216 case PIPE_CAP_VIDEO_MEMORY: {
217 uint64_t system_memory;
218
219 if (!os_get_total_physical_memory(&system_memory))
220 return 0;
221
222 return (int)(system_memory >> 20);
223 }
224 case PIPE_CAP_UMA:
225 return 1;
226
227 default:
228 fprintf(stderr, "unknown param %d\n", param);
229 return 0;
230 }
231 }
232
233 static float
234 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
235 {
236 switch (param) {
237 case PIPE_CAPF_MAX_LINE_WIDTH:
238 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
239 case PIPE_CAPF_MAX_POINT_WIDTH:
240 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
241 return 8192.0f;
242 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
243 return 0.0f;
244 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
245 return 0.0f;
246 case PIPE_CAPF_GUARD_BAND_LEFT:
247 case PIPE_CAPF_GUARD_BAND_TOP:
248 case PIPE_CAPF_GUARD_BAND_RIGHT:
249 case PIPE_CAPF_GUARD_BAND_BOTTOM:
250 return 0.0f;
251 default:
252 fprintf(stderr, "unknown paramf %d\n", param);
253 return 0;
254 }
255 }
256
257 static int
258 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
259 enum pipe_shader_cap param)
260 {
261 if (shader != PIPE_SHADER_VERTEX &&
262 shader != PIPE_SHADER_FRAGMENT) {
263 return 0;
264 }
265
266 /* this is probably not totally correct.. but it's a start: */
267 switch (param) {
268 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
269 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
270 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
271 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
272 return 16384;
273 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
274 return 0;
275 case PIPE_SHADER_CAP_MAX_INPUTS:
276 return 16;
277 case PIPE_SHADER_CAP_MAX_TEMPS:
278 return 64; /* Max native temporaries. */
279 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
280 return 64 * sizeof(float[4]);
281 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
282 return 1;
283 case PIPE_SHADER_CAP_MAX_PREDS:
284 return 0; /* nothing uses this */
285 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
286 return 0;
287 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
288 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
289 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
290 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
291 return 0;
292 case PIPE_SHADER_CAP_SUBROUTINES:
293 return 0;
294 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
295 return 0;
296 case PIPE_SHADER_CAP_INTEGERS:
297 return 1;
298 case PIPE_SHADER_CAP_DOUBLES:
299 return 0;
300 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
301 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
302 return VC4_MAX_TEXTURE_SAMPLERS;
303 case PIPE_SHADER_CAP_PREFERRED_IR:
304 return PIPE_SHADER_IR_TGSI;
305 default:
306 fprintf(stderr, "unknown shader param %d\n", param);
307 return 0;
308 }
309 return 0;
310 }
311
312 static boolean
313 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
314 enum pipe_format format,
315 enum pipe_texture_target target,
316 unsigned sample_count,
317 unsigned usage)
318 {
319 unsigned retval = 0;
320
321 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
322 (sample_count > 1) ||
323 !util_format_is_supported(format, usage)) {
324 return FALSE;
325 }
326
327 if (usage & PIPE_BIND_VERTEX_BUFFER &&
328 (format == PIPE_FORMAT_R32G32B32A32_FLOAT ||
329 format == PIPE_FORMAT_R32G32B32_FLOAT ||
330 format == PIPE_FORMAT_R32G32_FLOAT ||
331 format == PIPE_FORMAT_R32_FLOAT)) {
332 retval |= PIPE_BIND_VERTEX_BUFFER;
333 }
334
335 if ((usage & PIPE_BIND_RENDER_TARGET) &&
336 vc4_rt_format_supported(format)) {
337 retval |= PIPE_BIND_RENDER_TARGET;
338 }
339
340 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
341 (vc4_tex_format_supported(format))) {
342 retval |= PIPE_BIND_SAMPLER_VIEW;
343 }
344
345 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
346 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
347 format == PIPE_FORMAT_X8Z24_UNORM)) {
348 retval |= PIPE_BIND_DEPTH_STENCIL;
349 }
350
351 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
352 (format == PIPE_FORMAT_I8_UINT ||
353 format == PIPE_FORMAT_I16_UINT)) {
354 retval |= PIPE_BIND_INDEX_BUFFER;
355 }
356
357 if (usage & PIPE_BIND_TRANSFER_READ)
358 retval |= PIPE_BIND_TRANSFER_READ;
359 if (usage & PIPE_BIND_TRANSFER_WRITE)
360 retval |= PIPE_BIND_TRANSFER_WRITE;
361
362 #if 0
363 if (retval != usage) {
364 fprintf(stderr,
365 "not supported: format=%s, target=%d, sample_count=%d, "
366 "usage=0x%x, retval=0x%x\n", util_format_name(format),
367 target, sample_count, usage, retval);
368 }
369 #endif
370
371 return retval == usage;
372 }
373
374 struct pipe_screen *
375 vc4_screen_create(int fd)
376 {
377 struct vc4_screen *screen = CALLOC_STRUCT(vc4_screen);
378 struct pipe_screen *pscreen;
379
380 pscreen = &screen->base;
381
382 pscreen->destroy = vc4_screen_destroy;
383 pscreen->get_param = vc4_screen_get_param;
384 pscreen->get_paramf = vc4_screen_get_paramf;
385 pscreen->get_shader_param = vc4_screen_get_shader_param;
386 pscreen->context_create = vc4_context_create;
387 pscreen->is_format_supported = vc4_screen_is_format_supported;
388
389 screen->fd = fd;
390
391 vc4_debug = debug_get_option_vc4_debug();
392 if (vc4_debug & VC4_DEBUG_SHADERDB)
393 vc4_debug |= VC4_DEBUG_NORAST;
394
395 #if USE_VC4_SIMULATOR
396 vc4_simulator_init(screen);
397 #endif
398
399 vc4_resource_screen_init(pscreen);
400
401 pscreen->get_name = vc4_screen_get_name;
402 pscreen->get_vendor = vc4_screen_get_vendor;
403
404 return pscreen;
405 }
406
407 boolean
408 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
409 struct vc4_bo *bo,
410 unsigned stride,
411 struct winsys_handle *whandle)
412 {
413 whandle->stride = stride;
414
415 switch (whandle->type) {
416 case DRM_API_HANDLE_TYPE_SHARED:
417 return vc4_bo_flink(bo, &whandle->handle);
418 case DRM_API_HANDLE_TYPE_KMS:
419 whandle->handle = bo->handle;
420 return TRUE;
421 }
422
423 return FALSE;
424 }
425
426 struct vc4_bo *
427 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
428 struct winsys_handle *whandle,
429 unsigned *out_stride)
430 {
431 struct vc4_screen *screen = vc4_screen(pscreen);
432 struct vc4_bo *bo;
433
434 if (whandle->type != DRM_API_HANDLE_TYPE_SHARED) {
435 fprintf(stderr,
436 "Attempt to import unsupported handle type %d\n",
437 whandle->type);
438 return NULL;
439 }
440
441 bo = vc4_bo_open_name(screen, whandle->handle, whandle->stride);
442 if (!bo) {
443 fprintf(stderr, "Open name %d failed\n", whandle->handle);
444 return NULL;
445 }
446
447 *out_stride = whandle->stride;
448
449 return bo;
450 }