src/gallium/drivers/vc4/vc4_screen.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_cpu_detect.h"
  31 #include "util/u_debug.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_hash_table.h"
  35 #include "util/ralloc.h"
  36
  37 #include <xf86drm.h>
  38 #include "vc4_drm.h"
  39 #include "vc4_screen.h"
  40 #include "vc4_context.h"
  41 #include "vc4_resource.h"
  42
  43 static const struct debug_named_value debug_options[] = {
  44         { "cl",       VC4_DEBUG_CL,
  45           "Dump command list during creation" },
  46         { "qpu",      VC4_DEBUG_QPU,
  47           "Dump generated QPU instructions" },
  48         { "qir",      VC4_DEBUG_QIR,
  49           "Dump QPU IR during program compile" },
  50         { "nir",      VC4_DEBUG_NIR,
  51           "Dump NIR during program compile" },
  52         { "tgsi",     VC4_DEBUG_TGSI,
  53           "Dump TGSI during program compile" },
  54         { "shaderdb", VC4_DEBUG_SHADERDB,
  55           "Dump program compile information for shader-db analysis" },
  56         { "perf",     VC4_DEBUG_PERF,
  57           "Print during performance-related events" },
  58         { "norast",   VC4_DEBUG_NORAST,
  59           "Skip actual hardware execution of commands" },
  60         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
  61           "Flush after each draw call" },
  62         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
  63           "Wait for finish after each flush" },
  64 #if USE_VC4_SIMULATOR
  65         { "dump", VC4_DEBUG_DUMP,
  66           "Write a GPU command stream trace file" },
  67 #endif
  68         { NULL }
  69 };
  70
  71 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
  72 uint32_t vc4_debug;
  73
  74 static const char *
  75 vc4_screen_get_name(struct pipe_screen *pscreen)
  76 {
  77         struct vc4_screen *screen = vc4_screen(pscreen);
  78
  79         if (!screen->name) {
  80                 screen->name = ralloc_asprintf(screen,
  81                                                "VC4 V3D %d.%d",
  82                                                screen->v3d_ver / 10,
  83                                                screen->v3d_ver % 10);
  84         }
  85
  86         return screen->name;
  87 }
  88
  89 static const char *
  90 vc4_screen_get_vendor(struct pipe_screen *pscreen)
  91 {
  92         return "Broadcom";
  93 }
  94
  95 static void
  96 vc4_screen_destroy(struct pipe_screen *pscreen)
  97 {
  98         struct vc4_screen *screen = vc4_screen(pscreen);
  99
 100         util_hash_table_destroy(screen->bo_handles);
 101         vc4_bufmgr_destroy(pscreen);
 102         slab_destroy_parent(&screen->transfer_pool);
 103
 104 #if USE_VC4_SIMULATOR
 105         vc4_simulator_destroy(screen);
 106 #endif
 107
 108         close(screen->fd);
 109         ralloc_free(pscreen);
 110 }
 111
 112 static int
 113 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 114 {
 115         switch (param) {
 116                 /* Supported features (boolean caps). */
 117         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 118         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 119         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 120         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 121         case PIPE_CAP_NPOT_TEXTURES:
 122         case PIPE_CAP_SHAREABLE_SHADERS:
 123         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 124         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 125         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 126         case PIPE_CAP_TWO_SIDED_STENCIL:
 127         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 130                 return 1;
 131
 132                 /* lying for GL 2.0 */
 133         case PIPE_CAP_OCCLUSION_QUERY:
 134         case PIPE_CAP_POINT_SPRITE:
 135                 return 1;
 136
 137         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 138                 return 256;
 139
 140         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 141                 return 120;
 142
 143         case PIPE_CAP_MAX_VIEWPORTS:
 144                 return 1;
 145
 146         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 147         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 148                 return 1;
 149
 150         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 151         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 152                 return 1;
 153
 154                 /* Unsupported features. */
 155         case PIPE_CAP_ANISOTROPIC_FILTER:
 156         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 157         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 158         case PIPE_CAP_CUBE_MAP_ARRAY:
 159         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 160         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 161         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 162         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 163         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 164         case PIPE_CAP_TGSI_INSTANCEID:
 165         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 166         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 167         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 168         case PIPE_CAP_COMPUTE:
 169         case PIPE_CAP_START_INSTANCE:
 170         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 171         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 172         case PIPE_CAP_TGSI_TEXCOORD:
 173         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 174         case PIPE_CAP_CONDITIONAL_RENDER:
 175         case PIPE_CAP_PRIMITIVE_RESTART:
 176         case PIPE_CAP_TEXTURE_BARRIER:
 177         case PIPE_CAP_SM3:
 178         case PIPE_CAP_INDEP_BLEND_ENABLE:
 179         case PIPE_CAP_INDEP_BLEND_FUNC:
 180         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 181         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 182         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 183         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 184         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 185         case PIPE_CAP_USER_VERTEX_BUFFERS:
 186         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 187         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 188         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 189         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 190         case PIPE_CAP_TEXTURE_GATHER_SM5:
 191         case PIPE_CAP_FAKE_SW_MSAA:
 192         case PIPE_CAP_TEXTURE_QUERY_LOD:
 193         case PIPE_CAP_SAMPLE_SHADING:
 194         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 195         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 196         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 197         case PIPE_CAP_MAX_TEXEL_OFFSET:
 198         case PIPE_CAP_MAX_VERTEX_STREAMS:
 199         case PIPE_CAP_DRAW_INDIRECT:
 200         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 201         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 202         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 203         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 204         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 205         case PIPE_CAP_CLIP_HALFZ:
 206         case PIPE_CAP_VERTEXID_NOBASE:
 207         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 208         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 209         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 210         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 211         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 212         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 213         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 214         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 215         case PIPE_CAP_TGSI_TXQS:
 216         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 217         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 218         case PIPE_CAP_CLEAR_TEXTURE:
 219         case PIPE_CAP_DRAW_PARAMETERS:
 220         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 221         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 222         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 223         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 224         case PIPE_CAP_INVALIDATE_BUFFER:
 225         case PIPE_CAP_GENERATE_MIPMAP:
 226         case PIPE_CAP_STRING_MARKER:
 227         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 228         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 229         case PIPE_CAP_QUERY_MEMORY_INFO:
 230         case PIPE_CAP_PCI_GROUP:
 231         case PIPE_CAP_PCI_BUS:
 232         case PIPE_CAP_PCI_DEVICE:
 233         case PIPE_CAP_PCI_FUNCTION:
 234         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 235         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 236         case PIPE_CAP_CULL_DISTANCE:
 237         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 238         case PIPE_CAP_TGSI_VOTE:
 239         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 240         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 241         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 242         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 243         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 244         case PIPE_CAP_NATIVE_FENCE_FD:
 245         case PIPE_CAP_TGSI_FS_FBFETCH:
 246         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 247         case PIPE_CAP_DOUBLES:
 248         case PIPE_CAP_INT64:
 249         case PIPE_CAP_INT64_DIVMOD:
 250         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 251         case PIPE_CAP_TGSI_CLOCK:
 252         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 253         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 254         case PIPE_CAP_TGSI_BALLOT:
 255         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 256                 return 0;
 257
 258                 /* Stream output. */
 259         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 260         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 261         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 262         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 263         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 264                 return 0;
 265
 266                 /* Geometry shader output, unsupported. */
 267         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 268         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 269                 return 0;
 270
 271                 /* Texturing. */
 272         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 273         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 274                 return VC4_MAX_MIP_LEVELS;
 275         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 276                 /* Note: Not supported in hardware, just faking it. */
 277                 return 5;
 278         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 279                 return 0;
 280
 281                 /* Render targets. */
 282         case PIPE_CAP_MAX_RENDER_TARGETS:
 283                 return 1;
 284
 285                 /* Queries. */
 286         case PIPE_CAP_QUERY_TIME_ELAPSED:
 287         case PIPE_CAP_QUERY_TIMESTAMP:
 288                 return 0;
 289
 290         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 291         case PIPE_CAP_MIN_TEXEL_OFFSET:
 292                 return 0;
 293
 294         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 295                 return 2048;
 296
 297         case PIPE_CAP_ENDIANNESS:
 298                 return PIPE_ENDIAN_LITTLE;
 299
 300         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 301                 return 64;
 302
 303         case PIPE_CAP_VENDOR_ID:
 304                 return 0x14E4;
 305         case PIPE_CAP_DEVICE_ID:
 306                 return 0xFFFFFFFF;
 307         case PIPE_CAP_ACCELERATED:
 308                 return 1;
 309         case PIPE_CAP_VIDEO_MEMORY: {
 310                 uint64_t system_memory;
 311
 312                 if (!os_get_total_physical_memory(&system_memory))
 313                         return 0;
 314
 315                 return (int)(system_memory >> 20);
 316         }
 317         case PIPE_CAP_UMA:
 318                 return 1;
 319
 320         default:
 321                 fprintf(stderr, "unknown param %d\n", param);
 322                 return 0;
 323         }
 324 }
 325
 326 static float
 327 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 328 {
 329         switch (param) {
 330         case PIPE_CAPF_MAX_LINE_WIDTH:
 331         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 332                 return 32;
 333
 334         case PIPE_CAPF_MAX_POINT_WIDTH:
 335         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 336                 return 512.0f;
 337
 338         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 339                 return 0.0f;
 340         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 341                 return 0.0f;
 342         case PIPE_CAPF_GUARD_BAND_LEFT:
 343         case PIPE_CAPF_GUARD_BAND_TOP:
 344         case PIPE_CAPF_GUARD_BAND_RIGHT:
 345         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 346                 return 0.0f;
 347         default:
 348                 fprintf(stderr, "unknown paramf %d\n", param);
 349                 return 0;
 350         }
 351 }
 352
 353 static int
 354 vc4_screen_get_shader_param(struct pipe_screen *pscreen,
 355                             enum pipe_shader_type shader,
 356                             enum pipe_shader_cap param)
 357 {
 358         if (shader != PIPE_SHADER_VERTEX &&
 359             shader != PIPE_SHADER_FRAGMENT) {
 360                 return 0;
 361         }
 362
 363         /* this is probably not totally correct.. but it's a start: */
 364         switch (param) {
 365         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 366         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 367         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 368         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 369                 return 16384;
 370
 371         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 372                 return vc4_screen(pscreen)->has_control_flow;
 373
 374         case PIPE_SHADER_CAP_MAX_INPUTS:
 375                 return 8;
 376         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 377                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 378         case PIPE_SHADER_CAP_MAX_TEMPS:
 379                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 380         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 381                 return 16 * 1024 * sizeof(float);
 382         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 383                 return 1;
 384         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 385                 return 0;
 386         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 387         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 388         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 389                 return 0;
 390         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 391                 return 1;
 392         case PIPE_SHADER_CAP_SUBROUTINES:
 393                 return 0;
 394         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 395                 return 0;
 396         case PIPE_SHADER_CAP_INTEGERS:
 397                 return 1;
 398         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 399         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 400         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 401         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 402                 return 0;
 403         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 404         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 405                 return VC4_MAX_TEXTURE_SAMPLERS;
 406         case PIPE_SHADER_CAP_PREFERRED_IR:
 407                 return PIPE_SHADER_IR_NIR;
 408         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 409                 return 0;
 410         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 411                 return 32;
 412         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 413         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 414         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 415         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 416                 return 0;
 417         default:
 418                 fprintf(stderr, "unknown shader param %d\n", param);
 419                 return 0;
 420         }
 421         return 0;
 422 }
 423
 424 static boolean
 425 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
 426                                enum pipe_format format,
 427                                enum pipe_texture_target target,
 428                                unsigned sample_count,
 429                                unsigned usage)
 430 {
 431         struct vc4_screen *screen = vc4_screen(pscreen);
 432         unsigned retval = 0;
 433
 434         if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
 435                 return FALSE;
 436
 437         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 438             !util_format_is_supported(format, usage)) {
 439                 return FALSE;
 440         }
 441
 442         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 443                 switch (format) {
 444                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 445                 case PIPE_FORMAT_R32G32B32_FLOAT:
 446                 case PIPE_FORMAT_R32G32_FLOAT:
 447                 case PIPE_FORMAT_R32_FLOAT:
 448                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 449                 case PIPE_FORMAT_R32G32B32_SNORM:
 450                 case PIPE_FORMAT_R32G32_SNORM:
 451                 case PIPE_FORMAT_R32_SNORM:
 452                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 453                 case PIPE_FORMAT_R32G32B32_SSCALED:
 454                 case PIPE_FORMAT_R32G32_SSCALED:
 455                 case PIPE_FORMAT_R32_SSCALED:
 456                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 457                 case PIPE_FORMAT_R16G16B16_UNORM:
 458                 case PIPE_FORMAT_R16G16_UNORM:
 459                 case PIPE_FORMAT_R16_UNORM:
 460                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 461                 case PIPE_FORMAT_R16G16B16_SNORM:
 462                 case PIPE_FORMAT_R16G16_SNORM:
 463                 case PIPE_FORMAT_R16_SNORM:
 464                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 465                 case PIPE_FORMAT_R16G16B16_USCALED:
 466                 case PIPE_FORMAT_R16G16_USCALED:
 467                 case PIPE_FORMAT_R16_USCALED:
 468                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 469                 case PIPE_FORMAT_R16G16B16_SSCALED:
 470                 case PIPE_FORMAT_R16G16_SSCALED:
 471                 case PIPE_FORMAT_R16_SSCALED:
 472                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 473                 case PIPE_FORMAT_R8G8B8_UNORM:
 474                 case PIPE_FORMAT_R8G8_UNORM:
 475                 case PIPE_FORMAT_R8_UNORM:
 476                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 477                 case PIPE_FORMAT_R8G8B8_SNORM:
 478                 case PIPE_FORMAT_R8G8_SNORM:
 479                 case PIPE_FORMAT_R8_SNORM:
 480                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 481                 case PIPE_FORMAT_R8G8B8_USCALED:
 482                 case PIPE_FORMAT_R8G8_USCALED:
 483                 case PIPE_FORMAT_R8_USCALED:
 484                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 485                 case PIPE_FORMAT_R8G8B8_SSCALED:
 486                 case PIPE_FORMAT_R8G8_SSCALED:
 487                 case PIPE_FORMAT_R8_SSCALED:
 488                         retval |= PIPE_BIND_VERTEX_BUFFER;
 489                         break;
 490                 default:
 491                         break;
 492                 }
 493         }
 494
 495         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 496             vc4_rt_format_supported(format)) {
 497                 retval |= PIPE_BIND_RENDER_TARGET;
 498         }
 499
 500         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 501             vc4_tex_format_supported(format) &&
 502             (format != PIPE_FORMAT_ETC1_RGB8 || screen->has_etc1)) {
 503                 retval |= PIPE_BIND_SAMPLER_VIEW;
 504         }
 505
 506         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 507             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 508              format == PIPE_FORMAT_X8Z24_UNORM)) {
 509                 retval |= PIPE_BIND_DEPTH_STENCIL;
 510         }
 511
 512         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 513             (format == PIPE_FORMAT_I8_UINT ||
 514              format == PIPE_FORMAT_I16_UINT)) {
 515                 retval |= PIPE_BIND_INDEX_BUFFER;
 516         }
 517
 518 #if 0
 519         if (retval != usage) {
 520                 fprintf(stderr,
 521                         "not supported: format=%s, target=%d, sample_count=%d, "
 522                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
 523                         target, sample_count, usage, retval);
 524         }
 525 #endif
 526
 527         return retval == usage;
 528 }
 529
 530 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 531
 532 static unsigned handle_hash(void *key)
 533 {
 534     return PTR_TO_UINT(key);
 535 }
 536
 537 static int handle_compare(void *key1, void *key2)
 538 {
 539     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 540 }
 541
 542 static bool
 543 vc4_has_feature(struct vc4_screen *screen, uint32_t feature)
 544 {
 545         struct drm_vc4_get_param p = {
 546                 .param = feature,
 547         };
 548         int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &p);
 549
 550         if (ret != 0)
 551                 return false;
 552
 553         return p.value;
 554 }
 555
 556 static bool
 557 vc4_get_chip_info(struct vc4_screen *screen)
 558 {
 559         struct drm_vc4_get_param ident0 = {
 560                 .param = DRM_VC4_PARAM_V3D_IDENT0,
 561         };
 562         struct drm_vc4_get_param ident1 = {
 563                 .param = DRM_VC4_PARAM_V3D_IDENT1,
 564         };
 565         int ret;
 566
 567         ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident0);
 568         if (ret != 0) {
 569                 if (errno == EINVAL) {
 570                         /* Backwards compatibility with 2835 kernels which
 571                          * only do V3D 2.1.
 572                          */
 573                         screen->v3d_ver = 21;
 574                         return true;
 575                 } else {
 576                         fprintf(stderr, "Couldn't get V3D IDENT0: %s\n",
 577                                 strerror(errno));
 578                         return false;
 579                 }
 580         }
 581         ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident1);
 582         if (ret != 0) {
 583                 fprintf(stderr, "Couldn't get V3D IDENT1: %s\n",
 584                         strerror(errno));
 585                 return false;
 586         }
 587
 588         uint32_t major = (ident0.value >> 24) & 0xff;
 589         uint32_t minor = (ident1.value >> 0) & 0xf;
 590         screen->v3d_ver = major * 10 + minor;
 591
 592         if (screen->v3d_ver != 21 && screen->v3d_ver != 26) {
 593                 fprintf(stderr,
 594                         "V3D %d.%d not supported by this version of Mesa.\n",
 595                         screen->v3d_ver / 10,
 596                         screen->v3d_ver % 10);
 597                 return false;
 598         }
 599
 600         return true;
 601 }
 602
 603 struct pipe_screen *
 604 vc4_screen_create(int fd)
 605 {
 606         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
 607         struct pipe_screen *pscreen;
 608
 609         pscreen = &screen->base;
 610
 611         pscreen->destroy = vc4_screen_destroy;
 612         pscreen->get_param = vc4_screen_get_param;
 613         pscreen->get_paramf = vc4_screen_get_paramf;
 614         pscreen->get_shader_param = vc4_screen_get_shader_param;
 615         pscreen->context_create = vc4_context_create;
 616         pscreen->is_format_supported = vc4_screen_is_format_supported;
 617
 618         screen->fd = fd;
 619         list_inithead(&screen->bo_cache.time_list);
 620         (void) mtx_init(&screen->bo_handles_mutex, mtx_plain);
 621         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 622
 623         screen->has_control_flow =
 624                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_BRANCHES);
 625         screen->has_etc1 =
 626                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_ETC1);
 627         screen->has_threaded_fs =
 628                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_THREADED_FS);
 629
 630         if (!vc4_get_chip_info(screen))
 631                 goto fail;
 632
 633         util_cpu_detect();
 634
 635         slab_create_parent(&screen->transfer_pool, sizeof(struct vc4_transfer), 16);
 636
 637         vc4_fence_init(screen);
 638
 639         vc4_debug = debug_get_option_vc4_debug();
 640         if (vc4_debug & VC4_DEBUG_SHADERDB)
 641                 vc4_debug |= VC4_DEBUG_NORAST;
 642
 643 #if USE_VC4_SIMULATOR
 644         vc4_simulator_init(screen);
 645 #endif
 646
 647         vc4_resource_screen_init(pscreen);
 648
 649         pscreen->get_name = vc4_screen_get_name;
 650         pscreen->get_vendor = vc4_screen_get_vendor;
 651         pscreen->get_device_vendor = vc4_screen_get_vendor;
 652         pscreen->get_compiler_options = vc4_screen_get_compiler_options;
 653
 654         return pscreen;
 655
 656 fail:
 657         close(fd);
 658         ralloc_free(pscreen);
 659         return NULL;
 660 }
 661
 662 boolean
 663 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
 664                          struct vc4_bo *bo,
 665                          unsigned stride,
 666                          struct winsys_handle *whandle)
 667 {
 668         whandle->stride = stride;
 669
 670         /* If we're passing some reference to our BO out to some other part of
 671          * the system, then we can't do any optimizations about only us being
 672          * the ones seeing it (like BO caching or shadow update avoidance).
 673          */
 674         bo->private = false;
 675
 676         switch (whandle->type) {
 677         case DRM_API_HANDLE_TYPE_SHARED:
 678                 return vc4_bo_flink(bo, &whandle->handle);
 679         case DRM_API_HANDLE_TYPE_KMS:
 680                 whandle->handle = bo->handle;
 681                 return TRUE;
 682         case DRM_API_HANDLE_TYPE_FD:
 683                 whandle->handle = vc4_bo_get_dmabuf(bo);
 684                 return whandle->handle != -1;
 685         }
 686
 687         return FALSE;
 688 }
 689
 690 struct vc4_bo *
 691 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
 692                           struct winsys_handle *whandle)
 693 {
 694         struct vc4_screen *screen = vc4_screen(pscreen);
 695
 696         if (whandle->offset != 0) {
 697                 fprintf(stderr,
 698                         "Attempt to import unsupported winsys offset %u\n",
 699                         whandle->offset);
 700                 return NULL;
 701         }
 702
 703         switch (whandle->type) {
 704         case DRM_API_HANDLE_TYPE_SHARED:
 705                 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
 706         case DRM_API_HANDLE_TYPE_FD:
 707                 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
 708         default:
 709                 fprintf(stderr,
 710                         "Attempt to import unsupported handle type %d\n",
 711                         whandle->type);
 712                 return NULL;
 713         }
 714 }