gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all drivers
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40 { "cl", VC4_DEBUG_CL,
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "nir", VC4_DEBUG_NIR,
47 "Dump NIR during program compile" },
48 { "tgsi", VC4_DEBUG_TGSI,
49 "Dump TGSI during program compile" },
50 { "shaderdb", VC4_DEBUG_SHADERDB,
51 "Dump program compile information for shader-db analysis" },
52 { "perf", VC4_DEBUG_PERF,
53 "Print during performance-related events" },
54 { "norast", VC4_DEBUG_NORAST,
55 "Skip actual hardware execution of commands" },
56 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57 "Flush after each draw call" },
58 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59 "Wait for finish after each flush" },
60 #if USE_VC4_SIMULATOR
61 { "dump", VC4_DEBUG_DUMP,
62 "Write a GPU command stream trace file" },
63 #endif
64 { NULL }
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
68 uint32_t vc4_debug;
69
70 static const char *
71 vc4_screen_get_name(struct pipe_screen *pscreen)
72 {
73 return "VC4";
74 }
75
76 static const char *
77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
78 {
79 return "Broadcom";
80 }
81
82 static void
83 vc4_screen_destroy(struct pipe_screen *pscreen)
84 {
85 vc4_bufmgr_destroy(pscreen);
86 ralloc_free(pscreen);
87 }
88
89 static int
90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
91 {
92 switch (param) {
93 /* Supported features (boolean caps). */
94 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
95 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
96 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
97 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
98 case PIPE_CAP_NPOT_TEXTURES:
99 case PIPE_CAP_SHAREABLE_SHADERS:
100 case PIPE_CAP_USER_CONSTANT_BUFFERS:
101 case PIPE_CAP_TEXTURE_SHADOW_MAP:
102 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
103 case PIPE_CAP_TWO_SIDED_STENCIL:
104 case PIPE_CAP_USER_INDEX_BUFFERS:
105 case PIPE_CAP_TEXTURE_MULTISAMPLE:
106 case PIPE_CAP_TEXTURE_SWIZZLE:
107 return 1;
108
109 /* lying for GL 2.0 */
110 case PIPE_CAP_OCCLUSION_QUERY:
111 case PIPE_CAP_POINT_SPRITE:
112 return 1;
113
114 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
115 return 256;
116
117 case PIPE_CAP_GLSL_FEATURE_LEVEL:
118 return 120;
119
120 case PIPE_CAP_MAX_VIEWPORTS:
121 return 1;
122
123 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
124 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
125 return 1;
126
127 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
128 return 1;
129
130 /* Unsupported features. */
131 case PIPE_CAP_ANISOTROPIC_FILTER:
132 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
133 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
134 case PIPE_CAP_CUBE_MAP_ARRAY:
135 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
136 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
137 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
138 case PIPE_CAP_SEAMLESS_CUBE_MAP:
139 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
140 case PIPE_CAP_TGSI_INSTANCEID:
141 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
142 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
143 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
144 case PIPE_CAP_COMPUTE:
145 case PIPE_CAP_START_INSTANCE:
146 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
147 case PIPE_CAP_SHADER_STENCIL_EXPORT:
148 case PIPE_CAP_TGSI_TEXCOORD:
149 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
150 case PIPE_CAP_CONDITIONAL_RENDER:
151 case PIPE_CAP_PRIMITIVE_RESTART:
152 case PIPE_CAP_TEXTURE_BARRIER:
153 case PIPE_CAP_SM3:
154 case PIPE_CAP_INDEP_BLEND_ENABLE:
155 case PIPE_CAP_INDEP_BLEND_FUNC:
156 case PIPE_CAP_DEPTH_CLIP_DISABLE:
157 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
158 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
159 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
160 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
161 case PIPE_CAP_USER_VERTEX_BUFFERS:
162 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
163 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
164 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
165 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
166 case PIPE_CAP_TEXTURE_GATHER_SM5:
167 case PIPE_CAP_FAKE_SW_MSAA:
168 case PIPE_CAP_TEXTURE_QUERY_LOD:
169 case PIPE_CAP_SAMPLE_SHADING:
170 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
171 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
172 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
173 case PIPE_CAP_MAX_TEXEL_OFFSET:
174 case PIPE_CAP_MAX_VERTEX_STREAMS:
175 case PIPE_CAP_DRAW_INDIRECT:
176 case PIPE_CAP_MULTI_DRAW_INDIRECT:
177 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
178 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
179 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
180 case PIPE_CAP_SAMPLER_VIEW_TARGET:
181 case PIPE_CAP_CLIP_HALFZ:
182 case PIPE_CAP_VERTEXID_NOBASE:
183 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
184 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
185 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
186 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
187 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
188 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
189 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
190 case PIPE_CAP_DEPTH_BOUNDS_TEST:
191 case PIPE_CAP_TGSI_TXQS:
192 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
193 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
194 case PIPE_CAP_CLEAR_TEXTURE:
195 case PIPE_CAP_DRAW_PARAMETERS:
196 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
197 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
198 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
199 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
200 case PIPE_CAP_INVALIDATE_BUFFER:
201 case PIPE_CAP_GENERATE_MIPMAP:
202 case PIPE_CAP_STRING_MARKER:
203 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
204 case PIPE_CAP_QUERY_BUFFER_OBJECT:
205 case PIPE_CAP_QUERY_MEMORY_INFO:
206 case PIPE_CAP_PCI_GROUP:
207 case PIPE_CAP_PCI_BUS:
208 case PIPE_CAP_PCI_DEVICE:
209 case PIPE_CAP_PCI_FUNCTION:
210 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
211 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
212 case PIPE_CAP_CULL_DISTANCE:
213 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
214 case PIPE_CAP_TGSI_VOTE:
215 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
216 return 0;
217
218 /* Stream output. */
219 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
220 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
221 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
222 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
223 return 0;
224
225 /* Geometry shader output, unsupported. */
226 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
227 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
228 return 0;
229
230 /* Texturing. */
231 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
232 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
233 return VC4_MAX_MIP_LEVELS;
234 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
235 /* Note: Not supported in hardware, just faking it. */
236 return 5;
237 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
238 return 0;
239
240 /* Render targets. */
241 case PIPE_CAP_MAX_RENDER_TARGETS:
242 return 1;
243
244 /* Queries. */
245 case PIPE_CAP_QUERY_TIME_ELAPSED:
246 case PIPE_CAP_QUERY_TIMESTAMP:
247 return 0;
248
249 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
250 case PIPE_CAP_MIN_TEXEL_OFFSET:
251 return 0;
252
253 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
254 return 2048;
255
256 case PIPE_CAP_ENDIANNESS:
257 return PIPE_ENDIAN_LITTLE;
258
259 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
260 return 64;
261
262 case PIPE_CAP_VENDOR_ID:
263 return 0x14E4;
264 case PIPE_CAP_DEVICE_ID:
265 return 0xFFFFFFFF;
266 case PIPE_CAP_ACCELERATED:
267 return 1;
268 case PIPE_CAP_VIDEO_MEMORY: {
269 uint64_t system_memory;
270
271 if (!os_get_total_physical_memory(&system_memory))
272 return 0;
273
274 return (int)(system_memory >> 20);
275 }
276 case PIPE_CAP_UMA:
277 return 1;
278
279 default:
280 fprintf(stderr, "unknown param %d\n", param);
281 return 0;
282 }
283 }
284
285 static float
286 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
287 {
288 switch (param) {
289 case PIPE_CAPF_MAX_LINE_WIDTH:
290 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
291 return 32;
292
293 case PIPE_CAPF_MAX_POINT_WIDTH:
294 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
295 return 512.0f;
296
297 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
298 return 0.0f;
299 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
300 return 0.0f;
301 case PIPE_CAPF_GUARD_BAND_LEFT:
302 case PIPE_CAPF_GUARD_BAND_TOP:
303 case PIPE_CAPF_GUARD_BAND_RIGHT:
304 case PIPE_CAPF_GUARD_BAND_BOTTOM:
305 return 0.0f;
306 default:
307 fprintf(stderr, "unknown paramf %d\n", param);
308 return 0;
309 }
310 }
311
312 static int
313 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
314 enum pipe_shader_cap param)
315 {
316 if (shader != PIPE_SHADER_VERTEX &&
317 shader != PIPE_SHADER_FRAGMENT) {
318 return 0;
319 }
320
321 /* this is probably not totally correct.. but it's a start: */
322 switch (param) {
323 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
324 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
325 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
326 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
327 return 16384;
328 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
329 return 0;
330 case PIPE_SHADER_CAP_MAX_INPUTS:
331 if (shader == PIPE_SHADER_FRAGMENT)
332 return 8;
333 else
334 return 16;
335 case PIPE_SHADER_CAP_MAX_OUTPUTS:
336 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
337 case PIPE_SHADER_CAP_MAX_TEMPS:
338 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
339 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
340 return 16 * 1024 * sizeof(float);
341 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
342 return 1;
343 case PIPE_SHADER_CAP_MAX_PREDS:
344 return 0; /* nothing uses this */
345 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
346 return 0;
347 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
348 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
349 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
350 return 0;
351 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
352 return 1;
353 case PIPE_SHADER_CAP_SUBROUTINES:
354 return 0;
355 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
356 return 0;
357 case PIPE_SHADER_CAP_INTEGERS:
358 return 1;
359 case PIPE_SHADER_CAP_DOUBLES:
360 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
361 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
362 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
363 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
364 return 0;
365 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
366 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
367 return VC4_MAX_TEXTURE_SAMPLERS;
368 case PIPE_SHADER_CAP_PREFERRED_IR:
369 return PIPE_SHADER_IR_TGSI;
370 case PIPE_SHADER_CAP_SUPPORTED_IRS:
371 return 0;
372 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
373 return 32;
374 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
375 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
376 return 0;
377 default:
378 fprintf(stderr, "unknown shader param %d\n", param);
379 return 0;
380 }
381 return 0;
382 }
383
384 static boolean
385 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
386 enum pipe_format format,
387 enum pipe_texture_target target,
388 unsigned sample_count,
389 unsigned usage)
390 {
391 unsigned retval = 0;
392
393 if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
394 return FALSE;
395
396 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
397 !util_format_is_supported(format, usage)) {
398 return FALSE;
399 }
400
401 if (usage & PIPE_BIND_VERTEX_BUFFER) {
402 switch (format) {
403 case PIPE_FORMAT_R32G32B32A32_FLOAT:
404 case PIPE_FORMAT_R32G32B32_FLOAT:
405 case PIPE_FORMAT_R32G32_FLOAT:
406 case PIPE_FORMAT_R32_FLOAT:
407 case PIPE_FORMAT_R32G32B32A32_SNORM:
408 case PIPE_FORMAT_R32G32B32_SNORM:
409 case PIPE_FORMAT_R32G32_SNORM:
410 case PIPE_FORMAT_R32_SNORM:
411 case PIPE_FORMAT_R32G32B32A32_SSCALED:
412 case PIPE_FORMAT_R32G32B32_SSCALED:
413 case PIPE_FORMAT_R32G32_SSCALED:
414 case PIPE_FORMAT_R32_SSCALED:
415 case PIPE_FORMAT_R16G16B16A16_UNORM:
416 case PIPE_FORMAT_R16G16B16_UNORM:
417 case PIPE_FORMAT_R16G16_UNORM:
418 case PIPE_FORMAT_R16_UNORM:
419 case PIPE_FORMAT_R16G16B16A16_SNORM:
420 case PIPE_FORMAT_R16G16B16_SNORM:
421 case PIPE_FORMAT_R16G16_SNORM:
422 case PIPE_FORMAT_R16_SNORM:
423 case PIPE_FORMAT_R16G16B16A16_USCALED:
424 case PIPE_FORMAT_R16G16B16_USCALED:
425 case PIPE_FORMAT_R16G16_USCALED:
426 case PIPE_FORMAT_R16_USCALED:
427 case PIPE_FORMAT_R16G16B16A16_SSCALED:
428 case PIPE_FORMAT_R16G16B16_SSCALED:
429 case PIPE_FORMAT_R16G16_SSCALED:
430 case PIPE_FORMAT_R16_SSCALED:
431 case PIPE_FORMAT_R8G8B8A8_UNORM:
432 case PIPE_FORMAT_R8G8B8_UNORM:
433 case PIPE_FORMAT_R8G8_UNORM:
434 case PIPE_FORMAT_R8_UNORM:
435 case PIPE_FORMAT_R8G8B8A8_SNORM:
436 case PIPE_FORMAT_R8G8B8_SNORM:
437 case PIPE_FORMAT_R8G8_SNORM:
438 case PIPE_FORMAT_R8_SNORM:
439 case PIPE_FORMAT_R8G8B8A8_USCALED:
440 case PIPE_FORMAT_R8G8B8_USCALED:
441 case PIPE_FORMAT_R8G8_USCALED:
442 case PIPE_FORMAT_R8_USCALED:
443 case PIPE_FORMAT_R8G8B8A8_SSCALED:
444 case PIPE_FORMAT_R8G8B8_SSCALED:
445 case PIPE_FORMAT_R8G8_SSCALED:
446 case PIPE_FORMAT_R8_SSCALED:
447 retval |= PIPE_BIND_VERTEX_BUFFER;
448 break;
449 default:
450 break;
451 }
452 }
453
454 if ((usage & PIPE_BIND_RENDER_TARGET) &&
455 vc4_rt_format_supported(format)) {
456 retval |= PIPE_BIND_RENDER_TARGET;
457 }
458
459 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
460 vc4_tex_format_supported(format)) {
461 retval |= PIPE_BIND_SAMPLER_VIEW;
462 }
463
464 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
465 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
466 format == PIPE_FORMAT_X8Z24_UNORM)) {
467 retval |= PIPE_BIND_DEPTH_STENCIL;
468 }
469
470 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
471 (format == PIPE_FORMAT_I8_UINT ||
472 format == PIPE_FORMAT_I16_UINT)) {
473 retval |= PIPE_BIND_INDEX_BUFFER;
474 }
475
476 if (usage & PIPE_BIND_TRANSFER_READ)
477 retval |= PIPE_BIND_TRANSFER_READ;
478 if (usage & PIPE_BIND_TRANSFER_WRITE)
479 retval |= PIPE_BIND_TRANSFER_WRITE;
480
481 #if 0
482 if (retval != usage) {
483 fprintf(stderr,
484 "not supported: format=%s, target=%d, sample_count=%d, "
485 "usage=0x%x, retval=0x%x\n", util_format_name(format),
486 target, sample_count, usage, retval);
487 }
488 #endif
489
490 return retval == usage;
491 }
492
493 struct pipe_screen *
494 vc4_screen_create(int fd)
495 {
496 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
497 struct pipe_screen *pscreen;
498
499 pscreen = &screen->base;
500
501 pscreen->destroy = vc4_screen_destroy;
502 pscreen->get_param = vc4_screen_get_param;
503 pscreen->get_paramf = vc4_screen_get_paramf;
504 pscreen->get_shader_param = vc4_screen_get_shader_param;
505 pscreen->context_create = vc4_context_create;
506 pscreen->is_format_supported = vc4_screen_is_format_supported;
507
508 screen->fd = fd;
509 list_inithead(&screen->bo_cache.time_list);
510
511 vc4_fence_init(screen);
512
513 vc4_debug = debug_get_option_vc4_debug();
514 if (vc4_debug & VC4_DEBUG_SHADERDB)
515 vc4_debug |= VC4_DEBUG_NORAST;
516
517 #if USE_VC4_SIMULATOR
518 vc4_simulator_init(screen);
519 #endif
520
521 vc4_resource_screen_init(pscreen);
522
523 pscreen->get_name = vc4_screen_get_name;
524 pscreen->get_vendor = vc4_screen_get_vendor;
525 pscreen->get_device_vendor = vc4_screen_get_vendor;
526
527 return pscreen;
528 }
529
530 boolean
531 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
532 struct vc4_bo *bo,
533 unsigned stride,
534 struct winsys_handle *whandle)
535 {
536 whandle->stride = stride;
537
538 /* If we're passing some reference to our BO out to some other part of
539 * the system, then we can't do any optimizations about only us being
540 * the ones seeing it (like BO caching or shadow update avoidance).
541 */
542 bo->private = false;
543
544 switch (whandle->type) {
545 case DRM_API_HANDLE_TYPE_SHARED:
546 return vc4_bo_flink(bo, &whandle->handle);
547 case DRM_API_HANDLE_TYPE_KMS:
548 whandle->handle = bo->handle;
549 return TRUE;
550 case DRM_API_HANDLE_TYPE_FD:
551 whandle->handle = vc4_bo_get_dmabuf(bo);
552 return whandle->handle != -1;
553 }
554
555 return FALSE;
556 }
557
558 struct vc4_bo *
559 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
560 struct winsys_handle *whandle)
561 {
562 struct vc4_screen *screen = vc4_screen(pscreen);
563
564 if (whandle->offset != 0) {
565 fprintf(stderr,
566 "Attempt to import unsupported winsys offset %u\n",
567 whandle->offset);
568 return NULL;
569 }
570
571 switch (whandle->type) {
572 case DRM_API_HANDLE_TYPE_SHARED:
573 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
574 case DRM_API_HANDLE_TYPE_FD:
575 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
576 default:
577 fprintf(stderr,
578 "Attempt to import unsupported handle type %d\n",
579 whandle->type);
580 return NULL;
581 }
582 }