gallium: add PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40 { "cl", VC4_DEBUG_CL,
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "nir", VC4_DEBUG_NIR,
47 "Dump NIR during program compile" },
48 { "tgsi", VC4_DEBUG_TGSI,
49 "Dump TGSI during program compile" },
50 { "shaderdb", VC4_DEBUG_SHADERDB,
51 "Dump program compile information for shader-db analysis" },
52 { "perf", VC4_DEBUG_PERF,
53 "Print during performance-related events" },
54 { "norast", VC4_DEBUG_NORAST,
55 "Skip actual hardware execution of commands" },
56 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57 "Flush after each draw call" },
58 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59 "Wait for finish after each flush" },
60 #if USE_VC4_SIMULATOR
61 { "dump", VC4_DEBUG_DUMP,
62 "Write a GPU command stream trace file" },
63 #endif
64 { NULL }
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
68 uint32_t vc4_debug;
69
70 static const char *
71 vc4_screen_get_name(struct pipe_screen *pscreen)
72 {
73 return "VC4";
74 }
75
76 static const char *
77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
78 {
79 return "Broadcom";
80 }
81
82 static void
83 vc4_screen_destroy(struct pipe_screen *pscreen)
84 {
85 vc4_bufmgr_destroy(pscreen);
86 ralloc_free(pscreen);
87 }
88
89 static int
90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
91 {
92 switch (param) {
93 /* Supported features (boolean caps). */
94 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
95 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_USER_CONSTANT_BUFFERS:
98 case PIPE_CAP_TEXTURE_SHADOW_MAP:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_TWO_SIDED_STENCIL:
101 case PIPE_CAP_USER_INDEX_BUFFERS:
102 case PIPE_CAP_TEXTURE_MULTISAMPLE:
103 case PIPE_CAP_TEXTURE_SWIZZLE:
104 return 1;
105
106 /* lying for GL 2.0 */
107 case PIPE_CAP_OCCLUSION_QUERY:
108 case PIPE_CAP_POINT_SPRITE:
109 return 1;
110
111 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
112 return 256;
113
114 case PIPE_CAP_GLSL_FEATURE_LEVEL:
115 return 120;
116
117 case PIPE_CAP_MAX_VIEWPORTS:
118 return 1;
119
120 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
121 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
122 return 1;
123
124 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
125 return 1;
126
127 /* Unsupported features. */
128 case PIPE_CAP_ANISOTROPIC_FILTER:
129 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
130 case PIPE_CAP_CUBE_MAP_ARRAY:
131 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
132 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
133 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
134 case PIPE_CAP_SEAMLESS_CUBE_MAP:
135 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
136 case PIPE_CAP_TGSI_INSTANCEID:
137 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
138 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
139 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
140 case PIPE_CAP_COMPUTE:
141 case PIPE_CAP_START_INSTANCE:
142 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
143 case PIPE_CAP_SHADER_STENCIL_EXPORT:
144 case PIPE_CAP_TGSI_TEXCOORD:
145 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
146 case PIPE_CAP_CONDITIONAL_RENDER:
147 case PIPE_CAP_PRIMITIVE_RESTART:
148 case PIPE_CAP_TEXTURE_BARRIER:
149 case PIPE_CAP_SM3:
150 case PIPE_CAP_INDEP_BLEND_ENABLE:
151 case PIPE_CAP_INDEP_BLEND_FUNC:
152 case PIPE_CAP_DEPTH_CLIP_DISABLE:
153 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
154 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
155 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
156 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
157 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
158 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
159 case PIPE_CAP_USER_VERTEX_BUFFERS:
160 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
161 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
162 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
163 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
164 case PIPE_CAP_TEXTURE_GATHER_SM5:
165 case PIPE_CAP_FAKE_SW_MSAA:
166 case PIPE_CAP_TEXTURE_QUERY_LOD:
167 case PIPE_CAP_SAMPLE_SHADING:
168 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
169 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
170 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
171 case PIPE_CAP_MAX_TEXEL_OFFSET:
172 case PIPE_CAP_MAX_VERTEX_STREAMS:
173 case PIPE_CAP_DRAW_INDIRECT:
174 case PIPE_CAP_MULTI_DRAW_INDIRECT:
175 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
176 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
177 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
178 case PIPE_CAP_SAMPLER_VIEW_TARGET:
179 case PIPE_CAP_CLIP_HALFZ:
180 case PIPE_CAP_VERTEXID_NOBASE:
181 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
182 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
183 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
184 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
185 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
186 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
187 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
188 case PIPE_CAP_DEPTH_BOUNDS_TEST:
189 case PIPE_CAP_TGSI_TXQS:
190 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
191 case PIPE_CAP_SHAREABLE_SHADERS:
192 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
193 case PIPE_CAP_CLEAR_TEXTURE:
194 case PIPE_CAP_DRAW_PARAMETERS:
195 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
196 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
197 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
198 return 0;
199
200 /* Stream output. */
201 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
202 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
203 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
204 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
205 return 0;
206
207 /* Geometry shader output, unsupported. */
208 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
209 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
210 return 0;
211
212 /* Texturing. */
213 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
214 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
215 return VC4_MAX_MIP_LEVELS;
216 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
217 /* Note: Not supported in hardware, just faking it. */
218 return 5;
219 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
220 return 0;
221
222 /* Render targets. */
223 case PIPE_CAP_MAX_RENDER_TARGETS:
224 return 1;
225
226 /* Queries. */
227 case PIPE_CAP_QUERY_TIME_ELAPSED:
228 case PIPE_CAP_QUERY_TIMESTAMP:
229 return 0;
230
231 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
232 case PIPE_CAP_MIN_TEXEL_OFFSET:
233 return 0;
234
235 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
236 return 2048;
237
238 case PIPE_CAP_ENDIANNESS:
239 return PIPE_ENDIAN_LITTLE;
240
241 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
242 return 64;
243
244 case PIPE_CAP_VENDOR_ID:
245 return 0x14E4;
246 case PIPE_CAP_DEVICE_ID:
247 return 0xFFFFFFFF;
248 case PIPE_CAP_ACCELERATED:
249 return 1;
250 case PIPE_CAP_VIDEO_MEMORY: {
251 uint64_t system_memory;
252
253 if (!os_get_total_physical_memory(&system_memory))
254 return 0;
255
256 return (int)(system_memory >> 20);
257 }
258 case PIPE_CAP_UMA:
259 return 1;
260
261 default:
262 fprintf(stderr, "unknown param %d\n", param);
263 return 0;
264 }
265 }
266
267 static float
268 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
269 {
270 switch (param) {
271 case PIPE_CAPF_MAX_LINE_WIDTH:
272 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
273 return 32;
274
275 case PIPE_CAPF_MAX_POINT_WIDTH:
276 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
277 return 512.0f;
278
279 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
280 return 0.0f;
281 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
282 return 0.0f;
283 case PIPE_CAPF_GUARD_BAND_LEFT:
284 case PIPE_CAPF_GUARD_BAND_TOP:
285 case PIPE_CAPF_GUARD_BAND_RIGHT:
286 case PIPE_CAPF_GUARD_BAND_BOTTOM:
287 return 0.0f;
288 default:
289 fprintf(stderr, "unknown paramf %d\n", param);
290 return 0;
291 }
292 }
293
294 static int
295 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
296 enum pipe_shader_cap param)
297 {
298 if (shader != PIPE_SHADER_VERTEX &&
299 shader != PIPE_SHADER_FRAGMENT) {
300 return 0;
301 }
302
303 /* this is probably not totally correct.. but it's a start: */
304 switch (param) {
305 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
306 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
307 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
308 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
309 return 16384;
310 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
311 return 0;
312 case PIPE_SHADER_CAP_MAX_INPUTS:
313 if (shader == PIPE_SHADER_FRAGMENT)
314 return 8;
315 else
316 return 16;
317 case PIPE_SHADER_CAP_MAX_OUTPUTS:
318 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
319 case PIPE_SHADER_CAP_MAX_TEMPS:
320 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
321 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
322 return 16 * 1024 * sizeof(float);
323 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
324 return 1;
325 case PIPE_SHADER_CAP_MAX_PREDS:
326 return 0; /* nothing uses this */
327 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
328 return 0;
329 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
330 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
331 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
332 return 0;
333 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
334 return 1;
335 case PIPE_SHADER_CAP_SUBROUTINES:
336 return 0;
337 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
338 return 0;
339 case PIPE_SHADER_CAP_INTEGERS:
340 return 1;
341 case PIPE_SHADER_CAP_DOUBLES:
342 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
343 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
344 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
345 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
346 return 0;
347 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
348 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
349 return VC4_MAX_TEXTURE_SAMPLERS;
350 case PIPE_SHADER_CAP_PREFERRED_IR:
351 return PIPE_SHADER_IR_TGSI;
352 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
353 return 32;
354 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
355 return 0;
356 default:
357 fprintf(stderr, "unknown shader param %d\n", param);
358 return 0;
359 }
360 return 0;
361 }
362
363 static boolean
364 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
365 enum pipe_format format,
366 enum pipe_texture_target target,
367 unsigned sample_count,
368 unsigned usage)
369 {
370 unsigned retval = 0;
371
372 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
373 !util_format_is_supported(format, usage)) {
374 return FALSE;
375 }
376
377 if (usage & PIPE_BIND_VERTEX_BUFFER) {
378 switch (format) {
379 case PIPE_FORMAT_R32G32B32A32_FLOAT:
380 case PIPE_FORMAT_R32G32B32_FLOAT:
381 case PIPE_FORMAT_R32G32_FLOAT:
382 case PIPE_FORMAT_R32_FLOAT:
383 case PIPE_FORMAT_R32G32B32A32_SNORM:
384 case PIPE_FORMAT_R32G32B32_SNORM:
385 case PIPE_FORMAT_R32G32_SNORM:
386 case PIPE_FORMAT_R32_SNORM:
387 case PIPE_FORMAT_R32G32B32A32_SSCALED:
388 case PIPE_FORMAT_R32G32B32_SSCALED:
389 case PIPE_FORMAT_R32G32_SSCALED:
390 case PIPE_FORMAT_R32_SSCALED:
391 case PIPE_FORMAT_R16G16B16A16_UNORM:
392 case PIPE_FORMAT_R16G16B16_UNORM:
393 case PIPE_FORMAT_R16G16_UNORM:
394 case PIPE_FORMAT_R16_UNORM:
395 case PIPE_FORMAT_R16G16B16A16_SNORM:
396 case PIPE_FORMAT_R16G16B16_SNORM:
397 case PIPE_FORMAT_R16G16_SNORM:
398 case PIPE_FORMAT_R16_SNORM:
399 case PIPE_FORMAT_R16G16B16A16_USCALED:
400 case PIPE_FORMAT_R16G16B16_USCALED:
401 case PIPE_FORMAT_R16G16_USCALED:
402 case PIPE_FORMAT_R16_USCALED:
403 case PIPE_FORMAT_R16G16B16A16_SSCALED:
404 case PIPE_FORMAT_R16G16B16_SSCALED:
405 case PIPE_FORMAT_R16G16_SSCALED:
406 case PIPE_FORMAT_R16_SSCALED:
407 case PIPE_FORMAT_R8G8B8A8_UNORM:
408 case PIPE_FORMAT_R8G8B8_UNORM:
409 case PIPE_FORMAT_R8G8_UNORM:
410 case PIPE_FORMAT_R8_UNORM:
411 case PIPE_FORMAT_R8G8B8A8_SNORM:
412 case PIPE_FORMAT_R8G8B8_SNORM:
413 case PIPE_FORMAT_R8G8_SNORM:
414 case PIPE_FORMAT_R8_SNORM:
415 case PIPE_FORMAT_R8G8B8A8_USCALED:
416 case PIPE_FORMAT_R8G8B8_USCALED:
417 case PIPE_FORMAT_R8G8_USCALED:
418 case PIPE_FORMAT_R8_USCALED:
419 case PIPE_FORMAT_R8G8B8A8_SSCALED:
420 case PIPE_FORMAT_R8G8B8_SSCALED:
421 case PIPE_FORMAT_R8G8_SSCALED:
422 case PIPE_FORMAT_R8_SSCALED:
423 retval |= PIPE_BIND_VERTEX_BUFFER;
424 break;
425 default:
426 break;
427 }
428 }
429
430 if ((usage & PIPE_BIND_RENDER_TARGET) &&
431 (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
432 vc4_rt_format_supported(format)) {
433 retval |= PIPE_BIND_RENDER_TARGET;
434 }
435
436 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
437 (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
438 (vc4_tex_format_supported(format))) {
439 retval |= PIPE_BIND_SAMPLER_VIEW;
440 }
441
442 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
443 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
444 format == PIPE_FORMAT_X8Z24_UNORM)) {
445 retval |= PIPE_BIND_DEPTH_STENCIL;
446 }
447
448 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
449 (format == PIPE_FORMAT_I8_UINT ||
450 format == PIPE_FORMAT_I16_UINT)) {
451 retval |= PIPE_BIND_INDEX_BUFFER;
452 }
453
454 if (usage & PIPE_BIND_TRANSFER_READ)
455 retval |= PIPE_BIND_TRANSFER_READ;
456 if (usage & PIPE_BIND_TRANSFER_WRITE)
457 retval |= PIPE_BIND_TRANSFER_WRITE;
458
459 #if 0
460 if (retval != usage) {
461 fprintf(stderr,
462 "not supported: format=%s, target=%d, sample_count=%d, "
463 "usage=0x%x, retval=0x%x\n", util_format_name(format),
464 target, sample_count, usage, retval);
465 }
466 #endif
467
468 return retval == usage;
469 }
470
471 struct pipe_screen *
472 vc4_screen_create(int fd)
473 {
474 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
475 struct pipe_screen *pscreen;
476
477 pscreen = &screen->base;
478
479 pscreen->destroy = vc4_screen_destroy;
480 pscreen->get_param = vc4_screen_get_param;
481 pscreen->get_paramf = vc4_screen_get_paramf;
482 pscreen->get_shader_param = vc4_screen_get_shader_param;
483 pscreen->context_create = vc4_context_create;
484 pscreen->is_format_supported = vc4_screen_is_format_supported;
485
486 screen->fd = fd;
487 list_inithead(&screen->bo_cache.time_list);
488
489 vc4_fence_init(screen);
490
491 vc4_debug = debug_get_option_vc4_debug();
492 if (vc4_debug & VC4_DEBUG_SHADERDB)
493 vc4_debug |= VC4_DEBUG_NORAST;
494
495 #if USE_VC4_SIMULATOR
496 vc4_simulator_init(screen);
497 #endif
498
499 vc4_resource_screen_init(pscreen);
500
501 pscreen->get_name = vc4_screen_get_name;
502 pscreen->get_vendor = vc4_screen_get_vendor;
503 pscreen->get_device_vendor = vc4_screen_get_vendor;
504
505 return pscreen;
506 }
507
508 boolean
509 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
510 struct vc4_bo *bo,
511 unsigned stride,
512 struct winsys_handle *whandle)
513 {
514 whandle->stride = stride;
515
516 /* If we're passing some reference to our BO out to some other part of
517 * the system, then we can't do any optimizations about only us being
518 * the ones seeing it (like BO caching or shadow update avoidance).
519 */
520 bo->private = false;
521
522 switch (whandle->type) {
523 case DRM_API_HANDLE_TYPE_SHARED:
524 return vc4_bo_flink(bo, &whandle->handle);
525 case DRM_API_HANDLE_TYPE_KMS:
526 whandle->handle = bo->handle;
527 return TRUE;
528 case DRM_API_HANDLE_TYPE_FD:
529 whandle->handle = vc4_bo_get_dmabuf(bo);
530 return whandle->handle != -1;
531 }
532
533 return FALSE;
534 }
535
536 struct vc4_bo *
537 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
538 struct winsys_handle *whandle)
539 {
540 struct vc4_screen *screen = vc4_screen(pscreen);
541
542 switch (whandle->type) {
543 case DRM_API_HANDLE_TYPE_SHARED:
544 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
545 case DRM_API_HANDLE_TYPE_FD:
546 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
547 default:
548 fprintf(stderr,
549 "Attempt to import unsupported handle type %d\n",
550 whandle->type);
551 return NULL;
552 }
553 }