src/gallium/drivers/vc4/vc4_screen.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_cpu_detect.h"
  31 #include "util/u_debug.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_hash_table.h"
  35 #include "util/ralloc.h"
  36
  37 #include <xf86drm.h>
  38 #include "vc4_drm.h"
  39 #include "vc4_screen.h"
  40 #include "vc4_context.h"
  41 #include "vc4_resource.h"
  42
  43 static const struct debug_named_value debug_options[] = {
  44         { "cl",       VC4_DEBUG_CL,
  45           "Dump command list during creation" },
  46         { "qpu",      VC4_DEBUG_QPU,
  47           "Dump generated QPU instructions" },
  48         { "qir",      VC4_DEBUG_QIR,
  49           "Dump QPU IR during program compile" },
  50         { "nir",      VC4_DEBUG_NIR,
  51           "Dump NIR during program compile" },
  52         { "tgsi",     VC4_DEBUG_TGSI,
  53           "Dump TGSI during program compile" },
  54         { "shaderdb", VC4_DEBUG_SHADERDB,
  55           "Dump program compile information for shader-db analysis" },
  56         { "perf",     VC4_DEBUG_PERF,
  57           "Print during performance-related events" },
  58         { "norast",   VC4_DEBUG_NORAST,
  59           "Skip actual hardware execution of commands" },
  60         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
  61           "Flush after each draw call" },
  62         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
  63           "Wait for finish after each flush" },
  64 #if USE_VC4_SIMULATOR
  65         { "dump", VC4_DEBUG_DUMP,
  66           "Write a GPU command stream trace file" },
  67 #endif
  68         { NULL }
  69 };
  70
  71 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
  72 uint32_t vc4_debug;
  73
  74 static const char *
  75 vc4_screen_get_name(struct pipe_screen *pscreen)
  76 {
  77         struct vc4_screen *screen = vc4_screen(pscreen);
  78
  79         if (!screen->name) {
  80                 screen->name = ralloc_asprintf(screen,
  81                                                "VC4 V3D %d.%d",
  82                                                screen->v3d_ver / 10,
  83                                                screen->v3d_ver % 10);
  84         }
  85
  86         return screen->name;
  87 }
  88
  89 static const char *
  90 vc4_screen_get_vendor(struct pipe_screen *pscreen)
  91 {
  92         return "Broadcom";
  93 }
  94
  95 static void
  96 vc4_screen_destroy(struct pipe_screen *pscreen)
  97 {
  98         struct vc4_screen *screen = vc4_screen(pscreen);
  99
 100         util_hash_table_destroy(screen->bo_handles);
 101         vc4_bufmgr_destroy(pscreen);
 102         slab_destroy_parent(&screen->transfer_pool);
 103
 104 #if USE_VC4_SIMULATOR
 105         vc4_simulator_destroy(screen);
 106 #endif
 107
 108         close(screen->fd);
 109         ralloc_free(pscreen);
 110 }
 111
 112 static int
 113 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 114 {
 115         switch (param) {
 116                 /* Supported features (boolean caps). */
 117         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 118         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 119         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 120         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 121         case PIPE_CAP_NPOT_TEXTURES:
 122         case PIPE_CAP_SHAREABLE_SHADERS:
 123         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 124         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 125         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 126         case PIPE_CAP_TWO_SIDED_STENCIL:
 127         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 130                 return 1;
 131
 132                 /* lying for GL 2.0 */
 133         case PIPE_CAP_OCCLUSION_QUERY:
 134         case PIPE_CAP_POINT_SPRITE:
 135                 return 1;
 136
 137         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 138                 return 256;
 139
 140         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 141                 return 120;
 142
 143         case PIPE_CAP_MAX_VIEWPORTS:
 144                 return 1;
 145
 146         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 147         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 148                 return 1;
 149
 150         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 151         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 152                 return 1;
 153
 154                 /* Unsupported features. */
 155         case PIPE_CAP_ANISOTROPIC_FILTER:
 156         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 157         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 158         case PIPE_CAP_CUBE_MAP_ARRAY:
 159         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 160         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 161         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 162         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 163         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 164         case PIPE_CAP_TGSI_INSTANCEID:
 165         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 166         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 167         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 168         case PIPE_CAP_COMPUTE:
 169         case PIPE_CAP_START_INSTANCE:
 170         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 171         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 172         case PIPE_CAP_TGSI_TEXCOORD:
 173         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 174         case PIPE_CAP_CONDITIONAL_RENDER:
 175         case PIPE_CAP_PRIMITIVE_RESTART:
 176         case PIPE_CAP_TEXTURE_BARRIER:
 177         case PIPE_CAP_SM3:
 178         case PIPE_CAP_INDEP_BLEND_ENABLE:
 179         case PIPE_CAP_INDEP_BLEND_FUNC:
 180         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 181         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 182         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 183         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 184         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 185         case PIPE_CAP_USER_VERTEX_BUFFERS:
 186         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 187         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 188         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 189         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 190         case PIPE_CAP_TEXTURE_GATHER_SM5:
 191         case PIPE_CAP_FAKE_SW_MSAA:
 192         case PIPE_CAP_TEXTURE_QUERY_LOD:
 193         case PIPE_CAP_SAMPLE_SHADING:
 194         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 195         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 196         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 197         case PIPE_CAP_MAX_TEXEL_OFFSET:
 198         case PIPE_CAP_MAX_VERTEX_STREAMS:
 199         case PIPE_CAP_DRAW_INDIRECT:
 200         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 201         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 202         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 203         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 204         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 205         case PIPE_CAP_CLIP_HALFZ:
 206         case PIPE_CAP_VERTEXID_NOBASE:
 207         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 208         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 209         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 210         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 211         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 212         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 213         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 214         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 215         case PIPE_CAP_TGSI_TXQS:
 216         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 217         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 218         case PIPE_CAP_CLEAR_TEXTURE:
 219         case PIPE_CAP_DRAW_PARAMETERS:
 220         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 221         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 222         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 223         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 224         case PIPE_CAP_INVALIDATE_BUFFER:
 225         case PIPE_CAP_GENERATE_MIPMAP:
 226         case PIPE_CAP_STRING_MARKER:
 227         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 228         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 229         case PIPE_CAP_QUERY_MEMORY_INFO:
 230         case PIPE_CAP_PCI_GROUP:
 231         case PIPE_CAP_PCI_BUS:
 232         case PIPE_CAP_PCI_DEVICE:
 233         case PIPE_CAP_PCI_FUNCTION:
 234         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 235         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 236         case PIPE_CAP_CULL_DISTANCE:
 237         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 238         case PIPE_CAP_TGSI_VOTE:
 239         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 240         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 241         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 242         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 243         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 244         case PIPE_CAP_NATIVE_FENCE_FD:
 245         case PIPE_CAP_TGSI_FS_FBFETCH:
 246         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 247         case PIPE_CAP_DOUBLES:
 248         case PIPE_CAP_INT64:
 249         case PIPE_CAP_INT64_DIVMOD:
 250         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 251         case PIPE_CAP_TGSI_CLOCK:
 252         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 253         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 254         case PIPE_CAP_TGSI_BALLOT:
 255         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 256         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 257                 return 0;
 258
 259                 /* Stream output. */
 260         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 261         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 262         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 263         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 264         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 265                 return 0;
 266
 267                 /* Geometry shader output, unsupported. */
 268         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 269         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 270                 return 0;
 271
 272                 /* Texturing. */
 273         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 274         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 275                 return VC4_MAX_MIP_LEVELS;
 276         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 277                 /* Note: Not supported in hardware, just faking it. */
 278                 return 5;
 279         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 280                 return 0;
 281
 282                 /* Render targets. */
 283         case PIPE_CAP_MAX_RENDER_TARGETS:
 284                 return 1;
 285
 286                 /* Queries. */
 287         case PIPE_CAP_QUERY_TIME_ELAPSED:
 288         case PIPE_CAP_QUERY_TIMESTAMP:
 289                 return 0;
 290
 291         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 292         case PIPE_CAP_MIN_TEXEL_OFFSET:
 293                 return 0;
 294
 295         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 296                 return 2048;
 297
 298         case PIPE_CAP_ENDIANNESS:
 299                 return PIPE_ENDIAN_LITTLE;
 300
 301         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 302                 return 64;
 303
 304         case PIPE_CAP_VENDOR_ID:
 305                 return 0x14E4;
 306         case PIPE_CAP_DEVICE_ID:
 307                 return 0xFFFFFFFF;
 308         case PIPE_CAP_ACCELERATED:
 309                 return 1;
 310         case PIPE_CAP_VIDEO_MEMORY: {
 311                 uint64_t system_memory;
 312
 313                 if (!os_get_total_physical_memory(&system_memory))
 314                         return 0;
 315
 316                 return (int)(system_memory >> 20);
 317         }
 318         case PIPE_CAP_UMA:
 319                 return 1;
 320
 321         default:
 322                 fprintf(stderr, "unknown param %d\n", param);
 323                 return 0;
 324         }
 325 }
 326
 327 static float
 328 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 329 {
 330         switch (param) {
 331         case PIPE_CAPF_MAX_LINE_WIDTH:
 332         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 333                 return 32;
 334
 335         case PIPE_CAPF_MAX_POINT_WIDTH:
 336         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 337                 return 512.0f;
 338
 339         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 340                 return 0.0f;
 341         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 342                 return 0.0f;
 343         case PIPE_CAPF_GUARD_BAND_LEFT:
 344         case PIPE_CAPF_GUARD_BAND_TOP:
 345         case PIPE_CAPF_GUARD_BAND_RIGHT:
 346         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 347                 return 0.0f;
 348         default:
 349                 fprintf(stderr, "unknown paramf %d\n", param);
 350                 return 0;
 351         }
 352 }
 353
 354 static int
 355 vc4_screen_get_shader_param(struct pipe_screen *pscreen,
 356                             enum pipe_shader_type shader,
 357                             enum pipe_shader_cap param)
 358 {
 359         if (shader != PIPE_SHADER_VERTEX &&
 360             shader != PIPE_SHADER_FRAGMENT) {
 361                 return 0;
 362         }
 363
 364         /* this is probably not totally correct.. but it's a start: */
 365         switch (param) {
 366         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 367         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 368         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 369         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 370                 return 16384;
 371
 372         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 373                 return vc4_screen(pscreen)->has_control_flow;
 374
 375         case PIPE_SHADER_CAP_MAX_INPUTS:
 376                 return 8;
 377         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 378                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 379         case PIPE_SHADER_CAP_MAX_TEMPS:
 380                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 381         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 382                 return 16 * 1024 * sizeof(float);
 383         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 384                 return 1;
 385         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 386                 return 0;
 387         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 388         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 389         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 390                 return 0;
 391         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 392                 return 1;
 393         case PIPE_SHADER_CAP_SUBROUTINES:
 394                 return 0;
 395         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 396                 return 0;
 397         case PIPE_SHADER_CAP_INTEGERS:
 398                 return 1;
 399         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 400         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 401         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 402         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 403                 return 0;
 404         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 405         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 406                 return VC4_MAX_TEXTURE_SAMPLERS;
 407         case PIPE_SHADER_CAP_PREFERRED_IR:
 408                 return PIPE_SHADER_IR_NIR;
 409         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 410                 return 0;
 411         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 412                 return 32;
 413         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 414         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 415         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 416         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 417                 return 0;
 418         default:
 419                 fprintf(stderr, "unknown shader param %d\n", param);
 420                 return 0;
 421         }
 422         return 0;
 423 }
 424
 425 static boolean
 426 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
 427                                enum pipe_format format,
 428                                enum pipe_texture_target target,
 429                                unsigned sample_count,
 430                                unsigned usage)
 431 {
 432         struct vc4_screen *screen = vc4_screen(pscreen);
 433         unsigned retval = 0;
 434
 435         if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
 436                 return FALSE;
 437
 438         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 439             !util_format_is_supported(format, usage)) {
 440                 return FALSE;
 441         }
 442
 443         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 444                 switch (format) {
 445                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 446                 case PIPE_FORMAT_R32G32B32_FLOAT:
 447                 case PIPE_FORMAT_R32G32_FLOAT:
 448                 case PIPE_FORMAT_R32_FLOAT:
 449                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 450                 case PIPE_FORMAT_R32G32B32_SNORM:
 451                 case PIPE_FORMAT_R32G32_SNORM:
 452                 case PIPE_FORMAT_R32_SNORM:
 453                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 454                 case PIPE_FORMAT_R32G32B32_SSCALED:
 455                 case PIPE_FORMAT_R32G32_SSCALED:
 456                 case PIPE_FORMAT_R32_SSCALED:
 457                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 458                 case PIPE_FORMAT_R16G16B16_UNORM:
 459                 case PIPE_FORMAT_R16G16_UNORM:
 460                 case PIPE_FORMAT_R16_UNORM:
 461                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 462                 case PIPE_FORMAT_R16G16B16_SNORM:
 463                 case PIPE_FORMAT_R16G16_SNORM:
 464                 case PIPE_FORMAT_R16_SNORM:
 465                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 466                 case PIPE_FORMAT_R16G16B16_USCALED:
 467                 case PIPE_FORMAT_R16G16_USCALED:
 468                 case PIPE_FORMAT_R16_USCALED:
 469                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 470                 case PIPE_FORMAT_R16G16B16_SSCALED:
 471                 case PIPE_FORMAT_R16G16_SSCALED:
 472                 case PIPE_FORMAT_R16_SSCALED:
 473                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 474                 case PIPE_FORMAT_R8G8B8_UNORM:
 475                 case PIPE_FORMAT_R8G8_UNORM:
 476                 case PIPE_FORMAT_R8_UNORM:
 477                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 478                 case PIPE_FORMAT_R8G8B8_SNORM:
 479                 case PIPE_FORMAT_R8G8_SNORM:
 480                 case PIPE_FORMAT_R8_SNORM:
 481                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 482                 case PIPE_FORMAT_R8G8B8_USCALED:
 483                 case PIPE_FORMAT_R8G8_USCALED:
 484                 case PIPE_FORMAT_R8_USCALED:
 485                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 486                 case PIPE_FORMAT_R8G8B8_SSCALED:
 487                 case PIPE_FORMAT_R8G8_SSCALED:
 488                 case PIPE_FORMAT_R8_SSCALED:
 489                         retval |= PIPE_BIND_VERTEX_BUFFER;
 490                         break;
 491                 default:
 492                         break;
 493                 }
 494         }
 495
 496         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 497             vc4_rt_format_supported(format)) {
 498                 retval |= PIPE_BIND_RENDER_TARGET;
 499         }
 500
 501         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 502             vc4_tex_format_supported(format) &&
 503             (format != PIPE_FORMAT_ETC1_RGB8 || screen->has_etc1)) {
 504                 retval |= PIPE_BIND_SAMPLER_VIEW;
 505         }
 506
 507         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 508             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 509              format == PIPE_FORMAT_X8Z24_UNORM)) {
 510                 retval |= PIPE_BIND_DEPTH_STENCIL;
 511         }
 512
 513         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 514             (format == PIPE_FORMAT_I8_UINT ||
 515              format == PIPE_FORMAT_I16_UINT)) {
 516                 retval |= PIPE_BIND_INDEX_BUFFER;
 517         }
 518
 519 #if 0
 520         if (retval != usage) {
 521                 fprintf(stderr,
 522                         "not supported: format=%s, target=%d, sample_count=%d, "
 523                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
 524                         target, sample_count, usage, retval);
 525         }
 526 #endif
 527
 528         return retval == usage;
 529 }
 530
 531 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 532
 533 static unsigned handle_hash(void *key)
 534 {
 535     return PTR_TO_UINT(key);
 536 }
 537
 538 static int handle_compare(void *key1, void *key2)
 539 {
 540     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 541 }
 542
 543 static bool
 544 vc4_has_feature(struct vc4_screen *screen, uint32_t feature)
 545 {
 546         struct drm_vc4_get_param p = {
 547                 .param = feature,
 548         };
 549         int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &p);
 550
 551         if (ret != 0)
 552                 return false;
 553
 554         return p.value;
 555 }
 556
 557 static bool
 558 vc4_get_chip_info(struct vc4_screen *screen)
 559 {
 560         struct drm_vc4_get_param ident0 = {
 561                 .param = DRM_VC4_PARAM_V3D_IDENT0,
 562         };
 563         struct drm_vc4_get_param ident1 = {
 564                 .param = DRM_VC4_PARAM_V3D_IDENT1,
 565         };
 566         int ret;
 567
 568         ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident0);
 569         if (ret != 0) {
 570                 if (errno == EINVAL) {
 571                         /* Backwards compatibility with 2835 kernels which
 572                          * only do V3D 2.1.
 573                          */
 574                         screen->v3d_ver = 21;
 575                         return true;
 576                 } else {
 577                         fprintf(stderr, "Couldn't get V3D IDENT0: %s\n",
 578                                 strerror(errno));
 579                         return false;
 580                 }
 581         }
 582         ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident1);
 583         if (ret != 0) {
 584                 fprintf(stderr, "Couldn't get V3D IDENT1: %s\n",
 585                         strerror(errno));
 586                 return false;
 587         }
 588
 589         uint32_t major = (ident0.value >> 24) & 0xff;
 590         uint32_t minor = (ident1.value >> 0) & 0xf;
 591         screen->v3d_ver = major * 10 + minor;
 592
 593         if (screen->v3d_ver != 21 && screen->v3d_ver != 26) {
 594                 fprintf(stderr,
 595                         "V3D %d.%d not supported by this version of Mesa.\n",
 596                         screen->v3d_ver / 10,
 597                         screen->v3d_ver % 10);
 598                 return false;
 599         }
 600
 601         return true;
 602 }
 603
 604 struct pipe_screen *
 605 vc4_screen_create(int fd)
 606 {
 607         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
 608         struct pipe_screen *pscreen;
 609
 610         pscreen = &screen->base;
 611
 612         pscreen->destroy = vc4_screen_destroy;
 613         pscreen->get_param = vc4_screen_get_param;
 614         pscreen->get_paramf = vc4_screen_get_paramf;
 615         pscreen->get_shader_param = vc4_screen_get_shader_param;
 616         pscreen->context_create = vc4_context_create;
 617         pscreen->is_format_supported = vc4_screen_is_format_supported;
 618
 619         screen->fd = fd;
 620         list_inithead(&screen->bo_cache.time_list);
 621         (void) mtx_init(&screen->bo_handles_mutex, mtx_plain);
 622         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 623
 624         screen->has_control_flow =
 625                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_BRANCHES);
 626         screen->has_etc1 =
 627                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_ETC1);
 628         screen->has_threaded_fs =
 629                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_THREADED_FS);
 630
 631         if (!vc4_get_chip_info(screen))
 632                 goto fail;
 633
 634         util_cpu_detect();
 635
 636         slab_create_parent(&screen->transfer_pool, sizeof(struct vc4_transfer), 16);
 637
 638         vc4_fence_init(screen);
 639
 640         vc4_debug = debug_get_option_vc4_debug();
 641         if (vc4_debug & VC4_DEBUG_SHADERDB)
 642                 vc4_debug |= VC4_DEBUG_NORAST;
 643
 644 #if USE_VC4_SIMULATOR
 645         vc4_simulator_init(screen);
 646 #endif
 647
 648         vc4_resource_screen_init(pscreen);
 649
 650         pscreen->get_name = vc4_screen_get_name;
 651         pscreen->get_vendor = vc4_screen_get_vendor;
 652         pscreen->get_device_vendor = vc4_screen_get_vendor;
 653         pscreen->get_compiler_options = vc4_screen_get_compiler_options;
 654
 655         return pscreen;
 656
 657 fail:
 658         close(fd);
 659         ralloc_free(pscreen);
 660         return NULL;
 661 }
 662
 663 boolean
 664 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
 665                          struct vc4_bo *bo,
 666                          unsigned stride,
 667                          struct winsys_handle *whandle)
 668 {
 669         whandle->stride = stride;
 670
 671         /* If we're passing some reference to our BO out to some other part of
 672          * the system, then we can't do any optimizations about only us being
 673          * the ones seeing it (like BO caching or shadow update avoidance).
 674          */
 675         bo->private = false;
 676
 677         switch (whandle->type) {
 678         case DRM_API_HANDLE_TYPE_SHARED:
 679                 return vc4_bo_flink(bo, &whandle->handle);
 680         case DRM_API_HANDLE_TYPE_KMS:
 681                 whandle->handle = bo->handle;
 682                 return TRUE;
 683         case DRM_API_HANDLE_TYPE_FD:
 684                 whandle->handle = vc4_bo_get_dmabuf(bo);
 685                 return whandle->handle != -1;
 686         }
 687
 688         return FALSE;
 689 }
 690
 691 struct vc4_bo *
 692 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
 693                           struct winsys_handle *whandle)
 694 {
 695         struct vc4_screen *screen = vc4_screen(pscreen);
 696
 697         if (whandle->offset != 0) {
 698                 fprintf(stderr,
 699                         "Attempt to import unsupported winsys offset %u\n",
 700                         whandle->offset);
 701                 return NULL;
 702         }
 703
 704         switch (whandle->type) {
 705         case DRM_API_HANDLE_TYPE_SHARED:
 706                 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
 707         case DRM_API_HANDLE_TYPE_FD:
 708                 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
 709         default:
 710                 fprintf(stderr,
 711                         "Attempt to import unsupported handle type %d\n",
 712                         whandle->type);
 713                 return NULL;
 714         }
 715 }