gallium: add caps to expose support for multi indirect draws
[mesa.git] / src / gallium / drivers / vc4 / vc4_screen.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/ralloc.h"
34
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
38
39 static const struct debug_named_value debug_options[] = {
40 { "cl", VC4_DEBUG_CL,
41 "Dump command list during creation" },
42 { "qpu", VC4_DEBUG_QPU,
43 "Dump generated QPU instructions" },
44 { "qir", VC4_DEBUG_QIR,
45 "Dump QPU IR during program compile" },
46 { "nir", VC4_DEBUG_NIR,
47 "Dump NIR during program compile" },
48 { "tgsi", VC4_DEBUG_TGSI,
49 "Dump TGSI during program compile" },
50 { "shaderdb", VC4_DEBUG_SHADERDB,
51 "Dump program compile information for shader-db analysis" },
52 { "perf", VC4_DEBUG_PERF,
53 "Print during performance-related events" },
54 { "norast", VC4_DEBUG_NORAST,
55 "Skip actual hardware execution of commands" },
56 { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
57 "Flush after each draw call" },
58 { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
59 "Wait for finish after each flush" },
60 #if USE_VC4_SIMULATOR
61 { "dump", VC4_DEBUG_DUMP,
62 "Write a GPU command stream trace file" },
63 #endif
64 { NULL }
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
68 uint32_t vc4_debug;
69
70 static const char *
71 vc4_screen_get_name(struct pipe_screen *pscreen)
72 {
73 return "VC4";
74 }
75
76 static const char *
77 vc4_screen_get_vendor(struct pipe_screen *pscreen)
78 {
79 return "Broadcom";
80 }
81
82 static void
83 vc4_screen_destroy(struct pipe_screen *pscreen)
84 {
85 vc4_bufmgr_destroy(pscreen);
86 ralloc_free(pscreen);
87 }
88
89 static int
90 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
91 {
92 switch (param) {
93 /* Supported features (boolean caps). */
94 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
95 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_USER_CONSTANT_BUFFERS:
98 case PIPE_CAP_TEXTURE_SHADOW_MAP:
99 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100 case PIPE_CAP_TWO_SIDED_STENCIL:
101 case PIPE_CAP_USER_INDEX_BUFFERS:
102 case PIPE_CAP_TEXTURE_MULTISAMPLE:
103 case PIPE_CAP_TEXTURE_SWIZZLE:
104 return 1;
105
106 /* lying for GL 2.0 */
107 case PIPE_CAP_OCCLUSION_QUERY:
108 case PIPE_CAP_POINT_SPRITE:
109 return 1;
110
111 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
112 return 256;
113
114 case PIPE_CAP_GLSL_FEATURE_LEVEL:
115 return 120;
116
117 case PIPE_CAP_MAX_VIEWPORTS:
118 return 1;
119
120 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
121 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
122 return 1;
123
124 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
125 return 1;
126
127 /* Unsupported features. */
128 case PIPE_CAP_ANISOTROPIC_FILTER:
129 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
130 case PIPE_CAP_CUBE_MAP_ARRAY:
131 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
132 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
133 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
134 case PIPE_CAP_SEAMLESS_CUBE_MAP:
135 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
136 case PIPE_CAP_TGSI_INSTANCEID:
137 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
138 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
139 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
140 case PIPE_CAP_COMPUTE:
141 case PIPE_CAP_START_INSTANCE:
142 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
143 case PIPE_CAP_SHADER_STENCIL_EXPORT:
144 case PIPE_CAP_TGSI_TEXCOORD:
145 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
146 case PIPE_CAP_CONDITIONAL_RENDER:
147 case PIPE_CAP_PRIMITIVE_RESTART:
148 case PIPE_CAP_TEXTURE_BARRIER:
149 case PIPE_CAP_SM3:
150 case PIPE_CAP_INDEP_BLEND_ENABLE:
151 case PIPE_CAP_INDEP_BLEND_FUNC:
152 case PIPE_CAP_DEPTH_CLIP_DISABLE:
153 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
154 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
155 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
156 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
157 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
158 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
159 case PIPE_CAP_USER_VERTEX_BUFFERS:
160 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
161 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
162 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
163 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
164 case PIPE_CAP_TEXTURE_GATHER_SM5:
165 case PIPE_CAP_FAKE_SW_MSAA:
166 case PIPE_CAP_TEXTURE_QUERY_LOD:
167 case PIPE_CAP_SAMPLE_SHADING:
168 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
169 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
170 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
171 case PIPE_CAP_MAX_TEXEL_OFFSET:
172 case PIPE_CAP_MAX_VERTEX_STREAMS:
173 case PIPE_CAP_DRAW_INDIRECT:
174 case PIPE_CAP_MULTI_DRAW_INDIRECT:
175 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
176 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
177 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
178 case PIPE_CAP_SAMPLER_VIEW_TARGET:
179 case PIPE_CAP_CLIP_HALFZ:
180 case PIPE_CAP_VERTEXID_NOBASE:
181 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
182 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
183 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
184 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
185 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
186 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
187 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
188 case PIPE_CAP_DEPTH_BOUNDS_TEST:
189 case PIPE_CAP_TGSI_TXQS:
190 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
191 case PIPE_CAP_SHAREABLE_SHADERS:
192 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
193 case PIPE_CAP_CLEAR_TEXTURE:
194 case PIPE_CAP_DRAW_PARAMETERS:
195 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
196 return 0;
197
198 /* Stream output. */
199 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
200 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
201 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
202 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
203 return 0;
204
205 /* Geometry shader output, unsupported. */
206 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
207 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
208 return 0;
209
210 /* Texturing. */
211 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
212 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
213 return VC4_MAX_MIP_LEVELS;
214 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
215 /* Note: Not supported in hardware, just faking it. */
216 return 5;
217 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
218 return 0;
219
220 /* Render targets. */
221 case PIPE_CAP_MAX_RENDER_TARGETS:
222 return 1;
223
224 /* Queries. */
225 case PIPE_CAP_QUERY_TIME_ELAPSED:
226 case PIPE_CAP_QUERY_TIMESTAMP:
227 return 0;
228
229 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
230 case PIPE_CAP_MIN_TEXEL_OFFSET:
231 return 0;
232
233 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
234 return 2048;
235
236 case PIPE_CAP_ENDIANNESS:
237 return PIPE_ENDIAN_LITTLE;
238
239 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
240 return 64;
241
242 case PIPE_CAP_VENDOR_ID:
243 return 0x14E4;
244 case PIPE_CAP_DEVICE_ID:
245 return 0xFFFFFFFF;
246 case PIPE_CAP_ACCELERATED:
247 return 1;
248 case PIPE_CAP_VIDEO_MEMORY: {
249 uint64_t system_memory;
250
251 if (!os_get_total_physical_memory(&system_memory))
252 return 0;
253
254 return (int)(system_memory >> 20);
255 }
256 case PIPE_CAP_UMA:
257 return 1;
258
259 default:
260 fprintf(stderr, "unknown param %d\n", param);
261 return 0;
262 }
263 }
264
265 static float
266 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
267 {
268 switch (param) {
269 case PIPE_CAPF_MAX_LINE_WIDTH:
270 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
271 return 32;
272
273 case PIPE_CAPF_MAX_POINT_WIDTH:
274 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
275 return 512.0f;
276
277 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
278 return 0.0f;
279 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
280 return 0.0f;
281 case PIPE_CAPF_GUARD_BAND_LEFT:
282 case PIPE_CAPF_GUARD_BAND_TOP:
283 case PIPE_CAPF_GUARD_BAND_RIGHT:
284 case PIPE_CAPF_GUARD_BAND_BOTTOM:
285 return 0.0f;
286 default:
287 fprintf(stderr, "unknown paramf %d\n", param);
288 return 0;
289 }
290 }
291
292 static int
293 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
294 enum pipe_shader_cap param)
295 {
296 if (shader != PIPE_SHADER_VERTEX &&
297 shader != PIPE_SHADER_FRAGMENT) {
298 return 0;
299 }
300
301 /* this is probably not totally correct.. but it's a start: */
302 switch (param) {
303 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
304 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
305 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
306 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
307 return 16384;
308 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
309 return 0;
310 case PIPE_SHADER_CAP_MAX_INPUTS:
311 if (shader == PIPE_SHADER_FRAGMENT)
312 return 8;
313 else
314 return 16;
315 case PIPE_SHADER_CAP_MAX_OUTPUTS:
316 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
317 case PIPE_SHADER_CAP_MAX_TEMPS:
318 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
319 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
320 return 16 * 1024 * sizeof(float);
321 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
322 return 1;
323 case PIPE_SHADER_CAP_MAX_PREDS:
324 return 0; /* nothing uses this */
325 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
326 return 0;
327 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
328 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
329 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
330 return 0;
331 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
332 return 1;
333 case PIPE_SHADER_CAP_SUBROUTINES:
334 return 0;
335 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
336 return 0;
337 case PIPE_SHADER_CAP_INTEGERS:
338 return 1;
339 case PIPE_SHADER_CAP_DOUBLES:
340 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
341 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
342 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
343 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
344 return 0;
345 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
346 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
347 return VC4_MAX_TEXTURE_SAMPLERS;
348 case PIPE_SHADER_CAP_PREFERRED_IR:
349 return PIPE_SHADER_IR_TGSI;
350 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
351 return 32;
352 default:
353 fprintf(stderr, "unknown shader param %d\n", param);
354 return 0;
355 }
356 return 0;
357 }
358
359 static boolean
360 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
361 enum pipe_format format,
362 enum pipe_texture_target target,
363 unsigned sample_count,
364 unsigned usage)
365 {
366 unsigned retval = 0;
367
368 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
369 !util_format_is_supported(format, usage)) {
370 return FALSE;
371 }
372
373 if (usage & PIPE_BIND_VERTEX_BUFFER) {
374 switch (format) {
375 case PIPE_FORMAT_R32G32B32A32_FLOAT:
376 case PIPE_FORMAT_R32G32B32_FLOAT:
377 case PIPE_FORMAT_R32G32_FLOAT:
378 case PIPE_FORMAT_R32_FLOAT:
379 case PIPE_FORMAT_R32G32B32A32_SNORM:
380 case PIPE_FORMAT_R32G32B32_SNORM:
381 case PIPE_FORMAT_R32G32_SNORM:
382 case PIPE_FORMAT_R32_SNORM:
383 case PIPE_FORMAT_R32G32B32A32_SSCALED:
384 case PIPE_FORMAT_R32G32B32_SSCALED:
385 case PIPE_FORMAT_R32G32_SSCALED:
386 case PIPE_FORMAT_R32_SSCALED:
387 case PIPE_FORMAT_R16G16B16A16_UNORM:
388 case PIPE_FORMAT_R16G16B16_UNORM:
389 case PIPE_FORMAT_R16G16_UNORM:
390 case PIPE_FORMAT_R16_UNORM:
391 case PIPE_FORMAT_R16G16B16A16_SNORM:
392 case PIPE_FORMAT_R16G16B16_SNORM:
393 case PIPE_FORMAT_R16G16_SNORM:
394 case PIPE_FORMAT_R16_SNORM:
395 case PIPE_FORMAT_R16G16B16A16_USCALED:
396 case PIPE_FORMAT_R16G16B16_USCALED:
397 case PIPE_FORMAT_R16G16_USCALED:
398 case PIPE_FORMAT_R16_USCALED:
399 case PIPE_FORMAT_R16G16B16A16_SSCALED:
400 case PIPE_FORMAT_R16G16B16_SSCALED:
401 case PIPE_FORMAT_R16G16_SSCALED:
402 case PIPE_FORMAT_R16_SSCALED:
403 case PIPE_FORMAT_R8G8B8A8_UNORM:
404 case PIPE_FORMAT_R8G8B8_UNORM:
405 case PIPE_FORMAT_R8G8_UNORM:
406 case PIPE_FORMAT_R8_UNORM:
407 case PIPE_FORMAT_R8G8B8A8_SNORM:
408 case PIPE_FORMAT_R8G8B8_SNORM:
409 case PIPE_FORMAT_R8G8_SNORM:
410 case PIPE_FORMAT_R8_SNORM:
411 case PIPE_FORMAT_R8G8B8A8_USCALED:
412 case PIPE_FORMAT_R8G8B8_USCALED:
413 case PIPE_FORMAT_R8G8_USCALED:
414 case PIPE_FORMAT_R8_USCALED:
415 case PIPE_FORMAT_R8G8B8A8_SSCALED:
416 case PIPE_FORMAT_R8G8B8_SSCALED:
417 case PIPE_FORMAT_R8G8_SSCALED:
418 case PIPE_FORMAT_R8_SSCALED:
419 retval |= PIPE_BIND_VERTEX_BUFFER;
420 break;
421 default:
422 break;
423 }
424 }
425
426 if ((usage & PIPE_BIND_RENDER_TARGET) &&
427 (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
428 vc4_rt_format_supported(format)) {
429 retval |= PIPE_BIND_RENDER_TARGET;
430 }
431
432 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
433 (sample_count == 0 || sample_count == VC4_MAX_SAMPLES) &&
434 (vc4_tex_format_supported(format))) {
435 retval |= PIPE_BIND_SAMPLER_VIEW;
436 }
437
438 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
439 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
440 format == PIPE_FORMAT_X8Z24_UNORM)) {
441 retval |= PIPE_BIND_DEPTH_STENCIL;
442 }
443
444 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
445 (format == PIPE_FORMAT_I8_UINT ||
446 format == PIPE_FORMAT_I16_UINT)) {
447 retval |= PIPE_BIND_INDEX_BUFFER;
448 }
449
450 if (usage & PIPE_BIND_TRANSFER_READ)
451 retval |= PIPE_BIND_TRANSFER_READ;
452 if (usage & PIPE_BIND_TRANSFER_WRITE)
453 retval |= PIPE_BIND_TRANSFER_WRITE;
454
455 #if 0
456 if (retval != usage) {
457 fprintf(stderr,
458 "not supported: format=%s, target=%d, sample_count=%d, "
459 "usage=0x%x, retval=0x%x\n", util_format_name(format),
460 target, sample_count, usage, retval);
461 }
462 #endif
463
464 return retval == usage;
465 }
466
467 struct pipe_screen *
468 vc4_screen_create(int fd)
469 {
470 struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
471 struct pipe_screen *pscreen;
472
473 pscreen = &screen->base;
474
475 pscreen->destroy = vc4_screen_destroy;
476 pscreen->get_param = vc4_screen_get_param;
477 pscreen->get_paramf = vc4_screen_get_paramf;
478 pscreen->get_shader_param = vc4_screen_get_shader_param;
479 pscreen->context_create = vc4_context_create;
480 pscreen->is_format_supported = vc4_screen_is_format_supported;
481
482 screen->fd = fd;
483 list_inithead(&screen->bo_cache.time_list);
484
485 vc4_fence_init(screen);
486
487 vc4_debug = debug_get_option_vc4_debug();
488 if (vc4_debug & VC4_DEBUG_SHADERDB)
489 vc4_debug |= VC4_DEBUG_NORAST;
490
491 #if USE_VC4_SIMULATOR
492 vc4_simulator_init(screen);
493 #endif
494
495 vc4_resource_screen_init(pscreen);
496
497 pscreen->get_name = vc4_screen_get_name;
498 pscreen->get_vendor = vc4_screen_get_vendor;
499 pscreen->get_device_vendor = vc4_screen_get_vendor;
500
501 return pscreen;
502 }
503
504 boolean
505 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
506 struct vc4_bo *bo,
507 unsigned stride,
508 struct winsys_handle *whandle)
509 {
510 whandle->stride = stride;
511
512 /* If we're passing some reference to our BO out to some other part of
513 * the system, then we can't do any optimizations about only us being
514 * the ones seeing it (like BO caching or shadow update avoidance).
515 */
516 bo->private = false;
517
518 switch (whandle->type) {
519 case DRM_API_HANDLE_TYPE_SHARED:
520 return vc4_bo_flink(bo, &whandle->handle);
521 case DRM_API_HANDLE_TYPE_KMS:
522 whandle->handle = bo->handle;
523 return TRUE;
524 case DRM_API_HANDLE_TYPE_FD:
525 whandle->handle = vc4_bo_get_dmabuf(bo);
526 return whandle->handle != -1;
527 }
528
529 return FALSE;
530 }
531
532 struct vc4_bo *
533 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
534 struct winsys_handle *whandle)
535 {
536 struct vc4_screen *screen = vc4_screen(pscreen);
537
538 switch (whandle->type) {
539 case DRM_API_HANDLE_TYPE_SHARED:
540 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
541 case DRM_API_HANDLE_TYPE_FD:
542 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
543 default:
544 fprintf(stderr,
545 "Attempt to import unsupported handle type %d\n",
546 whandle->type);
547 return NULL;
548 }
549 }