2 * Copyright © 2014 Broadcom
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * @file vc4_simulator.c
27 * Implements VC4 simulation on top of a non-VC4 GEM fd.
29 * This file's goal is to emulate the VC4 ioctls' behavior in the kernel on
30 * top of the simpenrose software simulator. Generally, VC4 driver BOs have a
31 * GEM-side copy of their contents and a simulator-side memory area that the
32 * GEM contents get copied into during simulation. Once simulation is done,
33 * the simulator's data is copied back out to the GEM BOs, so that rendering
34 * appears on the screen as if actual hardware rendering had been done.
36 * One of the limitations of this code is that we shouldn't really need a
37 * GEM-side BO for non-window-system BOs. However, do we need unique BO
38 * handles for each of our GEM bos so that this file can look up its state
39 * from the handle passed in at submit ioctl time (also, a couple of places
40 * outside of this file still call ioctls directly on the fd).
42 * Another limitation is that BO import doesn't work unless the underlying
43 * window system's BO size matches what VC4 is going to use, which of course
44 * doesn't work out in practice. This means that for now, only DRI3 (VC4
45 * makes the winsys BOs) is supported, not DRI2 (window system makes the winys
49 #ifdef USE_VC4_SIMULATOR
53 #include "util/u_memory.h"
54 #include "util/u_mm.h"
55 #include "util/ralloc.h"
57 #include "vc4_screen.h"
58 #include "vc4_cl_dump.h"
59 #include "vc4_context.h"
60 #include "kernel/vc4_drv.h"
61 #include "vc4_simulator_validate.h"
62 #include "simpenrose/simpenrose.h"
64 /** Global (across GEM fds) state for the simulator */
65 static struct vc4_simulator_state
{
70 struct mem_block
*heap
;
71 struct mem_block
*overflow
;
73 /** Mapping from GEM handle to struct vc4_simulator_bo * */
74 struct hash_table
*fd_map
;
78 .mutex
= _MTX_INITIALIZER_NP
,
81 /** Per-GEM-fd state for the simulator. */
82 struct vc4_simulator_file
{
85 /* This is weird -- we make a "vc4_device" per file, even though on
86 * the kernel side this is a global. We do this so that kernel code
87 * calling us for BO allocation can get to our screen.
89 struct drm_device dev
;
91 /** Mapping from GEM handle to struct vc4_simulator_bo * */
92 struct hash_table
*bo_map
;
95 /** Wrapper for drm_vc4_bo tracking the simulator-specific state. */
96 struct vc4_simulator_bo
{
97 struct drm_vc4_bo base
;
98 struct vc4_simulator_file
*file
;
100 /** Area for this BO within sim_state->mem */
101 struct mem_block
*block
;
109 return (void *)(uintptr_t)key
;
112 static struct vc4_simulator_file
*
113 vc4_get_simulator_file_for_fd(int fd
)
115 struct hash_entry
*entry
= _mesa_hash_table_search(sim_state
.fd_map
,
117 return entry
? entry
->data
: NULL
;
120 /* A marker placed just after each BO, then checked after rendering to make
121 * sure it's still there.
123 #define BO_SENTINEL 0xfedcba98
125 #define PAGE_ALIGN2 12
128 * Allocates space in simulator memory and returns a tracking struct for it
129 * that also contains the drm_gem_cma_object struct.
131 static struct vc4_simulator_bo
*
132 vc4_create_simulator_bo(int fd
, int handle
, unsigned size
)
134 struct vc4_simulator_file
*file
= vc4_get_simulator_file_for_fd(fd
);
135 struct vc4_simulator_bo
*sim_bo
= rzalloc(file
,
136 struct vc4_simulator_bo
);
137 struct drm_vc4_bo
*bo
= &sim_bo
->base
;
138 struct drm_gem_cma_object
*obj
= &bo
->base
;
139 size
= align(size
, 4096);
142 sim_bo
->handle
= handle
;
144 mtx_lock(&sim_state
.mutex
);
145 sim_bo
->block
= u_mmAllocMem(sim_state
.heap
, size
+ 4, PAGE_ALIGN2
, 0);
146 mtx_unlock(&sim_state
.mutex
);
147 assert(sim_bo
->block
);
149 obj
->base
.size
= size
;
150 obj
->base
.dev
= &file
->dev
;
151 obj
->vaddr
= sim_state
.mem
+ sim_bo
->block
->ofs
;
152 obj
->paddr
= simpenrose_hw_addr(obj
->vaddr
);
154 *(uint32_t *)(obj
->vaddr
+ size
) = BO_SENTINEL
;
156 /* A handle of 0 is used for vc4_gem.c internal allocations that
157 * don't need to go in the lookup table.
160 mtx_lock(&sim_state
.mutex
);
161 _mesa_hash_table_insert(file
->bo_map
, int_to_key(handle
), bo
);
162 mtx_unlock(&sim_state
.mutex
);
169 vc4_free_simulator_bo(struct vc4_simulator_bo
*sim_bo
)
171 struct vc4_simulator_file
*sim_file
= sim_bo
->file
;
173 mtx_lock(&sim_state
.mutex
);
174 u_mmFreeMem(sim_bo
->block
);
175 if (sim_bo
->handle
) {
176 struct hash_entry
*entry
=
177 _mesa_hash_table_search(sim_file
->bo_map
,
178 int_to_key(sim_bo
->handle
));
179 _mesa_hash_table_remove(sim_file
->bo_map
, entry
);
181 mtx_unlock(&sim_state
.mutex
);
185 static struct vc4_simulator_bo
*
186 vc4_get_simulator_bo(struct vc4_simulator_file
*file
, int gem_handle
)
188 mtx_lock(&sim_state
.mutex
);
189 struct hash_entry
*entry
=
190 _mesa_hash_table_search(file
->bo_map
, int_to_key(gem_handle
));
191 mtx_unlock(&sim_state
.mutex
);
193 return entry
? entry
->data
: NULL
;
196 struct drm_gem_cma_object
*
197 drm_gem_cma_create(struct drm_device
*dev
, size_t size
)
199 struct vc4_screen
*screen
= dev
->screen
;
200 struct vc4_simulator_bo
*sim_bo
= vc4_create_simulator_bo(screen
->fd
,
202 return &sim_bo
->base
.base
;
206 vc4_simulator_pin_bos(struct drm_device
*dev
, struct vc4_job
*job
,
207 struct vc4_exec_info
*exec
)
209 int fd
= dev
->screen
->fd
;
210 struct vc4_simulator_file
*file
= vc4_get_simulator_file_for_fd(fd
);
211 struct drm_vc4_submit_cl
*args
= exec
->args
;
212 struct vc4_bo
**bos
= job
->bo_pointers
.base
;
214 exec
->bo_count
= args
->bo_handle_count
;
215 exec
->bo
= calloc(exec
->bo_count
, sizeof(void *));
216 for (int i
= 0; i
< exec
->bo_count
; i
++) {
217 struct vc4_bo
*bo
= bos
[i
];
218 struct vc4_simulator_bo
*sim_bo
=
219 vc4_get_simulator_bo(file
, bo
->handle
);
220 struct drm_vc4_bo
*drm_bo
= &sim_bo
->base
;
221 struct drm_gem_cma_object
*obj
= &drm_bo
->base
;
225 fprintf(stderr
, "bo hindex %d: %s\n", i
, bo
->name
);
229 memcpy(obj
->vaddr
, bo
->map
, bo
->size
);
233 /* The kernel does this validation at shader create ioctl
236 if (strcmp(bo
->name
, "code") == 0) {
237 drm_bo
->validated_shader
= vc4_validate_shader(obj
);
238 if (!drm_bo
->validated_shader
)
246 vc4_simulator_unpin_bos(struct vc4_exec_info
*exec
)
248 for (int i
= 0; i
< exec
->bo_count
; i
++) {
249 struct drm_gem_cma_object
*obj
= exec
->bo
[i
];
250 struct drm_vc4_bo
*drm_bo
= to_vc4_bo(&obj
->base
);
251 struct vc4_bo
*bo
= drm_bo
->bo
;
253 assert(*(uint32_t *)(obj
->vaddr
+
254 obj
->base
.size
) == BO_SENTINEL
);
255 memcpy(bo
->map
, obj
->vaddr
, bo
->size
);
257 if (drm_bo
->validated_shader
) {
258 free(drm_bo
->validated_shader
->texture_samples
);
259 free(drm_bo
->validated_shader
);
269 vc4_dump_to_file(struct vc4_exec_info
*exec
)
271 static int dumpno
= 0;
272 struct drm_vc4_get_hang_state
*state
;
273 struct drm_vc4_get_hang_state_bo
*bo_state
;
274 unsigned int dump_version
= 0;
276 if (!(vc4_debug
& VC4_DEBUG_DUMP
))
279 state
= calloc(1, sizeof(*state
));
282 list_for_each_entry_safe(struct drm_vc4_bo
, bo
, &exec
->unref_list
,
287 /* Add one more for the overflow area that isn't wrapped in a BO. */
288 state
->bo_count
= exec
->bo_count
+ unref_count
+ 1;
289 bo_state
= calloc(state
->bo_count
, sizeof(*bo_state
));
291 char *filename
= NULL
;
292 asprintf(&filename
, "vc4-dri-%d.dump", dumpno
++);
293 FILE *f
= fopen(filename
, "w+");
295 fprintf(stderr
, "Couldn't open %s: %s", filename
,
300 fwrite(&dump_version
, sizeof(dump_version
), 1, f
);
302 state
->ct0ca
= exec
->ct0ca
;
303 state
->ct0ea
= exec
->ct0ea
;
304 state
->ct1ca
= exec
->ct1ca
;
305 state
->ct1ea
= exec
->ct1ea
;
306 state
->start_bin
= exec
->ct0ca
;
307 state
->start_render
= exec
->ct1ca
;
308 fwrite(state
, sizeof(*state
), 1, f
);
311 for (i
= 0; i
< exec
->bo_count
; i
++) {
312 struct drm_gem_cma_object
*cma_bo
= exec
->bo
[i
];
313 bo_state
[i
].handle
= i
; /* Not used by the parser. */
314 bo_state
[i
].paddr
= cma_bo
->paddr
;
315 bo_state
[i
].size
= cma_bo
->base
.size
;
318 list_for_each_entry_safe(struct drm_vc4_bo
, bo
, &exec
->unref_list
,
320 struct drm_gem_cma_object
*cma_bo
= &bo
->base
;
321 bo_state
[i
].handle
= 0;
322 bo_state
[i
].paddr
= cma_bo
->paddr
;
323 bo_state
[i
].size
= cma_bo
->base
.size
;
327 /* Add the static overflow memory area. */
328 bo_state
[i
].handle
= exec
->bo_count
;
329 bo_state
[i
].paddr
= sim_state
.overflow
->ofs
;
330 bo_state
[i
].size
= sim_state
.overflow
->size
;
333 fwrite(bo_state
, sizeof(*bo_state
), state
->bo_count
, f
);
335 for (int i
= 0; i
< exec
->bo_count
; i
++) {
336 struct drm_gem_cma_object
*cma_bo
= exec
->bo
[i
];
337 fwrite(cma_bo
->vaddr
, cma_bo
->base
.size
, 1, f
);
340 list_for_each_entry_safe(struct drm_vc4_bo
, bo
, &exec
->unref_list
,
342 struct drm_gem_cma_object
*cma_bo
= &bo
->base
;
343 fwrite(cma_bo
->vaddr
, cma_bo
->base
.size
, 1, f
);
346 void *overflow
= calloc(1, sim_state
.overflow
->size
);
347 fwrite(overflow
, 1, sim_state
.overflow
->size
, f
);
356 vc4_simulator_flush(struct vc4_context
*vc4
,
357 struct drm_vc4_submit_cl
*args
, struct vc4_job
*job
)
359 struct vc4_screen
*screen
= vc4
->screen
;
361 struct vc4_simulator_file
*file
= vc4_get_simulator_file_for_fd(fd
);
362 struct vc4_exec_info exec
;
363 struct drm_device
*dev
= &file
->dev
;
366 memset(&exec
, 0, sizeof(exec
));
367 list_inithead(&exec
.unref_list
);
371 ret
= vc4_simulator_pin_bos(dev
, job
, &exec
);
375 ret
= vc4_cl_validate(dev
, &exec
);
379 if (vc4_debug
& VC4_DEBUG_CL
) {
380 fprintf(stderr
, "RCL:\n");
381 vc4_dump_cl(sim_state
.mem
+ exec
.ct1ca
,
382 exec
.ct1ea
- exec
.ct1ca
, true);
385 vc4_dump_to_file(&exec
);
387 if (exec
.ct0ca
!= exec
.ct0ea
) {
388 int bfc
= simpenrose_do_binning(exec
.ct0ca
, exec
.ct0ea
);
390 fprintf(stderr
, "Binning returned %d flushes, should be 1.\n",
392 fprintf(stderr
, "Relocated binning command list:\n");
393 vc4_dump_cl(sim_state
.mem
+ exec
.ct0ca
,
394 exec
.ct0ea
- exec
.ct0ca
, false);
398 int rfc
= simpenrose_do_rendering(exec
.ct1ca
, exec
.ct1ea
);
400 fprintf(stderr
, "Rendering returned %d frames, should be 1.\n",
402 fprintf(stderr
, "Relocated render command list:\n");
403 vc4_dump_cl(sim_state
.mem
+ exec
.ct1ca
,
404 exec
.ct1ea
- exec
.ct1ca
, true);
408 ret
= vc4_simulator_unpin_bos(&exec
);
412 list_for_each_entry_safe(struct drm_vc4_bo
, bo
, &exec
.unref_list
,
414 struct vc4_simulator_bo
*sim_bo
= (struct vc4_simulator_bo
*)bo
;
415 struct drm_gem_cma_object
*obj
= &sim_bo
->base
.base
;
416 list_del(&bo
->unref_head
);
417 assert(*(uint32_t *)(obj
->vaddr
+ obj
->base
.size
) ==
419 vc4_free_simulator_bo(sim_bo
);
426 * Do fixups after a BO has been opened from a handle.
428 * This could be done at DRM_IOCTL_GEM_OPEN/DRM_IOCTL_GEM_PRIME_FD_TO_HANDLE
429 * time, but we're still using drmPrimeFDToHandle() so we have this helper to
430 * be called afterward instead.
432 void vc4_simulator_open_from_handle(int fd
, int handle
, uint32_t size
)
434 vc4_create_simulator_bo(fd
, handle
, size
);
438 * Simulated ioctl(fd, DRM_VC4_CREATE_BO) implementation.
440 * Making a VC4 BO is just a matter of making a corresponding BO on the host.
443 vc4_simulator_create_bo_ioctl(int fd
, struct drm_vc4_create_bo
*args
)
446 struct drm_mode_create_dumb create
= {
449 .height
= (args
->size
+ 127) / 128,
452 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_CREATE_DUMB
, &create
);
453 assert(create
.size
>= args
->size
);
455 args
->handle
= create
.handle
;
457 vc4_create_simulator_bo(fd
, create
.handle
, args
->size
);
463 * Simulated ioctl(fd, DRM_VC4_CREATE_SHADER_BO) implementation.
465 * In simulation we defer shader validation until exec time. Just make a host
466 * BO and memcpy the contents in.
469 vc4_simulator_create_shader_bo_ioctl(int fd
,
470 struct drm_vc4_create_shader_bo
*args
)
473 struct drm_mode_create_dumb create
= {
476 .height
= (args
->size
+ 127) / 128,
479 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_CREATE_DUMB
, &create
);
482 assert(create
.size
>= args
->size
);
484 args
->handle
= create
.handle
;
486 vc4_create_simulator_bo(fd
, create
.handle
, args
->size
);
488 struct drm_mode_map_dumb map
= {
489 .handle
= create
.handle
491 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_MAP_DUMB
, &map
);
495 void *shader
= mmap(NULL
, args
->size
, PROT_READ
| PROT_WRITE
, MAP_SHARED
,
497 memcpy(shader
, (void *)(uintptr_t)args
->data
, args
->size
);
498 munmap(shader
, args
->size
);
504 * Simulated ioctl(fd, DRM_VC4_MMAP_BO) implementation.
506 * We just pass this straight through to dumb mmap.
509 vc4_simulator_mmap_bo_ioctl(int fd
, struct drm_vc4_mmap_bo
*args
)
512 struct drm_mode_map_dumb map
= {
513 .handle
= args
->handle
,
516 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_MAP_DUMB
, &map
);
517 args
->offset
= map
.offset
;
523 vc4_simulator_gem_close_ioctl(int fd
, struct drm_gem_close
*args
)
525 /* Free the simulator's internal tracking. */
526 struct vc4_simulator_file
*file
= vc4_get_simulator_file_for_fd(fd
);
527 struct vc4_simulator_bo
*sim_bo
= vc4_get_simulator_bo(file
,
530 vc4_free_simulator_bo(sim_bo
);
532 /* Pass the call on down. */
533 return drmIoctl(fd
, DRM_IOCTL_GEM_CLOSE
, args
);
537 vc4_simulator_get_param_ioctl(int fd
, struct drm_vc4_get_param
*args
)
539 switch (args
->param
) {
540 case DRM_VC4_PARAM_SUPPORTS_BRANCHES
:
541 case DRM_VC4_PARAM_SUPPORTS_ETC1
:
542 case DRM_VC4_PARAM_SUPPORTS_THREADED_FS
:
543 case DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER
:
547 case DRM_VC4_PARAM_SUPPORTS_MADVISE
:
548 case DRM_VC4_PARAM_SUPPORTS_PERFMON
:
552 case DRM_VC4_PARAM_V3D_IDENT0
:
553 args
->value
= 0x02000000;
556 case DRM_VC4_PARAM_V3D_IDENT1
:
557 args
->value
= 0x00000001;
561 fprintf(stderr
, "Unknown DRM_IOCTL_VC4_GET_PARAM(%lld)\n",
562 (long long)args
->param
);
568 vc4_simulator_ioctl(int fd
, unsigned long request
, void *args
)
571 case DRM_IOCTL_VC4_CREATE_BO
:
572 return vc4_simulator_create_bo_ioctl(fd
, args
);
573 case DRM_IOCTL_VC4_CREATE_SHADER_BO
:
574 return vc4_simulator_create_shader_bo_ioctl(fd
, args
);
575 case DRM_IOCTL_VC4_MMAP_BO
:
576 return vc4_simulator_mmap_bo_ioctl(fd
, args
);
578 case DRM_IOCTL_VC4_WAIT_BO
:
579 case DRM_IOCTL_VC4_WAIT_SEQNO
:
580 /* We do all of the vc4 rendering synchronously, so we just
581 * return immediately on the wait ioctls. This ignores any
582 * native rendering to the host BO, so it does mean we race on
583 * front buffer rendering.
587 case DRM_IOCTL_VC4_LABEL_BO
:
588 /* This is just debug information, nothing to do. */
591 case DRM_IOCTL_VC4_GET_TILING
:
592 case DRM_IOCTL_VC4_SET_TILING
:
593 /* Disable these for now, since the sharing with i965 requires
599 case DRM_IOCTL_VC4_GET_PARAM
:
600 return vc4_simulator_get_param_ioctl(fd
, args
);
602 case DRM_IOCTL_GEM_CLOSE
:
603 return vc4_simulator_gem_close_ioctl(fd
, args
);
605 case DRM_IOCTL_GEM_OPEN
:
606 case DRM_IOCTL_GEM_FLINK
:
607 return drmIoctl(fd
, request
, args
);
609 fprintf(stderr
, "Unknown ioctl 0x%08x\n", (int)request
);
615 vc4_simulator_init_global(void)
617 mtx_lock(&sim_state
.mutex
);
618 if (sim_state
.refcount
++) {
619 mtx_unlock(&sim_state
.mutex
);
623 sim_state
.mem_size
= 256 * 1024 * 1024;
624 sim_state
.mem
= calloc(sim_state
.mem_size
, 1);
627 sim_state
.heap
= u_mmInit(0, sim_state
.mem_size
);
629 /* We supply our own memory so that we can have more aperture
630 * available (256MB instead of simpenrose's default 64MB).
632 simpenrose_init_hardware_supply_mem(sim_state
.mem
, sim_state
.mem_size
);
634 /* Carve out low memory for tile allocation overflow. The kernel
635 * should be automatically handling overflow memory setup on real
636 * hardware, but for simulation we just get one shot to set up enough
637 * overflow memory before execution. This overflow mem will be used
638 * up over the whole lifetime of simpenrose (not reused on each
639 * flush), so it had better be big.
641 sim_state
.overflow
= u_mmAllocMem(sim_state
.heap
, 32 * 1024 * 1024,
643 simpenrose_supply_overflow_mem(sim_state
.overflow
->ofs
,
644 sim_state
.overflow
->size
);
646 mtx_unlock(&sim_state
.mutex
);
649 _mesa_hash_table_create(NULL
,
651 _mesa_key_pointer_equal
);
655 vc4_simulator_init(struct vc4_screen
*screen
)
657 vc4_simulator_init_global();
659 screen
->sim_file
= rzalloc(screen
, struct vc4_simulator_file
);
661 screen
->sim_file
->bo_map
=
662 _mesa_hash_table_create(screen
->sim_file
,
664 _mesa_key_pointer_equal
);
666 mtx_lock(&sim_state
.mutex
);
667 _mesa_hash_table_insert(sim_state
.fd_map
, int_to_key(screen
->fd
+ 1),
669 mtx_unlock(&sim_state
.mutex
);
671 screen
->sim_file
->dev
.screen
= screen
;
675 vc4_simulator_destroy(struct vc4_screen
*screen
)
677 mtx_lock(&sim_state
.mutex
);
678 if (!--sim_state
.refcount
) {
679 _mesa_hash_table_destroy(sim_state
.fd_map
, NULL
);
680 u_mmDestroy(sim_state
.heap
);
682 /* No memsetting it, because it contains the mutex. */
684 mtx_unlock(&sim_state
.mutex
);
687 #endif /* USE_VC4_SIMULATOR */