d2c53a5b8eb166d20d63ce51847f2f6d6d22ff5e
[mesa.git] / src / gallium / drivers / vc4 / vc4_state.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <stdio.h>
26
27 #include "pipe/p_state.h"
28 #include "util/u_inlines.h"
29 #include "util/u_math.h"
30 #include "util/u_memory.h"
31 #include "util/u_helpers.h"
32
33 #include "vc4_context.h"
34
35 static void *
36 vc4_generic_cso_state_create(const void *src, uint32_t size)
37 {
38 void *dst = calloc(1, size);
39 if (!dst)
40 return NULL;
41 memcpy(dst, src, size);
42 return dst;
43 }
44
45 static void
46 vc4_generic_cso_state_delete(struct pipe_context *pctx, void *hwcso)
47 {
48 free(hwcso);
49 }
50
51 static void
52 vc4_set_blend_color(struct pipe_context *pctx,
53 const struct pipe_blend_color *blend_color)
54 {
55 struct vc4_context *vc4 = vc4_context(pctx);
56 vc4->blend_color = *blend_color;
57 vc4->dirty |= VC4_DIRTY_BLEND_COLOR;
58 }
59
60 static void
61 vc4_set_stencil_ref(struct pipe_context *pctx,
62 const struct pipe_stencil_ref *stencil_ref)
63 {
64 struct vc4_context *vc4 = vc4_context(pctx);
65 vc4->stencil_ref =* stencil_ref;
66 vc4->dirty |= VC4_DIRTY_STENCIL_REF;
67 }
68
69 static void
70 vc4_set_clip_state(struct pipe_context *pctx,
71 const struct pipe_clip_state *clip)
72 {
73 fprintf(stderr, "clip todo\n");
74 }
75
76 static void
77 vc4_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
78 {
79 struct vc4_context *vc4 = vc4_context(pctx);
80 vc4->sample_mask = (uint16_t)sample_mask;
81 vc4->dirty |= VC4_DIRTY_SAMPLE_MASK;
82 }
83
84 static void *
85 vc4_create_rasterizer_state(struct pipe_context *pctx,
86 const struct pipe_rasterizer_state *cso)
87 {
88 struct vc4_rasterizer_state *so;
89
90 so = CALLOC_STRUCT(vc4_rasterizer_state);
91 if (!so)
92 return NULL;
93
94 so->base = *cso;
95
96 if (!(cso->cull_face & PIPE_FACE_FRONT))
97 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_FRONT;
98 if (!(cso->cull_face & PIPE_FACE_BACK))
99 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK;
100
101 /* XXX: per_vertex */
102 so->point_size = cso->point_size;
103
104 if (cso->front_ccw)
105 so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;
106
107 if (cso->offset_tri)
108 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET;
109
110 return so;
111 }
112
113 /* Blend state is baked into shaders. */
114 static void *
115 vc4_create_blend_state(struct pipe_context *pctx,
116 const struct pipe_blend_state *cso)
117 {
118 return vc4_generic_cso_state_create(cso, sizeof(*cso));
119 }
120
121 static void *
122 vc4_create_depth_stencil_alpha_state(struct pipe_context *pctx,
123 const struct pipe_depth_stencil_alpha_state *cso)
124 {
125 struct vc4_depth_stencil_alpha_state *so;
126
127 so = CALLOC_STRUCT(vc4_depth_stencil_alpha_state);
128 if (!so)
129 return NULL;
130
131 so->base = *cso;
132
133 if (cso->depth.enabled) {
134 if (cso->depth.writemask) {
135 so->config_bits[1] |= VC4_CONFIG_BITS_Z_UPDATE;
136 }
137 so->config_bits[1] |= (cso->depth.func <<
138 VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
139 } else {
140 so->config_bits[1] |= (PIPE_FUNC_ALWAYS <<
141 VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
142 }
143
144 return so;
145 }
146
147 static void
148 vc4_set_polygon_stipple(struct pipe_context *pctx,
149 const struct pipe_poly_stipple *stipple)
150 {
151 struct vc4_context *vc4 = vc4_context(pctx);
152 vc4->stipple = *stipple;
153 vc4->dirty |= VC4_DIRTY_STIPPLE;
154 }
155
156 static void
157 vc4_set_scissor_states(struct pipe_context *pctx,
158 unsigned start_slot,
159 unsigned num_scissors,
160 const struct pipe_scissor_state *scissor)
161 {
162 struct vc4_context *vc4 = vc4_context(pctx);
163
164 vc4->scissor = *scissor;
165 vc4->dirty |= VC4_DIRTY_SCISSOR;
166 }
167
168 static void
169 vc4_set_viewport_states(struct pipe_context *pctx,
170 unsigned start_slot,
171 unsigned num_viewports,
172 const struct pipe_viewport_state *viewport)
173 {
174 struct vc4_context *vc4 = vc4_context(pctx);
175 vc4->viewport = *viewport;
176 vc4->dirty |= VC4_DIRTY_VIEWPORT;
177 }
178
179 static void
180 vc4_set_vertex_buffers(struct pipe_context *pctx,
181 unsigned start_slot, unsigned count,
182 const struct pipe_vertex_buffer *vb)
183 {
184 struct vc4_context *vc4 = vc4_context(pctx);
185 struct vc4_vertexbuf_stateobj *so = &vc4->vertexbuf;
186
187 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb,
188 start_slot, count);
189 so->count = util_last_bit(so->enabled_mask);
190
191 vc4->dirty |= VC4_DIRTY_VTXBUF;
192 }
193
194 static void
195 vc4_set_index_buffer(struct pipe_context *pctx,
196 const struct pipe_index_buffer *ib)
197 {
198 struct vc4_context *vc4 = vc4_context(pctx);
199
200 if (ib) {
201 pipe_resource_reference(&vc4->indexbuf.buffer, ib->buffer);
202 vc4->indexbuf.index_size = ib->index_size;
203 vc4->indexbuf.offset = ib->offset;
204 vc4->indexbuf.user_buffer = ib->user_buffer;
205 } else {
206 pipe_resource_reference(&vc4->indexbuf.buffer, NULL);
207 }
208
209 vc4->dirty |= VC4_DIRTY_INDEXBUF;
210 }
211
212 static void
213 vc4_blend_state_bind(struct pipe_context *pctx, void *hwcso)
214 {
215 struct vc4_context *vc4 = vc4_context(pctx);
216 vc4->blend = hwcso;
217 vc4->dirty |= VC4_DIRTY_BLEND;
218 }
219
220 static void
221 vc4_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
222 {
223 struct vc4_context *vc4 = vc4_context(pctx);
224 vc4->rasterizer = hwcso;
225 vc4->dirty |= VC4_DIRTY_RASTERIZER;
226 }
227
228 static void
229 vc4_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
230 {
231 struct vc4_context *vc4 = vc4_context(pctx);
232 vc4->zsa = hwcso;
233 vc4->dirty |= VC4_DIRTY_ZSA;
234 }
235
236 static void *
237 vc4_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
238 const struct pipe_vertex_element *elements)
239 {
240 struct vc4_vertex_stateobj *so = CALLOC_STRUCT(vc4_vertex_stateobj);
241
242 if (!so)
243 return NULL;
244
245 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
246 so->num_elements = num_elements;
247
248 return so;
249 }
250
251 static void
252 vc4_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
253 {
254 struct vc4_context *vc4 = vc4_context(pctx);
255 vc4->vtx = hwcso;
256 vc4->dirty |= VC4_DIRTY_VTXSTATE;
257 }
258
259 static void
260 vc4_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
261 struct pipe_constant_buffer *cb)
262 {
263 struct vc4_context *vc4 = vc4_context(pctx);
264 struct vc4_constbuf_stateobj *so = &vc4->constbuf[shader];
265
266 assert(index == 0);
267
268 /* Note that the state tracker can unbind constant buffers by
269 * passing NULL here.
270 */
271 if (unlikely(!cb)) {
272 so->enabled_mask &= ~(1 << index);
273 so->dirty_mask &= ~(1 << index);
274 return;
275 }
276
277 assert(!cb->buffer);
278 so->cb[index].buffer_offset = cb->buffer_offset;
279 so->cb[index].buffer_size = cb->buffer_size;
280 so->cb[index].user_buffer = cb->user_buffer;
281
282 so->enabled_mask |= 1 << index;
283 so->dirty_mask |= 1 << index;
284 vc4->dirty |= VC4_DIRTY_CONSTBUF;
285 }
286
287 static void
288 vc4_set_framebuffer_state(struct pipe_context *pctx,
289 const struct pipe_framebuffer_state *framebuffer)
290 {
291 struct vc4_context *vc4 = vc4_context(pctx);
292 struct pipe_framebuffer_state *cso = &vc4->framebuffer;
293 unsigned i;
294
295 vc4_flush(pctx);
296
297 for (i = 0; i < framebuffer->nr_cbufs; i++)
298 pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]);
299 for (; i < vc4->framebuffer.nr_cbufs; i++)
300 pipe_surface_reference(&cso->cbufs[i], NULL);
301
302 cso->nr_cbufs = framebuffer->nr_cbufs;
303
304 cso->width = framebuffer->width;
305 cso->height = framebuffer->height;
306
307 pipe_surface_reference(&cso->zsbuf, framebuffer->zsbuf);
308
309 vc4->dirty |= VC4_DIRTY_FRAMEBUFFER;
310 }
311
312 static struct vc4_texture_stateobj *
313 vc4_get_stage_tex(struct vc4_context *vc4, unsigned shader)
314 {
315 vc4->dirty |= VC4_DIRTY_TEXSTATE;
316
317 switch (shader) {
318 case PIPE_SHADER_FRAGMENT:
319 vc4->dirty |= VC4_DIRTY_FRAGTEX;
320 return &vc4->fragtex;
321 break;
322 case PIPE_SHADER_VERTEX:
323 vc4->dirty |= VC4_DIRTY_VERTTEX;
324 return &vc4->verttex;
325 break;
326 default:
327 fprintf(stderr, "Unknown shader target %d\n", shader);
328 abort();
329 }
330 }
331
332 static void *
333 vc4_create_sampler_state(struct pipe_context *pctx,
334 const struct pipe_sampler_state *cso)
335 {
336 return vc4_generic_cso_state_create(cso, sizeof(*cso));
337 }
338
339 static void
340 vc4_sampler_states_bind(struct pipe_context *pctx,
341 unsigned shader, unsigned start,
342 unsigned nr, void **hwcso)
343 {
344 struct vc4_context *vc4 = vc4_context(pctx);
345 struct vc4_texture_stateobj *stage_tex = vc4_get_stage_tex(vc4, shader);
346
347 assert(start == 0);
348 unsigned i;
349 unsigned new_nr = 0;
350
351 for (i = 0; i < nr; i++) {
352 if (hwcso[i])
353 new_nr = i + 1;
354 stage_tex->samplers[i] = hwcso[i];
355 stage_tex->dirty_samplers |= (1 << i);
356 }
357
358 for (; i < stage_tex->num_samplers; i++) {
359 stage_tex->samplers[i] = NULL;
360 stage_tex->dirty_samplers |= (1 << i);
361 }
362
363 stage_tex->num_samplers = new_nr;
364 }
365
366 static struct pipe_sampler_view *
367 vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
368 const struct pipe_sampler_view *cso)
369 {
370 struct pipe_sampler_view *so = malloc(sizeof(*so));
371
372 if (!so)
373 return NULL;
374
375 *so = *cso;
376 pipe_reference(NULL, &prsc->reference);
377 so->texture = prsc;
378 so->reference.count = 1;
379 so->context = pctx;
380
381 return so;
382 }
383
384 static void
385 vc4_sampler_view_destroy(struct pipe_context *pctx,
386 struct pipe_sampler_view *view)
387 {
388 pipe_resource_reference(&view->texture, NULL);
389 free(view);
390 }
391
392 static void
393 vc4_set_sampler_views(struct pipe_context *pctx, unsigned shader,
394 unsigned start, unsigned nr,
395 struct pipe_sampler_view **views)
396 {
397 struct vc4_context *vc4 = vc4_context(pctx);
398 struct vc4_texture_stateobj *stage_tex = vc4_get_stage_tex(vc4, shader);
399 unsigned i;
400 unsigned new_nr = 0;
401
402 assert(start == 0);
403
404 vc4->dirty |= VC4_DIRTY_TEXSTATE;
405
406 for (i = 0; i < nr; i++) {
407 if (views[i])
408 new_nr = i + 1;
409 pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
410 stage_tex->dirty_samplers |= (1 << i);
411 }
412
413 for (; i < stage_tex->num_textures; i++) {
414 pipe_sampler_view_reference(&stage_tex->textures[i], NULL);
415 stage_tex->dirty_samplers |= (1 << i);
416 }
417
418 stage_tex->num_textures = new_nr;
419 }
420
421 void
422 vc4_state_init(struct pipe_context *pctx)
423 {
424 pctx->set_blend_color = vc4_set_blend_color;
425 pctx->set_stencil_ref = vc4_set_stencil_ref;
426 pctx->set_clip_state = vc4_set_clip_state;
427 pctx->set_sample_mask = vc4_set_sample_mask;
428 pctx->set_constant_buffer = vc4_set_constant_buffer;
429 pctx->set_framebuffer_state = vc4_set_framebuffer_state;
430 pctx->set_polygon_stipple = vc4_set_polygon_stipple;
431 pctx->set_scissor_states = vc4_set_scissor_states;
432 pctx->set_viewport_states = vc4_set_viewport_states;
433
434 pctx->set_vertex_buffers = vc4_set_vertex_buffers;
435 pctx->set_index_buffer = vc4_set_index_buffer;
436
437 pctx->create_blend_state = vc4_create_blend_state;
438 pctx->bind_blend_state = vc4_blend_state_bind;
439 pctx->delete_blend_state = vc4_generic_cso_state_delete;
440
441 pctx->create_rasterizer_state = vc4_create_rasterizer_state;
442 pctx->bind_rasterizer_state = vc4_rasterizer_state_bind;
443 pctx->delete_rasterizer_state = vc4_generic_cso_state_delete;
444
445 pctx->create_depth_stencil_alpha_state = vc4_create_depth_stencil_alpha_state;
446 pctx->bind_depth_stencil_alpha_state = vc4_zsa_state_bind;
447 pctx->delete_depth_stencil_alpha_state = vc4_generic_cso_state_delete;
448
449 pctx->create_vertex_elements_state = vc4_vertex_state_create;
450 pctx->delete_vertex_elements_state = vc4_generic_cso_state_delete;
451 pctx->bind_vertex_elements_state = vc4_vertex_state_bind;
452
453 pctx->create_sampler_state = vc4_create_sampler_state;
454 pctx->delete_sampler_state = vc4_generic_cso_state_delete;
455 pctx->bind_sampler_states = vc4_sampler_states_bind;
456
457 pctx->create_sampler_view = vc4_create_sampler_view;
458 pctx->sampler_view_destroy = vc4_sampler_view_destroy;
459 pctx->set_sampler_views = vc4_set_sampler_views;
460 }