src/gallium/drivers/vc4/vc4_state.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "pipe/p_state.h"
  26 #include "util/u_inlines.h"
  27 #include "util/u_math.h"
  28 #include "util/u_memory.h"
  29 #include "util/u_helpers.h"
  30
  31 #include "vc4_context.h"
  32
  33 static void *
  34 vc4_generic_cso_state_create(const void *src, uint32_t size)
  35 {
  36         void *dst = calloc(1, size);
  37         if (!dst)
  38                 return NULL;
  39         memcpy(dst, src, size);
  40         return dst;
  41 }
  42
  43 static void
  44 vc4_generic_cso_state_delete(struct pipe_context *pctx, void *hwcso)
  45 {
  46         free(hwcso);
  47 }
  48
  49 static void
  50 vc4_set_blend_color(struct pipe_context *pctx,
  51                     const struct pipe_blend_color *blend_color)
  52 {
  53         struct vc4_context *vc4 = vc4_context(pctx);
  54         vc4->blend_color = *blend_color;
  55         vc4->dirty |= VC4_DIRTY_BLEND_COLOR;
  56 }
  57
  58 static void
  59 vc4_set_stencil_ref(struct pipe_context *pctx,
  60                     const struct pipe_stencil_ref *stencil_ref)
  61 {
  62         struct vc4_context *vc4 = vc4_context(pctx);
  63         vc4->stencil_ref =* stencil_ref;
  64         vc4->dirty |= VC4_DIRTY_STENCIL_REF;
  65 }
  66
  67 static void
  68 vc4_set_clip_state(struct pipe_context *pctx,
  69                    const struct pipe_clip_state *clip)
  70 {
  71         fprintf(stderr, "clip todo\n");
  72 }
  73
  74 static void
  75 vc4_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
  76 {
  77         struct vc4_context *vc4 = vc4_context(pctx);
  78         vc4->sample_mask = (uint16_t)sample_mask;
  79         vc4->dirty |= VC4_DIRTY_SAMPLE_MASK;
  80 }
  81
  82 static void *
  83 vc4_create_rasterizer_state(struct pipe_context *pctx,
  84                             const struct pipe_rasterizer_state *cso)
  85 {
  86         struct vc4_rasterizer_state *so;
  87
  88         so = CALLOC_STRUCT(vc4_rasterizer_state);
  89         if (!so)
  90                 return NULL;
  91
  92         so->base = *cso;
  93
  94         if (!(cso->cull_face & PIPE_FACE_FRONT))
  95                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_FRONT;
  96         if (!(cso->cull_face & PIPE_FACE_BACK))
  97                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK;
  98
  99         /* XXX: per_vertex */
 100         so->point_size = cso->point_size;
 101
 102         if (cso->front_ccw)
 103                 so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;
 104
 105         if (cso->offset_tri)
 106                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET;
 107
 108         return so;
 109 }
 110
 111 /* Blend state is baked into shaders. */
 112 static void *
 113 vc4_create_blend_state(struct pipe_context *pctx,
 114                        const struct pipe_blend_state *cso)
 115 {
 116         return vc4_generic_cso_state_create(cso, sizeof(*cso));
 117 }
 118
 119 /**
 120  * The TLB_STENCIL_SETUP data has a little bitfield for common writemask
 121  * values, so you don't have to do a separate writemask setup.
 122  */
 123 static uint8_t
 124 tlb_stencil_setup_writemask(uint8_t mask)
 125 {
 126         switch (mask) {
 127         case 0x1: return 0;
 128         case 0x3: return 1;
 129         case 0xf: return 2;
 130         case 0xff: return 3;
 131         default: return 0xff;
 132         }
 133 }
 134
 135 static uint32_t
 136 tlb_stencil_setup_bits(const struct pipe_stencil_state *state,
 137                        uint8_t writemask_bits)
 138 {
 139         static const uint8_t op_map[] = {
 140                 [PIPE_STENCIL_OP_ZERO] = 0,
 141                 [PIPE_STENCIL_OP_KEEP] = 1,
 142                 [PIPE_STENCIL_OP_REPLACE] = 2,
 143                 [PIPE_STENCIL_OP_INCR] = 3,
 144                 [PIPE_STENCIL_OP_DECR] = 4,
 145                 [PIPE_STENCIL_OP_INVERT] = 5,
 146                 [PIPE_STENCIL_OP_INCR_WRAP] = 6,
 147                 [PIPE_STENCIL_OP_DECR_WRAP] = 7,
 148         };
 149         uint32_t bits = 0;
 150
 151         if (writemask_bits != 0xff)
 152                 bits |= writemask_bits << 28;
 153         bits |= op_map[state->zfail_op] << 25;
 154         bits |= op_map[state->zpass_op] << 22;
 155         bits |= op_map[state->fail_op] << 19;
 156         bits |= state->func << 16;
 157         /* Ref is filled in at uniform upload time */
 158         bits |= state->valuemask << 0;
 159
 160         return bits;
 161 }
 162
 163 static void *
 164 vc4_create_depth_stencil_alpha_state(struct pipe_context *pctx,
 165                                      const struct pipe_depth_stencil_alpha_state *cso)
 166 {
 167         struct vc4_depth_stencil_alpha_state *so;
 168
 169         so = CALLOC_STRUCT(vc4_depth_stencil_alpha_state);
 170         if (!so)
 171                 return NULL;
 172
 173         so->base = *cso;
 174
 175         if (cso->depth.enabled) {
 176                 if (cso->depth.writemask) {
 177                         so->config_bits[1] |= VC4_CONFIG_BITS_Z_UPDATE;
 178                 }
 179                 so->config_bits[1] |= (cso->depth.func <<
 180                                        VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
 181         } else {
 182                 so->config_bits[1] |= (PIPE_FUNC_ALWAYS <<
 183                                        VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
 184         }
 185
 186         if (cso->stencil[0].enabled) {
 187                 const struct pipe_stencil_state *front = &cso->stencil[0];
 188                 const struct pipe_stencil_state *back = &cso->stencil[1];
 189
 190                 uint8_t front_writemask_bits =
 191                         tlb_stencil_setup_writemask(front->writemask);
 192                 uint8_t back_writemask_bits =
 193                         tlb_stencil_setup_writemask(back->writemask);
 194
 195                 so->stencil_uniforms[0] =
 196                         tlb_stencil_setup_bits(front, front_writemask_bits);
 197                 if (back->enabled) {
 198                         so->stencil_uniforms[0] |= (1 << 30);
 199                         so->stencil_uniforms[1] =
 200                                 tlb_stencil_setup_bits(back, back_writemask_bits);
 201                         so->stencil_uniforms[1] |= (2 << 30);
 202                 } else {
 203                         so->stencil_uniforms[0] |= (3 << 30);
 204                 }
 205
 206                 if (front_writemask_bits == 0xff ||
 207                     back_writemask_bits == 0xff) {
 208                         so->stencil_uniforms[2] = (front_writemask_bits |
 209                                                    (back_writemask_bits << 8));
 210                 }
 211         }
 212
 213         return so;
 214 }
 215
 216 static void
 217 vc4_set_polygon_stipple(struct pipe_context *pctx,
 218                         const struct pipe_poly_stipple *stipple)
 219 {
 220         struct vc4_context *vc4 = vc4_context(pctx);
 221         vc4->stipple = *stipple;
 222         vc4->dirty |= VC4_DIRTY_STIPPLE;
 223 }
 224
 225 static void
 226 vc4_set_scissor_states(struct pipe_context *pctx,
 227                        unsigned start_slot,
 228                        unsigned num_scissors,
 229                        const struct pipe_scissor_state *scissor)
 230 {
 231         struct vc4_context *vc4 = vc4_context(pctx);
 232
 233         vc4->scissor = *scissor;
 234         vc4->dirty |= VC4_DIRTY_SCISSOR;
 235 }
 236
 237 static void
 238 vc4_set_viewport_states(struct pipe_context *pctx,
 239                         unsigned start_slot,
 240                         unsigned num_viewports,
 241                         const struct pipe_viewport_state *viewport)
 242 {
 243         struct vc4_context *vc4 = vc4_context(pctx);
 244         vc4->viewport = *viewport;
 245         vc4->dirty |= VC4_DIRTY_VIEWPORT;
 246 }
 247
 248 static void
 249 vc4_set_vertex_buffers(struct pipe_context *pctx,
 250                        unsigned start_slot, unsigned count,
 251                        const struct pipe_vertex_buffer *vb)
 252 {
 253         struct vc4_context *vc4 = vc4_context(pctx);
 254         struct vc4_vertexbuf_stateobj *so = &vc4->vertexbuf;
 255
 256         util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb,
 257                                      start_slot, count);
 258         so->count = util_last_bit(so->enabled_mask);
 259
 260         vc4->dirty |= VC4_DIRTY_VTXBUF;
 261 }
 262
 263 static void
 264 vc4_set_index_buffer(struct pipe_context *pctx,
 265                      const struct pipe_index_buffer *ib)
 266 {
 267         struct vc4_context *vc4 = vc4_context(pctx);
 268
 269         if (ib) {
 270                 pipe_resource_reference(&vc4->indexbuf.buffer, ib->buffer);
 271                 vc4->indexbuf.index_size = ib->index_size;
 272                 vc4->indexbuf.offset = ib->offset;
 273                 vc4->indexbuf.user_buffer = ib->user_buffer;
 274         } else {
 275                 pipe_resource_reference(&vc4->indexbuf.buffer, NULL);
 276         }
 277
 278         vc4->dirty |= VC4_DIRTY_INDEXBUF;
 279 }
 280
 281 static void
 282 vc4_blend_state_bind(struct pipe_context *pctx, void *hwcso)
 283 {
 284         struct vc4_context *vc4 = vc4_context(pctx);
 285         vc4->blend = hwcso;
 286         vc4->dirty |= VC4_DIRTY_BLEND;
 287 }
 288
 289 static void
 290 vc4_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
 291 {
 292         struct vc4_context *vc4 = vc4_context(pctx);
 293         struct vc4_rasterizer_state *rast = hwcso;
 294
 295         if (vc4->rasterizer && rast &&
 296             vc4->rasterizer->base.flatshade != rast->base.flatshade) {
 297                 vc4->dirty |= VC4_DIRTY_FLAT_SHADE_FLAGS;
 298         }
 299
 300         vc4->rasterizer = hwcso;
 301         vc4->dirty |= VC4_DIRTY_RASTERIZER;
 302 }
 303
 304 static void
 305 vc4_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
 306 {
 307         struct vc4_context *vc4 = vc4_context(pctx);
 308         vc4->zsa = hwcso;
 309         vc4->dirty |= VC4_DIRTY_ZSA;
 310 }
 311
 312 static void *
 313 vc4_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
 314                         const struct pipe_vertex_element *elements)
 315 {
 316         struct vc4_vertex_stateobj *so = CALLOC_STRUCT(vc4_vertex_stateobj);
 317
 318         if (!so)
 319                 return NULL;
 320
 321         memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
 322         so->num_elements = num_elements;
 323
 324         return so;
 325 }
 326
 327 static void
 328 vc4_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
 329 {
 330         struct vc4_context *vc4 = vc4_context(pctx);
 331         vc4->vtx = hwcso;
 332         vc4->dirty |= VC4_DIRTY_VTXSTATE;
 333 }
 334
 335 static void
 336 vc4_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
 337                         struct pipe_constant_buffer *cb)
 338 {
 339         struct vc4_context *vc4 = vc4_context(pctx);
 340         struct vc4_constbuf_stateobj *so = &vc4->constbuf[shader];
 341
 342         assert(index == 0);
 343
 344         /* Note that the state tracker can unbind constant buffers by
 345          * passing NULL here.
 346          */
 347         if (unlikely(!cb)) {
 348                 so->enabled_mask &= ~(1 << index);
 349                 so->dirty_mask &= ~(1 << index);
 350                 return;
 351         }
 352
 353         assert(!cb->buffer);
 354         so->cb[index].buffer_offset = cb->buffer_offset;
 355         so->cb[index].buffer_size   = cb->buffer_size;
 356         so->cb[index].user_buffer   = cb->user_buffer;
 357
 358         so->enabled_mask |= 1 << index;
 359         so->dirty_mask |= 1 << index;
 360         vc4->dirty |= VC4_DIRTY_CONSTBUF;
 361 }
 362
 363 static void
 364 vc4_set_framebuffer_state(struct pipe_context *pctx,
 365                           const struct pipe_framebuffer_state *framebuffer)
 366 {
 367         struct vc4_context *vc4 = vc4_context(pctx);
 368         struct pipe_framebuffer_state *cso = &vc4->framebuffer;
 369         unsigned i;
 370
 371         vc4_flush(pctx);
 372
 373         for (i = 0; i < framebuffer->nr_cbufs; i++)
 374                 pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]);
 375         for (; i < vc4->framebuffer.nr_cbufs; i++)
 376                 pipe_surface_reference(&cso->cbufs[i], NULL);
 377
 378         cso->nr_cbufs = framebuffer->nr_cbufs;
 379
 380         cso->width = framebuffer->width;
 381         cso->height = framebuffer->height;
 382
 383         pipe_surface_reference(&cso->zsbuf, framebuffer->zsbuf);
 384
 385         vc4->dirty |= VC4_DIRTY_FRAMEBUFFER;
 386 }
 387
 388 static struct vc4_texture_stateobj *
 389 vc4_get_stage_tex(struct vc4_context *vc4, unsigned shader)
 390 {
 391         vc4->dirty |= VC4_DIRTY_TEXSTATE;
 392
 393         switch (shader) {
 394         case PIPE_SHADER_FRAGMENT:
 395                 vc4->dirty |= VC4_DIRTY_FRAGTEX;
 396                 return &vc4->fragtex;
 397                 break;
 398         case PIPE_SHADER_VERTEX:
 399                 vc4->dirty |= VC4_DIRTY_VERTTEX;
 400                 return &vc4->verttex;
 401                 break;
 402         default:
 403                 fprintf(stderr, "Unknown shader target %d\n", shader);
 404                 abort();
 405         }
 406 }
 407
 408 static void *
 409 vc4_create_sampler_state(struct pipe_context *pctx,
 410                          const struct pipe_sampler_state *cso)
 411 {
 412         return vc4_generic_cso_state_create(cso, sizeof(*cso));
 413 }
 414
 415 static void
 416 vc4_sampler_states_bind(struct pipe_context *pctx,
 417                         unsigned shader, unsigned start,
 418                         unsigned nr, void **hwcso)
 419 {
 420         struct vc4_context *vc4 = vc4_context(pctx);
 421         struct vc4_texture_stateobj *stage_tex = vc4_get_stage_tex(vc4, shader);
 422
 423         assert(start == 0);
 424         unsigned i;
 425         unsigned new_nr = 0;
 426
 427         for (i = 0; i < nr; i++) {
 428                 if (hwcso[i])
 429                         new_nr = i + 1;
 430                 stage_tex->samplers[i] = hwcso[i];
 431                 stage_tex->dirty_samplers |= (1 << i);
 432         }
 433
 434         for (; i < stage_tex->num_samplers; i++) {
 435                 stage_tex->samplers[i] = NULL;
 436                 stage_tex->dirty_samplers |= (1 << i);
 437         }
 438
 439         stage_tex->num_samplers = new_nr;
 440 }
 441
 442 static struct pipe_sampler_view *
 443 vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
 444                         const struct pipe_sampler_view *cso)
 445 {
 446         struct pipe_sampler_view *so = malloc(sizeof(*so));
 447
 448         if (!so)
 449                 return NULL;
 450
 451         *so = *cso;
 452         pipe_reference(NULL, &prsc->reference);
 453         so->texture = prsc;
 454         so->reference.count = 1;
 455         so->context = pctx;
 456
 457         return so;
 458 }
 459
 460 static void
 461 vc4_sampler_view_destroy(struct pipe_context *pctx,
 462                          struct pipe_sampler_view *view)
 463 {
 464         pipe_resource_reference(&view->texture, NULL);
 465         free(view);
 466 }
 467
 468 static void
 469 vc4_set_sampler_views(struct pipe_context *pctx, unsigned shader,
 470                       unsigned start, unsigned nr,
 471                       struct pipe_sampler_view **views)
 472 {
 473         struct vc4_context *vc4 = vc4_context(pctx);
 474         struct vc4_texture_stateobj *stage_tex = vc4_get_stage_tex(vc4, shader);
 475         unsigned i;
 476         unsigned new_nr = 0;
 477
 478         assert(start == 0);
 479
 480         vc4->dirty |= VC4_DIRTY_TEXSTATE;
 481
 482         for (i = 0; i < nr; i++) {
 483                 if (views[i])
 484                         new_nr = i + 1;
 485                 pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
 486                 stage_tex->dirty_samplers |= (1 << i);
 487         }
 488
 489         for (; i < stage_tex->num_textures; i++) {
 490                 pipe_sampler_view_reference(&stage_tex->textures[i], NULL);
 491                 stage_tex->dirty_samplers |= (1 << i);
 492         }
 493
 494         stage_tex->num_textures = new_nr;
 495 }
 496
 497 void
 498 vc4_state_init(struct pipe_context *pctx)
 499 {
 500         pctx->set_blend_color = vc4_set_blend_color;
 501         pctx->set_stencil_ref = vc4_set_stencil_ref;
 502         pctx->set_clip_state = vc4_set_clip_state;
 503         pctx->set_sample_mask = vc4_set_sample_mask;
 504         pctx->set_constant_buffer = vc4_set_constant_buffer;
 505         pctx->set_framebuffer_state = vc4_set_framebuffer_state;
 506         pctx->set_polygon_stipple = vc4_set_polygon_stipple;
 507         pctx->set_scissor_states = vc4_set_scissor_states;
 508         pctx->set_viewport_states = vc4_set_viewport_states;
 509
 510         pctx->set_vertex_buffers = vc4_set_vertex_buffers;
 511         pctx->set_index_buffer = vc4_set_index_buffer;
 512
 513         pctx->create_blend_state = vc4_create_blend_state;
 514         pctx->bind_blend_state = vc4_blend_state_bind;
 515         pctx->delete_blend_state = vc4_generic_cso_state_delete;
 516
 517         pctx->create_rasterizer_state = vc4_create_rasterizer_state;
 518         pctx->bind_rasterizer_state = vc4_rasterizer_state_bind;
 519         pctx->delete_rasterizer_state = vc4_generic_cso_state_delete;
 520
 521         pctx->create_depth_stencil_alpha_state = vc4_create_depth_stencil_alpha_state;
 522         pctx->bind_depth_stencil_alpha_state = vc4_zsa_state_bind;
 523         pctx->delete_depth_stencil_alpha_state = vc4_generic_cso_state_delete;
 524
 525         pctx->create_vertex_elements_state = vc4_vertex_state_create;
 526         pctx->delete_vertex_elements_state = vc4_generic_cso_state_delete;
 527         pctx->bind_vertex_elements_state = vc4_vertex_state_bind;
 528
 529         pctx->create_sampler_state = vc4_create_sampler_state;
 530         pctx->delete_sampler_state = vc4_generic_cso_state_delete;
 531         pctx->bind_sampler_states = vc4_sampler_states_bind;
 532
 533         pctx->create_sampler_view = vc4_create_sampler_view;
 534         pctx->sampler_view_destroy = vc4_sampler_view_destroy;
 535         pctx->set_sampler_views = vc4_set_sampler_views;
 536 }