src/gallium/drivers/vc4/vc4_state.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "pipe/p_state.h"
  26 #include "util/u_inlines.h"
  27 #include "util/u_math.h"
  28 #include "util/u_memory.h"
  29 #include "util/u_helpers.h"
  30
  31 #include "vc4_context.h"
  32
  33 static void *
  34 vc4_generic_cso_state_create(const void *src, uint32_t size)
  35 {
  36         void *dst = calloc(1, size);
  37         if (!dst)
  38                 return NULL;
  39         memcpy(dst, src, size);
  40         return dst;
  41 }
  42
  43 static void
  44 vc4_generic_cso_state_delete(struct pipe_context *pctx, void *hwcso)
  45 {
  46         free(hwcso);
  47 }
  48
  49 static void
  50 vc4_set_blend_color(struct pipe_context *pctx,
  51                     const struct pipe_blend_color *blend_color)
  52 {
  53         struct vc4_context *vc4 = vc4_context(pctx);
  54         vc4->blend_color = *blend_color;
  55         vc4->dirty |= VC4_DIRTY_BLEND_COLOR;
  56 }
  57
  58 static void
  59 vc4_set_stencil_ref(struct pipe_context *pctx,
  60                     const struct pipe_stencil_ref *stencil_ref)
  61 {
  62         struct vc4_context *vc4 = vc4_context(pctx);
  63         vc4->stencil_ref =* stencil_ref;
  64         vc4->dirty |= VC4_DIRTY_STENCIL_REF;
  65 }
  66
  67 static void
  68 vc4_set_clip_state(struct pipe_context *pctx,
  69                    const struct pipe_clip_state *clip)
  70 {
  71         fprintf(stderr, "clip todo\n");
  72 }
  73
  74 static void
  75 vc4_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
  76 {
  77         struct vc4_context *vc4 = vc4_context(pctx);
  78         vc4->sample_mask = (uint16_t)sample_mask;
  79         vc4->dirty |= VC4_DIRTY_SAMPLE_MASK;
  80 }
  81
  82 static uint16_t
  83 float_to_187_half(float f)
  84 {
  85         return fui(f) >> 16;
  86 }
  87
  88 static void *
  89 vc4_create_rasterizer_state(struct pipe_context *pctx,
  90                             const struct pipe_rasterizer_state *cso)
  91 {
  92         struct vc4_rasterizer_state *so;
  93
  94         so = CALLOC_STRUCT(vc4_rasterizer_state);
  95         if (!so)
  96                 return NULL;
  97
  98         so->base = *cso;
  99
 100         if (!(cso->cull_face & PIPE_FACE_FRONT))
 101                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_FRONT;
 102         if (!(cso->cull_face & PIPE_FACE_BACK))
 103                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK;
 104
 105         /* XXX: per_vertex */
 106         so->point_size = cso->point_size;
 107
 108         if (cso->front_ccw)
 109                 so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;
 110
 111         if (cso->offset_tri) {
 112                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET;
 113
 114                 so->offset_units = float_to_187_half(cso->offset_units);
 115                 so->offset_factor = float_to_187_half(cso->offset_scale);
 116         }
 117
 118         return so;
 119 }
 120
 121 /* Blend state is baked into shaders. */
 122 static void *
 123 vc4_create_blend_state(struct pipe_context *pctx,
 124                        const struct pipe_blend_state *cso)
 125 {
 126         return vc4_generic_cso_state_create(cso, sizeof(*cso));
 127 }
 128
 129 /**
 130  * The TLB_STENCIL_SETUP data has a little bitfield for common writemask
 131  * values, so you don't have to do a separate writemask setup.
 132  */
 133 static uint8_t
 134 tlb_stencil_setup_writemask(uint8_t mask)
 135 {
 136         switch (mask) {
 137         case 0x1: return 0;
 138         case 0x3: return 1;
 139         case 0xf: return 2;
 140         case 0xff: return 3;
 141         default: return 0xff;
 142         }
 143 }
 144
 145 static uint32_t
 146 tlb_stencil_setup_bits(const struct pipe_stencil_state *state,
 147                        uint8_t writemask_bits)
 148 {
 149         static const uint8_t op_map[] = {
 150                 [PIPE_STENCIL_OP_ZERO] = 0,
 151                 [PIPE_STENCIL_OP_KEEP] = 1,
 152                 [PIPE_STENCIL_OP_REPLACE] = 2,
 153                 [PIPE_STENCIL_OP_INCR] = 3,
 154                 [PIPE_STENCIL_OP_DECR] = 4,
 155                 [PIPE_STENCIL_OP_INVERT] = 5,
 156                 [PIPE_STENCIL_OP_INCR_WRAP] = 6,
 157                 [PIPE_STENCIL_OP_DECR_WRAP] = 7,
 158         };
 159         uint32_t bits = 0;
 160
 161         if (writemask_bits != 0xff)
 162                 bits |= writemask_bits << 28;
 163         bits |= op_map[state->zfail_op] << 25;
 164         bits |= op_map[state->zpass_op] << 22;
 165         bits |= op_map[state->fail_op] << 19;
 166         bits |= state->func << 16;
 167         /* Ref is filled in at uniform upload time */
 168         bits |= state->valuemask << 0;
 169
 170         return bits;
 171 }
 172
 173 static void *
 174 vc4_create_depth_stencil_alpha_state(struct pipe_context *pctx,
 175                                      const struct pipe_depth_stencil_alpha_state *cso)
 176 {
 177         struct vc4_depth_stencil_alpha_state *so;
 178
 179         so = CALLOC_STRUCT(vc4_depth_stencil_alpha_state);
 180         if (!so)
 181                 return NULL;
 182
 183         so->base = *cso;
 184
 185         if (cso->depth.enabled) {
 186                 if (cso->depth.writemask) {
 187                         so->config_bits[1] |= VC4_CONFIG_BITS_Z_UPDATE;
 188                 }
 189                 so->config_bits[1] |= (cso->depth.func <<
 190                                        VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
 191         } else {
 192                 so->config_bits[1] |= (PIPE_FUNC_ALWAYS <<
 193                                        VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
 194         }
 195
 196         if (cso->stencil[0].enabled) {
 197                 const struct pipe_stencil_state *front = &cso->stencil[0];
 198                 const struct pipe_stencil_state *back = &cso->stencil[1];
 199
 200                 uint8_t front_writemask_bits =
 201                         tlb_stencil_setup_writemask(front->writemask);
 202                 uint8_t back_writemask_bits =
 203                         tlb_stencil_setup_writemask(back->writemask);
 204
 205                 so->stencil_uniforms[0] =
 206                         tlb_stencil_setup_bits(front, front_writemask_bits);
 207                 if (back->enabled) {
 208                         so->stencil_uniforms[0] |= (1 << 30);
 209                         so->stencil_uniforms[1] =
 210                                 tlb_stencil_setup_bits(back, back_writemask_bits);
 211                         so->stencil_uniforms[1] |= (2 << 30);
 212                 } else {
 213                         so->stencil_uniforms[0] |= (3 << 30);
 214                 }
 215
 216                 if (front_writemask_bits == 0xff ||
 217                     back_writemask_bits == 0xff) {
 218                         so->stencil_uniforms[2] = (front_writemask_bits |
 219                                                    (back_writemask_bits << 8));
 220                 }
 221         }
 222
 223         return so;
 224 }
 225
 226 static void
 227 vc4_set_polygon_stipple(struct pipe_context *pctx,
 228                         const struct pipe_poly_stipple *stipple)
 229 {
 230         struct vc4_context *vc4 = vc4_context(pctx);
 231         vc4->stipple = *stipple;
 232         vc4->dirty |= VC4_DIRTY_STIPPLE;
 233 }
 234
 235 static void
 236 vc4_set_scissor_states(struct pipe_context *pctx,
 237                        unsigned start_slot,
 238                        unsigned num_scissors,
 239                        const struct pipe_scissor_state *scissor)
 240 {
 241         struct vc4_context *vc4 = vc4_context(pctx);
 242
 243         vc4->scissor = *scissor;
 244         vc4->dirty |= VC4_DIRTY_SCISSOR;
 245 }
 246
 247 static void
 248 vc4_set_viewport_states(struct pipe_context *pctx,
 249                         unsigned start_slot,
 250                         unsigned num_viewports,
 251                         const struct pipe_viewport_state *viewport)
 252 {
 253         struct vc4_context *vc4 = vc4_context(pctx);
 254         vc4->viewport = *viewport;
 255         vc4->dirty |= VC4_DIRTY_VIEWPORT;
 256 }
 257
 258 static void
 259 vc4_set_vertex_buffers(struct pipe_context *pctx,
 260                        unsigned start_slot, unsigned count,
 261                        const struct pipe_vertex_buffer *vb)
 262 {
 263         struct vc4_context *vc4 = vc4_context(pctx);
 264         struct vc4_vertexbuf_stateobj *so = &vc4->vertexbuf;
 265
 266         util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb,
 267                                      start_slot, count);
 268         so->count = util_last_bit(so->enabled_mask);
 269
 270         vc4->dirty |= VC4_DIRTY_VTXBUF;
 271 }
 272
 273 static void
 274 vc4_set_index_buffer(struct pipe_context *pctx,
 275                      const struct pipe_index_buffer *ib)
 276 {
 277         struct vc4_context *vc4 = vc4_context(pctx);
 278
 279         if (ib) {
 280                 pipe_resource_reference(&vc4->indexbuf.buffer, ib->buffer);
 281                 vc4->indexbuf.index_size = ib->index_size;
 282                 vc4->indexbuf.offset = ib->offset;
 283                 vc4->indexbuf.user_buffer = ib->user_buffer;
 284         } else {
 285                 pipe_resource_reference(&vc4->indexbuf.buffer, NULL);
 286         }
 287
 288         vc4->dirty |= VC4_DIRTY_INDEXBUF;
 289 }
 290
 291 static void
 292 vc4_blend_state_bind(struct pipe_context *pctx, void *hwcso)
 293 {
 294         struct vc4_context *vc4 = vc4_context(pctx);
 295         vc4->blend = hwcso;
 296         vc4->dirty |= VC4_DIRTY_BLEND;
 297 }
 298
 299 static void
 300 vc4_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
 301 {
 302         struct vc4_context *vc4 = vc4_context(pctx);
 303         struct vc4_rasterizer_state *rast = hwcso;
 304
 305         if (vc4->rasterizer && rast &&
 306             vc4->rasterizer->base.flatshade != rast->base.flatshade) {
 307                 vc4->dirty |= VC4_DIRTY_FLAT_SHADE_FLAGS;
 308         }
 309
 310         vc4->rasterizer = hwcso;
 311         vc4->dirty |= VC4_DIRTY_RASTERIZER;
 312 }
 313
 314 static void
 315 vc4_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
 316 {
 317         struct vc4_context *vc4 = vc4_context(pctx);
 318         vc4->zsa = hwcso;
 319         vc4->dirty |= VC4_DIRTY_ZSA;
 320 }
 321
 322 static void *
 323 vc4_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
 324                         const struct pipe_vertex_element *elements)
 325 {
 326         struct vc4_vertex_stateobj *so = CALLOC_STRUCT(vc4_vertex_stateobj);
 327
 328         if (!so)
 329                 return NULL;
 330
 331         memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
 332         so->num_elements = num_elements;
 333
 334         return so;
 335 }
 336
 337 static void
 338 vc4_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
 339 {
 340         struct vc4_context *vc4 = vc4_context(pctx);
 341         vc4->vtx = hwcso;
 342         vc4->dirty |= VC4_DIRTY_VTXSTATE;
 343 }
 344
 345 static void
 346 vc4_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
 347                         struct pipe_constant_buffer *cb)
 348 {
 349         struct vc4_context *vc4 = vc4_context(pctx);
 350         struct vc4_constbuf_stateobj *so = &vc4->constbuf[shader];
 351
 352         assert(index == 0);
 353
 354         /* Note that the state tracker can unbind constant buffers by
 355          * passing NULL here.
 356          */
 357         if (unlikely(!cb)) {
 358                 so->enabled_mask &= ~(1 << index);
 359                 so->dirty_mask &= ~(1 << index);
 360                 return;
 361         }
 362
 363         assert(!cb->buffer);
 364         so->cb[index].buffer_offset = cb->buffer_offset;
 365         so->cb[index].buffer_size   = cb->buffer_size;
 366         so->cb[index].user_buffer   = cb->user_buffer;
 367
 368         so->enabled_mask |= 1 << index;
 369         so->dirty_mask |= 1 << index;
 370         vc4->dirty |= VC4_DIRTY_CONSTBUF;
 371 }
 372
 373 static void
 374 vc4_set_framebuffer_state(struct pipe_context *pctx,
 375                           const struct pipe_framebuffer_state *framebuffer)
 376 {
 377         struct vc4_context *vc4 = vc4_context(pctx);
 378         struct pipe_framebuffer_state *cso = &vc4->framebuffer;
 379         unsigned i;
 380
 381         vc4_flush(pctx);
 382
 383         for (i = 0; i < framebuffer->nr_cbufs; i++)
 384                 pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]);
 385         for (; i < vc4->framebuffer.nr_cbufs; i++)
 386                 pipe_surface_reference(&cso->cbufs[i], NULL);
 387
 388         cso->nr_cbufs = framebuffer->nr_cbufs;
 389
 390         cso->width = framebuffer->width;
 391         cso->height = framebuffer->height;
 392
 393         pipe_surface_reference(&cso->zsbuf, framebuffer->zsbuf);
 394
 395         vc4->dirty |= VC4_DIRTY_FRAMEBUFFER;
 396 }
 397
 398 static struct vc4_texture_stateobj *
 399 vc4_get_stage_tex(struct vc4_context *vc4, unsigned shader)
 400 {
 401         vc4->dirty |= VC4_DIRTY_TEXSTATE;
 402
 403         switch (shader) {
 404         case PIPE_SHADER_FRAGMENT:
 405                 vc4->dirty |= VC4_DIRTY_FRAGTEX;
 406                 return &vc4->fragtex;
 407                 break;
 408         case PIPE_SHADER_VERTEX:
 409                 vc4->dirty |= VC4_DIRTY_VERTTEX;
 410                 return &vc4->verttex;
 411                 break;
 412         default:
 413                 fprintf(stderr, "Unknown shader target %d\n", shader);
 414                 abort();
 415         }
 416 }
 417
 418 static void *
 419 vc4_create_sampler_state(struct pipe_context *pctx,
 420                          const struct pipe_sampler_state *cso)
 421 {
 422         return vc4_generic_cso_state_create(cso, sizeof(*cso));
 423 }
 424
 425 static void
 426 vc4_sampler_states_bind(struct pipe_context *pctx,
 427                         unsigned shader, unsigned start,
 428                         unsigned nr, void **hwcso)
 429 {
 430         struct vc4_context *vc4 = vc4_context(pctx);
 431         struct vc4_texture_stateobj *stage_tex = vc4_get_stage_tex(vc4, shader);
 432
 433         assert(start == 0);
 434         unsigned i;
 435         unsigned new_nr = 0;
 436
 437         for (i = 0; i < nr; i++) {
 438                 if (hwcso[i])
 439                         new_nr = i + 1;
 440                 stage_tex->samplers[i] = hwcso[i];
 441                 stage_tex->dirty_samplers |= (1 << i);
 442         }
 443
 444         for (; i < stage_tex->num_samplers; i++) {
 445                 stage_tex->samplers[i] = NULL;
 446                 stage_tex->dirty_samplers |= (1 << i);
 447         }
 448
 449         stage_tex->num_samplers = new_nr;
 450 }
 451
 452 static struct pipe_sampler_view *
 453 vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
 454                         const struct pipe_sampler_view *cso)
 455 {
 456         struct pipe_sampler_view *so = malloc(sizeof(*so));
 457
 458         if (!so)
 459                 return NULL;
 460
 461         *so = *cso;
 462         pipe_reference(NULL, &prsc->reference);
 463         so->texture = prsc;
 464         so->reference.count = 1;
 465         so->context = pctx;
 466
 467         return so;
 468 }
 469
 470 static void
 471 vc4_sampler_view_destroy(struct pipe_context *pctx,
 472                          struct pipe_sampler_view *view)
 473 {
 474         pipe_resource_reference(&view->texture, NULL);
 475         free(view);
 476 }
 477
 478 static void
 479 vc4_set_sampler_views(struct pipe_context *pctx, unsigned shader,
 480                       unsigned start, unsigned nr,
 481                       struct pipe_sampler_view **views)
 482 {
 483         struct vc4_context *vc4 = vc4_context(pctx);
 484         struct vc4_texture_stateobj *stage_tex = vc4_get_stage_tex(vc4, shader);
 485         unsigned i;
 486         unsigned new_nr = 0;
 487
 488         assert(start == 0);
 489
 490         vc4->dirty |= VC4_DIRTY_TEXSTATE;
 491
 492         for (i = 0; i < nr; i++) {
 493                 if (views[i])
 494                         new_nr = i + 1;
 495                 pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
 496                 stage_tex->dirty_samplers |= (1 << i);
 497         }
 498
 499         for (; i < stage_tex->num_textures; i++) {
 500                 pipe_sampler_view_reference(&stage_tex->textures[i], NULL);
 501                 stage_tex->dirty_samplers |= (1 << i);
 502         }
 503
 504         stage_tex->num_textures = new_nr;
 505 }
 506
 507 void
 508 vc4_state_init(struct pipe_context *pctx)
 509 {
 510         pctx->set_blend_color = vc4_set_blend_color;
 511         pctx->set_stencil_ref = vc4_set_stencil_ref;
 512         pctx->set_clip_state = vc4_set_clip_state;
 513         pctx->set_sample_mask = vc4_set_sample_mask;
 514         pctx->set_constant_buffer = vc4_set_constant_buffer;
 515         pctx->set_framebuffer_state = vc4_set_framebuffer_state;
 516         pctx->set_polygon_stipple = vc4_set_polygon_stipple;
 517         pctx->set_scissor_states = vc4_set_scissor_states;
 518         pctx->set_viewport_states = vc4_set_viewport_states;
 519
 520         pctx->set_vertex_buffers = vc4_set_vertex_buffers;
 521         pctx->set_index_buffer = vc4_set_index_buffer;
 522
 523         pctx->create_blend_state = vc4_create_blend_state;
 524         pctx->bind_blend_state = vc4_blend_state_bind;
 525         pctx->delete_blend_state = vc4_generic_cso_state_delete;
 526
 527         pctx->create_rasterizer_state = vc4_create_rasterizer_state;
 528         pctx->bind_rasterizer_state = vc4_rasterizer_state_bind;
 529         pctx->delete_rasterizer_state = vc4_generic_cso_state_delete;
 530
 531         pctx->create_depth_stencil_alpha_state = vc4_create_depth_stencil_alpha_state;
 532         pctx->bind_depth_stencil_alpha_state = vc4_zsa_state_bind;
 533         pctx->delete_depth_stencil_alpha_state = vc4_generic_cso_state_delete;
 534
 535         pctx->create_vertex_elements_state = vc4_vertex_state_create;
 536         pctx->delete_vertex_elements_state = vc4_generic_cso_state_delete;
 537         pctx->bind_vertex_elements_state = vc4_vertex_state_bind;
 538
 539         pctx->create_sampler_state = vc4_create_sampler_state;
 540         pctx->delete_sampler_state = vc4_generic_cso_state_delete;
 541         pctx->bind_sampler_states = vc4_sampler_states_bind;
 542
 543         pctx->create_sampler_view = vc4_create_sampler_view;
 544         pctx->sampler_view_destroy = vc4_sampler_view_destroy;
 545         pctx->set_sampler_views = vc4_set_sampler_views;
 546 }