2 * Copyright © 2015-2017 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "util/u_format.h"
25 #include "util/u_surface.h"
26 #include "util/u_blitter.h"
27 #include "vc5_context.h"
30 static struct pipe_surface
*
31 vc5_get_blit_surface(struct pipe_context
*pctx
,
32 struct pipe_resource
*prsc
, unsigned level
)
34 struct pipe_surface tmpl
;
36 memset(&tmpl
, 0, sizeof(tmpl
));
37 tmpl
.format
= prsc
->format
;
38 tmpl
.u
.tex
.level
= level
;
39 tmpl
.u
.tex
.first_layer
= 0;
40 tmpl
.u
.tex
.last_layer
= 0;
42 return pctx
->create_surface(pctx
, prsc
, &tmpl
);
46 is_tile_unaligned(unsigned size
, unsigned tile_size
)
48 return size
& (tile_size
- 1);
52 vc5_tile_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*info
)
54 struct vc5_context
*vc5
= vc5_context(pctx
);
55 bool msaa
= (info
->src
.resource
->nr_samples
> 1 ||
56 info
->dst
.resource
->nr_samples
> 1);
57 int tile_width
= msaa
? 32 : 64;
58 int tile_height
= msaa
? 32 : 64;
60 if (util_format_is_depth_or_stencil(info
->dst
.resource
->format
))
63 if (info
->scissor_enable
)
66 if ((info
->mask
& PIPE_MASK_RGBA
) == 0)
69 if (info
->dst
.box
.x
!= info
->src
.box
.x
||
70 info
->dst
.box
.y
!= info
->src
.box
.y
||
71 info
->dst
.box
.width
!= info
->src
.box
.width
||
72 info
->dst
.box
.height
!= info
->src
.box
.height
) {
76 int dst_surface_width
= u_minify(info
->dst
.resource
->width0
,
78 int dst_surface_height
= u_minify(info
->dst
.resource
->height0
,
80 if (is_tile_unaligned(info
->dst
.box
.x
, tile_width
) ||
81 is_tile_unaligned(info
->dst
.box
.y
, tile_height
) ||
82 (is_tile_unaligned(info
->dst
.box
.width
, tile_width
) &&
83 info
->dst
.box
.x
+ info
->dst
.box
.width
!= dst_surface_width
) ||
84 (is_tile_unaligned(info
->dst
.box
.height
, tile_height
) &&
85 info
->dst
.box
.y
+ info
->dst
.box
.height
!= dst_surface_height
)) {
89 /* VC5_PACKET_LOAD_TILE_BUFFER_GENERAL uses the
90 * VC5_PACKET_TILE_RENDERING_MODE_CONFIG's width (determined by our
91 * destination surface) to determine the stride. This may be wrong
92 * when reading from texture miplevels > 0, which are stored in
93 * POT-sized areas. For MSAA, the tile addresses are computed
94 * explicitly by the RCL, but still use the destination width to
95 * determine the stride (which could be fixed by explicitly supplying
98 struct vc5_resource
*rsc
= vc5_resource(info
->src
.resource
);
102 if (info
->src
.resource
->nr_samples
> 1)
103 stride
= align(dst_surface_width
, 32) * 4 * rsc
->cpp
;
104 /* XXX else if (rsc->slices[info->src.level].tiling == VC5_TILING_FORMAT_T)
105 stride = align(dst_surface_width * rsc->cpp, 128); */
107 stride
= align(dst_surface_width
* rsc
->cpp
, 16);
109 if (stride
!= rsc
->slices
[info
->src
.level
].stride
)
112 if (info
->dst
.resource
->format
!= info
->src
.resource
->format
)
116 fprintf(stderr
, "RCL blit from %d,%d to %d,%d (%d,%d)\n",
122 info
->dst
.box
.height
);
125 struct pipe_surface
*dst_surf
=
126 vc5_get_blit_surface(pctx
, info
->dst
.resource
, info
->dst
.level
);
127 struct pipe_surface
*src_surf
=
128 vc5_get_blit_surface(pctx
, info
->src
.resource
, info
->src
.level
);
130 vc5_flush_jobs_reading_resource(vc5
, info
->src
.resource
);
132 struct vc5_job
*job
= vc5_get_job(vc5
, dst_surf
, NULL
);
133 pipe_surface_reference(&job
->color_read
, src_surf
);
135 /* If we're resolving from MSAA to single sample, we still need to run
136 * the engine in MSAA mode for the load.
138 if (!job
->msaa
&& info
->src
.resource
->nr_samples
> 1) {
140 job
->tile_width
= 32;
141 job
->tile_height
= 32;
144 job
->draw_min_x
= info
->dst
.box
.x
;
145 job
->draw_min_y
= info
->dst
.box
.y
;
146 job
->draw_max_x
= info
->dst
.box
.x
+ info
->dst
.box
.width
;
147 job
->draw_max_y
= info
->dst
.box
.y
+ info
->dst
.box
.height
;
148 job
->draw_width
= dst_surf
->width
;
149 job
->draw_height
= dst_surf
->height
;
151 job
->tile_width
= tile_width
;
152 job
->tile_height
= tile_height
;
154 job
->needs_flush
= true;
155 job
->resolve
|= PIPE_CLEAR_COLOR
;
157 vc5_job_submit(vc5
, job
);
159 pipe_surface_reference(&dst_surf
, NULL
);
160 pipe_surface_reference(&src_surf
, NULL
);
167 vc5_blitter_save(struct vc5_context
*vc5
)
169 util_blitter_save_fragment_constant_buffer_slot(vc5
->blitter
,
170 vc5
->constbuf
[PIPE_SHADER_FRAGMENT
].cb
);
171 util_blitter_save_vertex_buffer_slot(vc5
->blitter
, vc5
->vertexbuf
.vb
);
172 util_blitter_save_vertex_elements(vc5
->blitter
, vc5
->vtx
);
173 util_blitter_save_vertex_shader(vc5
->blitter
, vc5
->prog
.bind_vs
);
174 util_blitter_save_so_targets(vc5
->blitter
, vc5
->streamout
.num_targets
,
175 vc5
->streamout
.targets
);
176 util_blitter_save_rasterizer(vc5
->blitter
, vc5
->rasterizer
);
177 util_blitter_save_viewport(vc5
->blitter
, &vc5
->viewport
);
178 util_blitter_save_scissor(vc5
->blitter
, &vc5
->scissor
);
179 util_blitter_save_fragment_shader(vc5
->blitter
, vc5
->prog
.bind_fs
);
180 util_blitter_save_blend(vc5
->blitter
, vc5
->blend
);
181 util_blitter_save_depth_stencil_alpha(vc5
->blitter
, vc5
->zsa
);
182 util_blitter_save_stencil_ref(vc5
->blitter
, &vc5
->stencil_ref
);
183 util_blitter_save_sample_mask(vc5
->blitter
, vc5
->sample_mask
);
184 util_blitter_save_framebuffer(vc5
->blitter
, &vc5
->framebuffer
);
185 util_blitter_save_fragment_sampler_states(vc5
->blitter
,
186 vc5
->fragtex
.num_samplers
,
187 (void **)vc5
->fragtex
.samplers
);
188 util_blitter_save_fragment_sampler_views(vc5
->blitter
,
189 vc5
->fragtex
.num_textures
, vc5
->fragtex
.textures
);
190 util_blitter_save_so_targets(vc5
->blitter
, vc5
->streamout
.num_targets
,
191 vc5
->streamout
.targets
);
195 vc5_render_blit(struct pipe_context
*ctx
, struct pipe_blit_info
*info
)
197 struct vc5_context
*vc5
= vc5_context(ctx
);
199 if (!util_blitter_is_blit_supported(vc5
->blitter
, info
)) {
200 fprintf(stderr
, "blit unsupported %s -> %s\n",
201 util_format_short_name(info
->src
.resource
->format
),
202 util_format_short_name(info
->dst
.resource
->format
));
206 vc5_blitter_save(vc5
);
207 util_blitter_blit(vc5
->blitter
, info
);
212 /* Optimal hardware path for blitting pixels.
213 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
216 vc5_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
218 struct pipe_blit_info info
= *blit_info
;
221 if (vc5_tile_blit(pctx
, blit_info
))
225 vc5_render_blit(pctx
, &info
);