2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "pipe/p_context.h"
31 #include "pipe/p_state.h"
32 #include "util/bitset.h"
33 #include "util/slab.h"
39 void vc5_job_add_bo(struct vc5_job
*job
, struct vc5_bo
*bo
);
43 #include "vc5_bufmgr.h"
44 #include "vc5_resource.h"
47 #ifdef USE_VC5_SIMULATOR
48 #define using_vc5_simulator true
50 #define using_vc5_simulator false
53 #define VC5_DIRTY_BLEND (1 << 0)
54 #define VC5_DIRTY_RASTERIZER (1 << 1)
55 #define VC5_DIRTY_ZSA (1 << 2)
56 #define VC5_DIRTY_FRAGTEX (1 << 3)
57 #define VC5_DIRTY_VERTTEX (1 << 4)
59 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
60 #define VC5_DIRTY_STENCIL_REF (1 << 8)
61 #define VC5_DIRTY_SAMPLE_MASK (1 << 9)
62 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
63 #define VC5_DIRTY_STIPPLE (1 << 11)
64 #define VC5_DIRTY_VIEWPORT (1 << 12)
65 #define VC5_DIRTY_CONSTBUF (1 << 13)
66 #define VC5_DIRTY_VTXSTATE (1 << 14)
67 #define VC5_DIRTY_VTXBUF (1 << 15)
68 #define VC5_DIRTY_SCISSOR (1 << 17)
69 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
70 #define VC5_DIRTY_PRIM_MODE (1 << 19)
71 #define VC5_DIRTY_CLIP (1 << 20)
72 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
73 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
74 #define VC5_DIRTY_COMPILED_CS (1 << 23)
75 #define VC5_DIRTY_COMPILED_VS (1 << 24)
76 #define VC5_DIRTY_COMPILED_FS (1 << 25)
77 #define VC5_DIRTY_FS_INPUTS (1 << 26)
78 #define VC5_DIRTY_STREAMOUT (1 << 27)
80 #define VC5_MAX_FS_INPUTS 64
82 struct vc5_sampler_view
{
83 struct pipe_sampler_view base
;
86 /* Precomputed swizzles to pass in to the shader key. */
89 uint8_t texture_shader_state
[32];
92 struct vc5_sampler_state
{
93 struct pipe_sampler_state base
;
97 uint8_t texture_shader_state
[32];
100 struct vc5_texture_stateobj
{
101 struct pipe_sampler_view
*textures
[PIPE_MAX_SAMPLERS
];
102 unsigned num_textures
;
103 struct pipe_sampler_state
*samplers
[PIPE_MAX_SAMPLERS
];
104 unsigned num_samplers
;
105 struct vc5_cl_reloc texture_state
[PIPE_MAX_SAMPLERS
];
108 struct vc5_shader_uniform_info
{
109 enum quniform_contents
*contents
;
114 struct vc5_uncompiled_shader
{
115 /** A name for this program, so you can track it in shader-db output. */
117 /** How many variants of this program were compiled, for shader-db. */
118 uint32_t compiled_variant_count
;
119 struct pipe_shader_state base
;
120 uint32_t num_tf_outputs
;
121 struct v3d_varying_slot
*tf_outputs
;
122 uint16_t tf_specs
[PIPE_MAX_SO_BUFFERS
];
123 uint32_t num_tf_specs
;
126 struct vc5_compiled_shader
{
130 struct v3d_prog_data
*base
;
131 struct v3d_vs_prog_data
*vs
;
132 struct v3d_fs_prog_data
*fs
;
136 * VC5_DIRTY_* flags that, when set in vc5->dirty, mean that the
137 * uniforms have to be rewritten (and therefore the shader state
140 uint32_t uniform_dirty_bits
;
143 struct vc5_program_stateobj
{
144 struct vc5_uncompiled_shader
*bind_vs
, *bind_fs
;
145 struct vc5_compiled_shader
*cs
, *vs
, *fs
;
148 struct vc5_constbuf_stateobj
{
149 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
150 uint32_t enabled_mask
;
154 struct vc5_vertexbuf_stateobj
{
155 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
157 uint32_t enabled_mask
;
161 struct vc5_vertex_stateobj
{
162 struct pipe_vertex_element pipe
[PIPE_MAX_ATTRIBS
];
163 unsigned num_elements
;
166 struct vc5_streamout_stateobj
{
167 struct pipe_stream_output_target
*targets
[PIPE_MAX_SO_BUFFERS
];
168 unsigned num_targets
;
171 /* Hash table key for vc5->jobs */
173 struct pipe_surface
*cbufs
[4];
174 struct pipe_surface
*zsbuf
;
178 * A complete bin/render job.
180 * This is all of the state necessary to submit a bin/render to the kernel.
181 * We want to be able to have multiple in progress at a time, so that we don't
182 * need to flush an existing CL just to switch to rendering to a new render
183 * target (which would mean reading back from the old render target when
184 * starting to render to it again).
187 struct vc5_context
*vc5
;
190 struct vc5_cl indirect
;
191 struct vc5_bo
*tile_alloc
;
192 uint32_t shader_rec_count
;
194 struct drm_vc5_submit_cl submit
;
197 * Set of all BOs referenced by the job. This will be used for making
198 * the list of BOs that the kernel will need to have paged in to
202 /* Size of the submit.bo_handles array. */
203 uint32_t bo_handles_size
;
205 /** @{ Surfaces to submit rendering for. */
206 struct pipe_surface
*cbufs
[4];
207 struct pipe_surface
*zsbuf
;
210 * Bounding box of the scissor across all queued drawing.
212 * Note that the max values are exclusive.
220 * Width/height of the color framebuffer being rendered to,
221 * for VC5_TILE_RENDERING_MODE_CONFIG.
224 uint32_t draw_height
;
226 /** @{ Tile information, depending on MSAA and float color buffer. */
227 uint32_t draw_tiles_x
; /** @< Number of tiles wide for framebuffer. */
228 uint32_t draw_tiles_y
; /** @< Number of tiles high for framebuffer. */
230 uint32_t tile_width
; /** @< Width of a tile. */
231 uint32_t tile_height
; /** @< Height of a tile. */
232 /** maximum internal_bpp of all color render targets. */
233 uint32_t internal_bpp
;
235 /** Whether the current rendering is in a 4X MSAA tile buffer. */
239 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
243 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
244 * (either clears or draws).
247 uint32_t clear_color
[2];
248 uint32_t clear_zs
; /**< 24-bit unorm depth/stencil */
251 * Set if some drawing (triangles, blits, or just a glClear()) has
252 * been done to the FBO, meaning that we need to
253 * DRM_IOCTL_VC5_SUBMIT_CL.
260 * Number of draw calls (not counting full buffer clears) queued in
263 uint32_t draw_calls_queued
;
265 struct vc5_job_key key
;
269 struct pipe_context base
;
272 struct vc5_screen
*screen
;
274 /** The 3D rendering job for the currently bound FBO. */
277 /* Map from struct vc5_job_key to the job for that FBO.
279 struct hash_table
*jobs
;
282 * Map from vc5_resource to a job writing to that resource.
284 * Primarily for flushing jobs rendering to textures that are now
287 struct hash_table
*write_jobs
;
289 struct slab_child_pool transfer_pool
;
290 struct blitter_context
*blitter
;
292 /** bitfield of VC5_DIRTY_* */
295 struct primconvert_context
*primconvert
;
297 struct hash_table
*fs_cache
, *vs_cache
;
298 uint32_t next_uncompiled_program_id
;
299 uint64_t next_compiled_program_id
;
301 struct vc5_compiler_state
*compiler_state
;
305 /** Maximum index buffer valid for the current shader_rec. */
307 /** Last index bias baked into the current shader_rec. */
308 uint32_t last_index_bias
;
310 /** Seqno of the last CL flush's job. */
311 uint64_t last_emit_seqno
;
313 struct u_upload_mgr
*uploader
;
315 /** @{ Current pipeline state objects */
316 struct pipe_scissor_state scissor
;
317 struct pipe_blend_state
*blend
;
318 struct vc5_rasterizer_state
*rasterizer
;
319 struct vc5_depth_stencil_alpha_state
*zsa
;
321 struct vc5_texture_stateobj verttex
, fragtex
;
323 struct vc5_program_stateobj prog
;
325 struct vc5_vertex_stateobj
*vtx
;
328 struct pipe_blend_color f
;
331 struct pipe_stencil_ref stencil_ref
;
332 unsigned sample_mask
;
333 struct pipe_framebuffer_state framebuffer
;
334 struct pipe_poly_stipple stipple
;
335 struct pipe_clip_state clip
;
336 struct pipe_viewport_state viewport
;
337 struct vc5_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
338 struct vc5_vertexbuf_stateobj vertexbuf
;
339 struct vc5_streamout_stateobj streamout
;
343 struct vc5_rasterizer_state
{
344 struct pipe_rasterizer_state base
;
346 /* VC5_CONFIGURATION_BITS */
347 uint8_t config_bits
[3];
352 * Half-float (1/8/7 bits) value of polygon offset units for
353 * VC5_PACKET_DEPTH_OFFSET
355 uint16_t offset_units
;
357 * Half-float (1/8/7 bits) value of polygon offset scale for
358 * VC5_PACKET_DEPTH_OFFSET
360 uint16_t offset_factor
;
363 struct vc5_depth_stencil_alpha_state
{
364 struct pipe_depth_stencil_alpha_state base
;
368 /** Uniforms for stencil state.
370 * Index 0 is either the front config, or the front-and-back config.
371 * Index 1 is the back config if doing separate back stencil.
372 * Index 2 is the writemask config if it's not a common mask value.
374 uint32_t stencil_uniforms
[3];
377 #define perf_debug(...) do { \
378 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
379 fprintf(stderr, __VA_ARGS__); \
382 static inline struct vc5_context
*
383 vc5_context(struct pipe_context
*pcontext
)
385 return (struct vc5_context
*)pcontext
;
388 static inline struct vc5_sampler_view
*
389 vc5_sampler_view(struct pipe_sampler_view
*psview
)
391 return (struct vc5_sampler_view
*)psview
;
394 static inline struct vc5_sampler_state
*
395 vc5_sampler_state(struct pipe_sampler_state
*psampler
)
397 return (struct vc5_sampler_state
*)psampler
;
400 struct pipe_context
*vc5_context_create(struct pipe_screen
*pscreen
,
401 void *priv
, unsigned flags
);
402 void vc5_draw_init(struct pipe_context
*pctx
);
403 void vc5_state_init(struct pipe_context
*pctx
);
404 void vc5_program_init(struct pipe_context
*pctx
);
405 void vc5_program_fini(struct pipe_context
*pctx
);
406 void vc5_query_init(struct pipe_context
*pctx
);
408 void vc5_simulator_init(struct vc5_screen
*screen
);
409 void vc5_simulator_init(struct vc5_screen
*screen
);
410 void vc5_simulator_destroy(struct vc5_screen
*screen
);
411 void vc5_simulator_destroy(struct vc5_screen
*screen
);
412 int vc5_simulator_flush(struct vc5_context
*vc5
,
413 struct drm_vc5_submit_cl
*args
,
414 struct vc5_job
*job
);
415 int vc5_simulator_ioctl(int fd
, unsigned long request
, void *arg
);
416 void vc5_simulator_open_from_handle(int fd
, uint32_t winsys_stride
,
417 int handle
, uint32_t size
);
420 vc5_ioctl(int fd
, unsigned long request
, void *arg
)
422 if (using_vc5_simulator
)
423 return vc5_simulator_ioctl(fd
, request
, arg
);
425 return drmIoctl(fd
, request
, arg
);
428 void vc5_set_shader_uniform_dirty_flags(struct vc5_compiled_shader
*shader
);
429 struct vc5_cl_reloc
vc5_write_uniforms(struct vc5_context
*vc5
,
430 struct vc5_compiled_shader
*shader
,
431 struct vc5_constbuf_stateobj
*cb
,
432 struct vc5_texture_stateobj
*texstate
);
434 void vc5_flush(struct pipe_context
*pctx
);
435 void vc5_job_init(struct vc5_context
*vc5
);
436 struct vc5_job
*vc5_get_job(struct vc5_context
*vc5
,
437 struct pipe_surface
**cbufs
,
438 struct pipe_surface
*zsbuf
);
439 struct vc5_job
*vc5_get_job_for_fbo(struct vc5_context
*vc5
);
440 void vc5_job_add_bo(struct vc5_job
*job
, struct vc5_bo
*bo
);
441 void vc5_job_submit(struct vc5_context
*vc5
, struct vc5_job
*job
);
442 void vc5_flush_jobs_writing_resource(struct vc5_context
*vc5
,
443 struct pipe_resource
*prsc
);
444 void vc5_flush_jobs_reading_resource(struct vc5_context
*vc5
,
445 struct pipe_resource
*prsc
);
446 void vc5_emit_state(struct pipe_context
*pctx
);
447 void vc5_update_compiled_shaders(struct vc5_context
*vc5
, uint8_t prim_mode
);
449 bool vc5_rt_format_supported(enum pipe_format f
);
450 bool vc5_tex_format_supported(enum pipe_format f
);
451 uint8_t vc5_get_rt_format(enum pipe_format f
);
452 uint8_t vc5_get_tex_format(enum pipe_format f
);
453 uint8_t vc5_get_tex_return_size(enum pipe_format f
);
454 uint8_t vc5_get_tex_return_channels(enum pipe_format f
);
455 const uint8_t *vc5_get_format_swizzle(enum pipe_format f
);
456 void vc5_get_internal_type_bpp_for_output_format(uint32_t format
,
460 void vc5_init_query_functions(struct vc5_context
*vc5
);
461 void vc5_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
);
462 void vc5_blitter_save(struct vc5_context
*vc5
);
463 void vc5_emit_rcl(struct vc5_job
*job
);
466 #endif /* VC5_CONTEXT_H */