2 * Copyright © 2014-2017 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "util/u_blitter.h"
25 #include "util/u_prim.h"
26 #include "util/u_format.h"
27 #include "util/u_pack_color.h"
28 #include "util/u_prim_restart.h"
29 #include "util/u_upload_mgr.h"
30 #include "indices/u_primconvert.h"
32 #include "vc5_context.h"
33 #include "vc5_resource.h"
35 #include "broadcom/compiler/v3d_compiler.h"
36 #include "broadcom/common/v3d_macros.h"
37 #include "broadcom/cle/v3dx_pack.h"
40 * Does the initial bining command list setup for drawing to a given FBO.
43 vc5_start_draw(struct vc5_context
*vc5
)
45 struct vc5_job
*job
= vc5
->job
;
50 /* Get space to emit our BCL state, using a branch to jump to a new BO
53 vc5_cl_ensure_space_with_branch(&job
->bcl
, 256 /* XXX */);
55 job
->submit
.bcl_start
= job
->bcl
.bo
->offset
;
56 vc5_job_add_bo(job
, job
->bcl
.bo
);
58 job
->tile_alloc
= vc5_bo_alloc(vc5
->screen
, 1024 * 1024, "tile alloc");
59 uint32_t tsda_per_tile_size
= vc5
->screen
->devinfo
.ver
>= 40 ? 256 : 64;
60 job
->tile_state
= vc5_bo_alloc(vc5
->screen
,
67 /* "Binning mode lists start with a Tile Binning Mode Configuration
70 * Part1 signals the end of binning config setup.
72 cl_emit(&job
->bcl
, TILE_BINNING_MODE_CONFIGURATION_PART2
, config
) {
73 config
.tile_allocation_memory_address
=
74 cl_address(job
->tile_alloc
, 0);
75 config
.tile_allocation_memory_size
= job
->tile_alloc
->size
;
79 cl_emit(&job
->bcl
, TILE_BINNING_MODE_CONFIGURATION_PART1
, config
) {
81 config
.width_in_pixels_minus_1
= vc5
->framebuffer
.width
- 1;
82 config
.height_in_pixels_minus_1
= vc5
->framebuffer
.height
- 1;
83 config
.number_of_render_targets_minus_1
=
84 MAX2(vc5
->framebuffer
.nr_cbufs
, 1) - 1;
85 #else /* V3D_VERSION < 40 */
86 config
.tile_state_data_array_base_address
=
87 cl_address(job
->tile_state
, 0);
89 config
.width_in_tiles
= job
->draw_tiles_x
;
90 config
.height_in_tiles
= job
->draw_tiles_y
;
92 config
.number_of_render_targets
=
93 MAX2(vc5
->framebuffer
.nr_cbufs
, 1);
94 #endif /* V3D_VERSION < 40 */
96 config
.multisample_mode_4x
= job
->msaa
;
98 config
.maximum_bpp_of_all_render_targets
= job
->internal_bpp
;
101 /* There's definitely nothing in the VCD cache we want. */
102 cl_emit(&job
->bcl
, FLUSH_VCD_CACHE
, bin
);
104 /* Disable any leftover OQ state from another job. */
105 cl_emit(&job
->bcl
, OCCLUSION_QUERY_COUNTER
, counter
);
107 /* "Binning mode lists must have a Start Tile Binning item (6) after
108 * any prefix state data before the binning list proper starts."
110 cl_emit(&job
->bcl
, START_TILE_BINNING
, bin
);
112 job
->needs_flush
= true;
113 job
->draw_width
= vc5
->framebuffer
.width
;
114 job
->draw_height
= vc5
->framebuffer
.height
;
118 vc5_predraw_check_textures(struct pipe_context
*pctx
,
119 struct vc5_texture_stateobj
*stage_tex
)
121 struct vc5_context
*vc5
= vc5_context(pctx
);
123 for (int i
= 0; i
< stage_tex
->num_textures
; i
++) {
124 struct pipe_sampler_view
*view
= stage_tex
->textures
[i
];
128 vc5_flush_jobs_writing_resource(vc5
, view
->texture
);
133 vc5_emit_gl_shader_state(struct vc5_context
*vc5
,
134 const struct pipe_draw_info
*info
)
136 struct vc5_job
*job
= vc5
->job
;
137 /* VC5_DIRTY_VTXSTATE */
138 struct vc5_vertex_stateobj
*vtx
= vc5
->vtx
;
139 /* VC5_DIRTY_VTXBUF */
140 struct vc5_vertexbuf_stateobj
*vertexbuf
= &vc5
->vertexbuf
;
142 /* Upload the uniforms to the indirect CL first */
143 struct vc5_cl_reloc fs_uniforms
=
144 vc5_write_uniforms(vc5
, vc5
->prog
.fs
,
145 &vc5
->constbuf
[PIPE_SHADER_FRAGMENT
],
147 struct vc5_cl_reloc vs_uniforms
=
148 vc5_write_uniforms(vc5
, vc5
->prog
.vs
,
149 &vc5
->constbuf
[PIPE_SHADER_VERTEX
],
151 struct vc5_cl_reloc cs_uniforms
=
152 vc5_write_uniforms(vc5
, vc5
->prog
.cs
,
153 &vc5
->constbuf
[PIPE_SHADER_VERTEX
],
156 /* See GFXH-930 workaround below */
157 uint32_t num_elements_to_emit
= MAX2(vtx
->num_elements
, 1);
158 uint32_t shader_rec_offset
=
159 vc5_cl_ensure_space(&job
->indirect
,
160 cl_packet_length(GL_SHADER_STATE_RECORD
) +
161 num_elements_to_emit
*
162 cl_packet_length(GL_SHADER_STATE_ATTRIBUTE_RECORD
),
165 cl_emit(&job
->indirect
, GL_SHADER_STATE_RECORD
, shader
) {
166 shader
.enable_clipping
= true;
167 /* VC5_DIRTY_PRIM_MODE | VC5_DIRTY_RASTERIZER */
168 shader
.point_size_in_shaded_vertex_data
=
169 (info
->mode
== PIPE_PRIM_POINTS
&&
170 vc5
->rasterizer
->base
.point_size_per_vertex
);
172 /* Must be set if the shader modifies Z, discards, or modifies
173 * the sample mask. For any of these cases, the fragment
174 * shader needs to write the Z value (even just discards).
176 shader
.fragment_shader_does_z_writes
=
177 (vc5
->prog
.fs
->prog_data
.fs
->writes_z
||
178 vc5
->prog
.fs
->prog_data
.fs
->discard
);
180 shader
.number_of_varyings_in_fragment_shader
=
181 vc5
->prog
.fs
->prog_data
.base
->num_inputs
;
183 shader
.propagate_nans
= true;
185 shader
.coordinate_shader_code_address
=
186 cl_address(vc5
->prog
.cs
->bo
, 0);
187 shader
.vertex_shader_code_address
=
188 cl_address(vc5
->prog
.vs
->bo
, 0);
189 shader
.fragment_shader_code_address
=
190 cl_address(vc5
->prog
.fs
->bo
, 0);
192 /* XXX: Use combined input/output size flag in the common
195 shader
.coordinate_shader_has_separate_input_and_output_vpm_blocks
= true;
196 shader
.vertex_shader_has_separate_input_and_output_vpm_blocks
= true;
197 shader
.coordinate_shader_input_vpm_segment_size
=
198 MAX2(vc5
->prog
.cs
->prog_data
.vs
->vpm_input_size
, 1);
199 shader
.vertex_shader_input_vpm_segment_size
=
200 MAX2(vc5
->prog
.vs
->prog_data
.vs
->vpm_input_size
, 1);
202 shader
.coordinate_shader_output_vpm_segment_size
=
203 vc5
->prog
.cs
->prog_data
.vs
->vpm_output_size
;
204 shader
.vertex_shader_output_vpm_segment_size
=
205 vc5
->prog
.vs
->prog_data
.vs
->vpm_output_size
;
207 shader
.coordinate_shader_uniforms_address
= cs_uniforms
;
208 shader
.vertex_shader_uniforms_address
= vs_uniforms
;
209 shader
.fragment_shader_uniforms_address
= fs_uniforms
;
211 #if V3D_VERSION >= 41
212 shader
.coordinate_shader_4_way_threadable
=
213 vc5
->prog
.cs
->prog_data
.vs
->base
.threads
== 4;
214 shader
.vertex_shader_4_way_threadable
=
215 vc5
->prog
.vs
->prog_data
.vs
->base
.threads
== 4;
216 shader
.fragment_shader_4_way_threadable
=
217 vc5
->prog
.fs
->prog_data
.fs
->base
.threads
== 4;
219 shader
.coordinate_shader_start_in_final_thread_section
=
220 vc5
->prog
.cs
->prog_data
.vs
->base
.single_seg
;
221 shader
.vertex_shader_start_in_final_thread_section
=
222 vc5
->prog
.vs
->prog_data
.vs
->base
.single_seg
;
223 shader
.fragment_shader_start_in_final_thread_section
=
224 vc5
->prog
.fs
->prog_data
.fs
->base
.single_seg
;
226 shader
.coordinate_shader_4_way_threadable
=
227 vc5
->prog
.cs
->prog_data
.vs
->base
.threads
== 4;
228 shader
.coordinate_shader_2_way_threadable
=
229 vc5
->prog
.cs
->prog_data
.vs
->base
.threads
== 2;
230 shader
.vertex_shader_4_way_threadable
=
231 vc5
->prog
.vs
->prog_data
.vs
->base
.threads
== 4;
232 shader
.vertex_shader_2_way_threadable
=
233 vc5
->prog
.vs
->prog_data
.vs
->base
.threads
== 2;
234 shader
.fragment_shader_4_way_threadable
=
235 vc5
->prog
.fs
->prog_data
.fs
->base
.threads
== 4;
236 shader
.fragment_shader_2_way_threadable
=
237 vc5
->prog
.fs
->prog_data
.fs
->base
.threads
== 2;
240 shader
.vertex_id_read_by_coordinate_shader
=
241 vc5
->prog
.cs
->prog_data
.vs
->uses_vid
;
242 shader
.instance_id_read_by_coordinate_shader
=
243 vc5
->prog
.cs
->prog_data
.vs
->uses_iid
;
244 shader
.vertex_id_read_by_vertex_shader
=
245 vc5
->prog
.vs
->prog_data
.vs
->uses_vid
;
246 shader
.instance_id_read_by_vertex_shader
=
247 vc5
->prog
.vs
->prog_data
.vs
->uses_iid
;
249 shader
.address_of_default_attribute_values
=
250 cl_address(vtx
->default_attribute_values
, 0);
253 for (int i
= 0; i
< vtx
->num_elements
; i
++) {
254 struct pipe_vertex_element
*elem
= &vtx
->pipe
[i
];
255 struct pipe_vertex_buffer
*vb
=
256 &vertexbuf
->vb
[elem
->vertex_buffer_index
];
257 struct vc5_resource
*rsc
= vc5_resource(vb
->buffer
.resource
);
259 const uint32_t size
=
260 cl_packet_length(GL_SHADER_STATE_ATTRIBUTE_RECORD
);
261 cl_emit_with_prepacked(&job
->indirect
,
262 GL_SHADER_STATE_ATTRIBUTE_RECORD
,
263 &vtx
->attrs
[i
* size
], attr
) {
264 attr
.stride
= vb
->stride
;
265 attr
.address
= cl_address(rsc
->bo
,
268 attr
.number_of_values_read_by_coordinate_shader
=
269 vc5
->prog
.cs
->prog_data
.vs
->vattr_sizes
[i
];
270 attr
.number_of_values_read_by_vertex_shader
=
271 vc5
->prog
.vs
->prog_data
.vs
->vattr_sizes
[i
];
272 #if V3D_VERSION >= 41
273 attr
.maximum_index
= 0xffffff;
278 if (vtx
->num_elements
== 0) {
279 /* GFXH-930: At least one attribute must be enabled and read
280 * by CS and VS. If we have no attributes being consumed by
281 * the shader, set up a dummy to be loaded into the VPM.
283 cl_emit(&job
->indirect
, GL_SHADER_STATE_ATTRIBUTE_RECORD
, attr
) {
284 /* Valid address of data whose value will be unused. */
285 attr
.address
= cl_address(job
->indirect
.bo
, 0);
287 attr
.type
= ATTRIBUTE_FLOAT
;
291 attr
.number_of_values_read_by_coordinate_shader
= 1;
292 attr
.number_of_values_read_by_vertex_shader
= 1;
296 cl_emit(&job
->bcl
, GL_SHADER_STATE
, state
) {
297 state
.address
= cl_address(job
->indirect
.bo
, shader_rec_offset
);
298 state
.number_of_attribute_arrays
= num_elements_to_emit
;
301 vc5_bo_unreference(&cs_uniforms
.bo
);
302 vc5_bo_unreference(&vs_uniforms
.bo
);
303 vc5_bo_unreference(&fs_uniforms
.bo
);
305 job
->shader_rec_count
++;
309 * Computes the various transform feedback statistics, since they can't be
310 * recorded by CL packets.
313 vc5_tf_statistics_record(struct vc5_context
*vc5
,
314 const struct pipe_draw_info
*info
,
317 if (!vc5
->active_queries
)
320 uint32_t prims
= u_prims_for_vertices(info
->mode
, info
->count
);
321 vc5
->prims_generated
+= prims
;
324 /* XXX: Only count if we didn't overflow. */
325 vc5
->tf_prims_generated
+= prims
;
330 vc5_update_job_ez(struct vc5_context
*vc5
, struct vc5_job
*job
)
332 switch (vc5
->zsa
->ez_state
) {
333 case VC5_EZ_UNDECIDED
:
334 /* If the Z/S state didn't pick a direction but didn't
335 * disable, then go along with the current EZ state. This
336 * allows EZ optimization for Z func == EQUAL or NEVER.
342 /* If the Z/S state picked a direction, then it needs to match
343 * the current direction if we've decided on one.
345 if (job
->ez_state
== VC5_EZ_UNDECIDED
)
346 job
->ez_state
= vc5
->zsa
->ez_state
;
347 else if (job
->ez_state
!= vc5
->zsa
->ez_state
)
348 job
->ez_state
= VC5_EZ_DISABLED
;
351 case VC5_EZ_DISABLED
:
352 /* If the current Z/S state disables EZ because of a bad Z
353 * func or stencil operation, then we can't do any more EZ in
356 job
->ez_state
= VC5_EZ_DISABLED
;
360 /* If the FS affects the Z of the pixels, then it may update against
361 * the chosen EZ direction (though we could use
362 * ARB_conservative_depth's hints to avoid this)
364 if (vc5
->prog
.fs
->prog_data
.fs
->writes_z
) {
365 job
->ez_state
= VC5_EZ_DISABLED
;
368 if (job
->first_ez_state
== VC5_EZ_UNDECIDED
)
369 job
->first_ez_state
= job
->ez_state
;
373 vc5_draw_vbo(struct pipe_context
*pctx
, const struct pipe_draw_info
*info
)
375 struct vc5_context
*vc5
= vc5_context(pctx
);
377 if (!info
->count_from_stream_output
&& !info
->indirect
&&
378 !info
->primitive_restart
&&
379 !u_trim_pipe_prim(info
->mode
, (unsigned*)&info
->count
))
382 /* Fall back for weird desktop GL primitive restart values. */
383 if (info
->primitive_restart
&&
387 switch (info
->index_size
) {
396 if (info
->restart_index
!= mask
) {
397 util_draw_vbo_without_prim_restart(pctx
, info
);
402 if (info
->mode
>= PIPE_PRIM_QUADS
) {
403 util_primconvert_save_rasterizer_state(vc5
->primconvert
, &vc5
->rasterizer
->base
);
404 util_primconvert_draw_vbo(vc5
->primconvert
, info
);
405 perf_debug("Fallback conversion for %d %s vertices\n",
406 info
->count
, u_prim_name(info
->mode
));
410 /* Before setting up the draw, flush anything writing to the textures
413 vc5_predraw_check_textures(pctx
, &vc5
->verttex
);
414 vc5_predraw_check_textures(pctx
, &vc5
->fragtex
);
416 struct vc5_job
*job
= vc5_get_job_for_fbo(vc5
);
418 /* Get space to emit our draw call into the BCL, using a branch to
419 * jump to a new BO if necessary.
421 vc5_cl_ensure_space_with_branch(&job
->bcl
, 256 /* XXX */);
423 if (vc5
->prim_mode
!= info
->mode
) {
424 vc5
->prim_mode
= info
->mode
;
425 vc5
->dirty
|= VC5_DIRTY_PRIM_MODE
;
429 vc5_update_compiled_shaders(vc5
, info
->mode
);
430 vc5_update_job_ez(vc5
, job
);
432 #if V3D_VERSION >= 41
433 v3d41_emit_state(pctx
);
435 v3d33_emit_state(pctx
);
438 if (vc5
->dirty
& (VC5_DIRTY_VTXBUF
|
440 VC5_DIRTY_PRIM_MODE
|
441 VC5_DIRTY_RASTERIZER
|
442 VC5_DIRTY_COMPILED_CS
|
443 VC5_DIRTY_COMPILED_VS
|
444 VC5_DIRTY_COMPILED_FS
|
445 vc5
->prog
.cs
->uniform_dirty_bits
|
446 vc5
->prog
.vs
->uniform_dirty_bits
|
447 vc5
->prog
.fs
->uniform_dirty_bits
)) {
448 vc5_emit_gl_shader_state(vc5
, info
);
453 /* The Base Vertex/Base Instance packet sets those values to nonzero
454 * for the next draw call only.
456 if (info
->index_bias
|| info
->start_instance
) {
457 cl_emit(&job
->bcl
, BASE_VERTEX_BASE_INSTANCE
, base
) {
458 base
.base_instance
= info
->start_instance
;
459 base
.base_vertex
= info
->index_bias
;
463 uint32_t prim_tf_enable
= 0;
465 /* V3D 3.x: The HW only processes transform feedback on primitives
468 if (vc5
->streamout
.num_targets
)
469 prim_tf_enable
= (V3D_PRIM_POINTS_TF
- V3D_PRIM_POINTS
);
472 vc5_tf_statistics_record(vc5
, info
, vc5
->streamout
.num_targets
);
474 /* Note that the primitive type fields match with OpenGL/gallium
475 * definitions, up to but not including QUADS.
477 if (info
->index_size
) {
478 uint32_t index_size
= info
->index_size
;
479 uint32_t offset
= info
->start
* index_size
;
480 struct pipe_resource
*prsc
;
481 if (info
->has_user_indices
) {
483 u_upload_data(vc5
->uploader
, 0,
484 info
->count
* info
->index_size
, 4,
488 prsc
= info
->index
.resource
;
490 struct vc5_resource
*rsc
= vc5_resource(prsc
);
492 #if V3D_VERSION >= 40
493 cl_emit(&job
->bcl
, INDEX_BUFFER_SETUP
, ib
) {
494 ib
.address
= cl_address(rsc
->bo
, 0);
495 ib
.size
= rsc
->bo
->size
;
499 if (info
->instance_count
> 1) {
500 cl_emit(&job
->bcl
, INDEXED_INSTANCED_PRIMITIVE_LIST
, prim
) {
501 prim
.index_type
= ffs(info
->index_size
) - 1;
502 #if V3D_VERSION >= 40
503 prim
.index_offset
= offset
;
504 #else /* V3D_VERSION < 40 */
505 prim
.maximum_index
= (1u << 31) - 1; /* XXX */
506 prim
.address_of_indices_list
=
507 cl_address(rsc
->bo
, offset
);
508 #endif /* V3D_VERSION < 40 */
509 prim
.mode
= info
->mode
| prim_tf_enable
;
510 prim
.enable_primitive_restarts
= info
->primitive_restart
;
512 prim
.number_of_instances
= info
->instance_count
;
513 prim
.instance_length
= info
->count
;
516 cl_emit(&job
->bcl
, INDEXED_PRIMITIVE_LIST
, prim
) {
517 prim
.index_type
= ffs(info
->index_size
) - 1;
518 prim
.length
= info
->count
;
519 #if V3D_VERSION >= 40
520 prim
.index_offset
= offset
;
521 #else /* V3D_VERSION < 40 */
522 prim
.maximum_index
= (1u << 31) - 1; /* XXX */
523 prim
.address_of_indices_list
=
524 cl_address(rsc
->bo
, offset
);
525 #endif /* V3D_VERSION < 40 */
526 prim
.mode
= info
->mode
| prim_tf_enable
;
527 prim
.enable_primitive_restarts
= info
->primitive_restart
;
531 job
->draw_calls_queued
++;
533 if (info
->has_user_indices
)
534 pipe_resource_reference(&prsc
, NULL
);
536 if (info
->instance_count
> 1) {
537 cl_emit(&job
->bcl
, VERTEX_ARRAY_INSTANCED_PRIMITIVES
, prim
) {
538 prim
.mode
= info
->mode
| prim_tf_enable
;
539 prim
.index_of_first_vertex
= info
->start
;
540 prim
.number_of_instances
= info
->instance_count
;
541 prim
.instance_length
= info
->count
;
544 cl_emit(&job
->bcl
, VERTEX_ARRAY_PRIMITIVES
, prim
) {
545 prim
.mode
= info
->mode
| prim_tf_enable
;
546 prim
.length
= info
->count
;
547 prim
.index_of_first_vertex
= info
->start
;
551 job
->draw_calls_queued
++;
553 if (vc5
->zsa
&& job
->zsbuf
&&
554 (vc5
->zsa
->base
.depth
.enabled
||
555 vc5
->zsa
->base
.stencil
[0].enabled
)) {
556 struct vc5_resource
*rsc
= vc5_resource(job
->zsbuf
->texture
);
557 vc5_job_add_bo(job
, rsc
->bo
);
559 if (vc5
->zsa
->base
.depth
.enabled
) {
560 job
->resolve
|= PIPE_CLEAR_DEPTH
;
561 rsc
->initialized_buffers
= PIPE_CLEAR_DEPTH
;
564 if (vc5
->zsa
->base
.stencil
[0].enabled
) {
565 job
->resolve
|= PIPE_CLEAR_STENCIL
;
566 rsc
->initialized_buffers
|= PIPE_CLEAR_STENCIL
;
570 for (int i
= 0; i
< VC5_MAX_DRAW_BUFFERS
; i
++) {
571 uint32_t bit
= PIPE_CLEAR_COLOR0
<< i
;
573 if (job
->resolve
& bit
|| !job
->cbufs
[i
])
575 struct vc5_resource
*rsc
= vc5_resource(job
->cbufs
[i
]->texture
);
578 vc5_job_add_bo(job
, rsc
->bo
);
581 if (job
->referenced_size
> 768 * 1024 * 1024) {
582 perf_debug("Flushing job with %dkb to try to free up memory\n",
583 job
->referenced_size
/ 1024);
587 if (V3D_DEBUG
& V3D_DEBUG_ALWAYS_FLUSH
)
592 vc5_clear(struct pipe_context
*pctx
, unsigned buffers
,
593 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
595 struct vc5_context
*vc5
= vc5_context(pctx
);
596 struct vc5_job
*job
= vc5_get_job_for_fbo(vc5
);
598 /* We can't flag new buffers for clearing once we've queued draws. We
599 * could avoid this by using the 3d engine to clear.
601 if (job
->draw_calls_queued
) {
602 perf_debug("Flushing rendering to process new clear.\n");
603 vc5_job_submit(vc5
, job
);
604 job
= vc5_get_job_for_fbo(vc5
);
607 for (int i
= 0; i
< VC5_MAX_DRAW_BUFFERS
; i
++) {
608 uint32_t bit
= PIPE_CLEAR_COLOR0
<< i
;
609 if (!(buffers
& bit
))
612 struct pipe_surface
*psurf
= vc5
->framebuffer
.cbufs
[i
];
613 struct vc5_surface
*surf
= vc5_surface(psurf
);
614 struct vc5_resource
*rsc
= vc5_resource(psurf
->texture
);
617 uint32_t internal_size
= 4 << surf
->internal_bpp
;
619 static union pipe_color_union swapped_color
;
620 if (vc5
->swap_color_rb
& (1 << i
)) {
621 swapped_color
.f
[0] = color
->f
[2];
622 swapped_color
.f
[1] = color
->f
[1];
623 swapped_color
.f
[2] = color
->f
[0];
624 swapped_color
.f
[3] = color
->f
[3];
625 color
= &swapped_color
;
628 switch (surf
->internal_type
) {
629 case V3D_INTERNAL_TYPE_8
:
630 util_pack_color(color
->f
, PIPE_FORMAT_R8G8B8A8_UNORM
,
632 memcpy(job
->clear_color
[i
], uc
.ui
, internal_size
);
634 case V3D_INTERNAL_TYPE_8I
:
635 case V3D_INTERNAL_TYPE_8UI
:
636 job
->clear_color
[i
][0] = ((uc
.ui
[0] & 0xff) |
637 (uc
.ui
[1] & 0xff) << 8 |
638 (uc
.ui
[2] & 0xff) << 16 |
639 (uc
.ui
[3] & 0xff) << 24);
641 case V3D_INTERNAL_TYPE_16F
:
642 util_pack_color(color
->f
, PIPE_FORMAT_R16G16B16A16_FLOAT
,
644 memcpy(job
->clear_color
[i
], uc
.ui
, internal_size
);
646 case V3D_INTERNAL_TYPE_16I
:
647 case V3D_INTERNAL_TYPE_16UI
:
648 job
->clear_color
[i
][0] = ((uc
.ui
[0] & 0xffff) |
650 job
->clear_color
[i
][1] = ((uc
.ui
[2] & 0xffff) |
653 case V3D_INTERNAL_TYPE_32F
:
654 case V3D_INTERNAL_TYPE_32I
:
655 case V3D_INTERNAL_TYPE_32UI
:
656 memcpy(job
->clear_color
[i
], color
->ui
, internal_size
);
660 rsc
->initialized_buffers
|= bit
;
663 unsigned zsclear
= buffers
& PIPE_CLEAR_DEPTHSTENCIL
;
665 struct vc5_resource
*rsc
=
666 vc5_resource(vc5
->framebuffer
.zsbuf
->texture
);
668 if (zsclear
& PIPE_CLEAR_DEPTH
)
669 job
->clear_z
= depth
;
670 if (zsclear
& PIPE_CLEAR_STENCIL
)
671 job
->clear_s
= stencil
;
673 rsc
->initialized_buffers
|= zsclear
;
678 job
->draw_max_x
= vc5
->framebuffer
.width
;
679 job
->draw_max_y
= vc5
->framebuffer
.height
;
680 job
->cleared
|= buffers
;
681 job
->resolve
|= buffers
;
687 vc5_clear_render_target(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
688 const union pipe_color_union
*color
,
689 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
690 bool render_condition_enabled
)
692 fprintf(stderr
, "unimpl: clear RT\n");
696 vc5_clear_depth_stencil(struct pipe_context
*pctx
, struct pipe_surface
*ps
,
697 unsigned buffers
, double depth
, unsigned stencil
,
698 unsigned x
, unsigned y
, unsigned w
, unsigned h
,
699 bool render_condition_enabled
)
701 fprintf(stderr
, "unimpl: clear DS\n");
705 v3dX(draw_init
)(struct pipe_context
*pctx
)
707 pctx
->draw_vbo
= vc5_draw_vbo
;
708 pctx
->clear
= vc5_clear
;
709 pctx
->clear_render_target
= vc5_clear_render_target
;
710 pctx
->clear_depth_stencil
= vc5_clear_depth_stencil
;