2 * Copyright © 2014-2017 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "util/u_format.h"
25 #include "util/u_half.h"
26 #include "vc5_context.h"
27 #include "broadcom/cle/v3d_packet_v33_pack.h"
28 #include "broadcom/compiler/v3d_compiler.h"
31 vc5_factor(enum pipe_blendfactor factor
)
33 /* We may get a bad blendfactor when blending is disabled. */
35 return V3D_BLEND_FACTOR_ZERO
;
38 case PIPE_BLENDFACTOR_ZERO
:
39 case PIPE_BLENDFACTOR_ONE
:
40 return V3D_BLEND_FACTOR_ONE
;
41 case PIPE_BLENDFACTOR_SRC_COLOR
:
42 return V3D_BLEND_FACTOR_SRC_COLOR
;
43 case PIPE_BLENDFACTOR_INV_SRC_COLOR
:
44 return V3D_BLEND_FACTOR_INV_SRC_COLOR
;
45 case PIPE_BLENDFACTOR_DST_COLOR
:
46 return V3D_BLEND_FACTOR_DST_COLOR
;
47 case PIPE_BLENDFACTOR_INV_DST_COLOR
:
48 return V3D_BLEND_FACTOR_INV_DST_COLOR
;
49 case PIPE_BLENDFACTOR_SRC_ALPHA
:
50 return V3D_BLEND_FACTOR_SRC_ALPHA
;
51 case PIPE_BLENDFACTOR_INV_SRC_ALPHA
:
52 return V3D_BLEND_FACTOR_INV_SRC_ALPHA
;
53 case PIPE_BLENDFACTOR_DST_ALPHA
:
54 return V3D_BLEND_FACTOR_DST_ALPHA
;
55 case PIPE_BLENDFACTOR_INV_DST_ALPHA
:
56 return V3D_BLEND_FACTOR_INV_DST_ALPHA
;
57 case PIPE_BLENDFACTOR_CONST_COLOR
:
58 return V3D_BLEND_FACTOR_CONST_COLOR
;
59 case PIPE_BLENDFACTOR_INV_CONST_COLOR
:
60 return V3D_BLEND_FACTOR_INV_CONST_COLOR
;
61 case PIPE_BLENDFACTOR_CONST_ALPHA
:
62 return V3D_BLEND_FACTOR_CONST_ALPHA
;
63 case PIPE_BLENDFACTOR_INV_CONST_ALPHA
:
64 return V3D_BLEND_FACTOR_INV_CONST_ALPHA
;
65 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
:
66 return V3D_BLEND_FACTOR_SRC_ALPHA_SATURATE
;
68 unreachable("Bad blend factor");
72 static inline uint16_t
73 swizzled_border_color(struct pipe_sampler_state
*sampler
,
74 struct vc5_sampler_view
*sview
,
77 const struct util_format_description
*desc
=
78 util_format_description(sview
->base
.format
);
81 /* If we're doing swizzling in the sampler, then only rearrange the
82 * border color for the mismatch between the VC5 texture format and
83 * the PIPE_FORMAT, since GL_ARB_texture_swizzle will be handled by
84 * the sampler's swizzle.
86 * For swizzling in the shader, we don't do any pre-swizzling of the
89 if (vc5_get_tex_return_size(sview
->base
.format
) != 32)
90 swiz
= desc
->swizzle
[swiz
];
94 return util_float_to_half(0.0);
96 return util_float_to_half(1.0);
98 return util_float_to_half(sampler
->border_color
.f
[swiz
]);
103 emit_one_texture(struct vc5_context
*vc5
, struct vc5_texture_stateobj
*stage_tex
,
106 struct vc5_job
*job
= vc5
->job
;
107 struct pipe_sampler_state
*psampler
= stage_tex
->samplers
[i
];
108 struct vc5_sampler_state
*sampler
= vc5_sampler_state(psampler
);
109 struct pipe_sampler_view
*psview
= stage_tex
->textures
[i
];
110 struct vc5_sampler_view
*sview
= vc5_sampler_view(psview
);
111 struct pipe_resource
*prsc
= psview
->texture
;
112 struct vc5_resource
*rsc
= vc5_resource(prsc
);
114 stage_tex
->texture_state
[i
].offset
=
115 vc5_cl_ensure_space(&job
->indirect
,
116 cl_packet_length(TEXTURE_SHADER_STATE
),
118 vc5_bo_set_reference(&stage_tex
->texture_state
[i
].bo
,
121 struct V3D33_TEXTURE_SHADER_STATE unpacked
= {
123 .border_color_red
= swizzled_border_color(psampler
, sview
, 0),
124 .border_color_green
= swizzled_border_color(psampler
, sview
, 1),
125 .border_color_blue
= swizzled_border_color(psampler
, sview
, 2),
126 .border_color_alpha
= swizzled_border_color(psampler
, sview
, 3),
128 /* XXX: Disable min/maxlod for txf */
129 .max_level_of_detail
= MIN2(MIN2(psampler
->max_lod
,
131 psview
->u
.tex
.last_level
),
133 .texture_base_pointer
= cl_address(rsc
->bo
,
134 rsc
->slices
[0].offset
),
137 int min_img_filter
= psampler
->min_img_filter
;
138 int min_mip_filter
= psampler
->min_mip_filter
;
139 int mag_img_filter
= psampler
->mag_img_filter
;
141 if (vc5_get_tex_return_size(psview
->format
) == 32) {
142 min_mip_filter
= PIPE_TEX_MIPFILTER_NEAREST
;
143 mag_img_filter
= PIPE_TEX_FILTER_NEAREST
;
144 mag_img_filter
= PIPE_TEX_FILTER_NEAREST
;
147 bool min_nearest
= (min_img_filter
== PIPE_TEX_FILTER_NEAREST
);
148 switch (min_mip_filter
) {
149 case PIPE_TEX_MIPFILTER_NONE
:
150 unpacked
.minification_filter
= 0 + min_nearest
;
152 case PIPE_TEX_MIPFILTER_NEAREST
:
153 unpacked
.minification_filter
= 2 + !min_nearest
;
155 case PIPE_TEX_MIPFILTER_LINEAR
:
156 unpacked
.minification_filter
= 4 + !min_nearest
;
159 unpacked
.magnification_filter
= (mag_img_filter
==
160 PIPE_TEX_FILTER_NEAREST
);
162 uint8_t packed
[cl_packet_length(TEXTURE_SHADER_STATE
)];
163 cl_packet_pack(TEXTURE_SHADER_STATE
)(&job
->indirect
, packed
, &unpacked
);
165 for (int i
= 0; i
< ARRAY_SIZE(packed
); i
++)
166 packed
[i
] |= sview
->texture_shader_state
[i
] | sampler
->texture_shader_state
[i
];
168 cl_emit_prepacked(&job
->indirect
, &packed
);
172 emit_textures(struct vc5_context
*vc5
, struct vc5_texture_stateobj
*stage_tex
)
174 for (int i
= 0; i
< stage_tex
->num_textures
; i
++)
175 emit_one_texture(vc5
, stage_tex
, i
);
179 vc5_emit_state(struct pipe_context
*pctx
)
181 struct vc5_context
*vc5
= vc5_context(pctx
);
182 struct vc5_job
*job
= vc5
->job
;
184 if (vc5
->dirty
& (VC5_DIRTY_SCISSOR
| VC5_DIRTY_VIEWPORT
|
185 VC5_DIRTY_RASTERIZER
)) {
186 float *vpscale
= vc5
->viewport
.scale
;
187 float *vptranslate
= vc5
->viewport
.translate
;
188 float vp_minx
= -fabsf(vpscale
[0]) + vptranslate
[0];
189 float vp_maxx
= fabsf(vpscale
[0]) + vptranslate
[0];
190 float vp_miny
= -fabsf(vpscale
[1]) + vptranslate
[1];
191 float vp_maxy
= fabsf(vpscale
[1]) + vptranslate
[1];
193 /* Clip to the scissor if it's enabled, but still clip to the
194 * drawable regardless since that controls where the binner
195 * tries to put things.
197 * Additionally, always clip the rendering to the viewport,
198 * since the hardware does guardband clipping, meaning
199 * primitives would rasterize outside of the view volume.
201 uint32_t minx
, miny
, maxx
, maxy
;
202 if (!vc5
->rasterizer
->base
.scissor
) {
203 minx
= MAX2(vp_minx
, 0);
204 miny
= MAX2(vp_miny
, 0);
205 maxx
= MIN2(vp_maxx
, job
->draw_width
);
206 maxy
= MIN2(vp_maxy
, job
->draw_height
);
208 minx
= MAX2(vp_minx
, vc5
->scissor
.minx
);
209 miny
= MAX2(vp_miny
, vc5
->scissor
.miny
);
210 maxx
= MIN2(vp_maxx
, vc5
->scissor
.maxx
);
211 maxy
= MIN2(vp_maxy
, vc5
->scissor
.maxy
);
214 cl_emit(&job
->bcl
, CLIP_WINDOW
, clip
) {
215 clip
.clip_window_left_pixel_coordinate
= minx
;
216 clip
.clip_window_bottom_pixel_coordinate
= miny
;
217 clip
.clip_window_height_in_pixels
= maxy
- miny
;
218 clip
.clip_window_width_in_pixels
= maxx
- minx
;
219 clip
.clip_window_height_in_pixels
= maxy
- miny
;
222 job
->draw_min_x
= MIN2(job
->draw_min_x
, minx
);
223 job
->draw_min_y
= MIN2(job
->draw_min_y
, miny
);
224 job
->draw_max_x
= MAX2(job
->draw_max_x
, maxx
);
225 job
->draw_max_y
= MAX2(job
->draw_max_y
, maxy
);
228 if (vc5
->dirty
& (VC5_DIRTY_RASTERIZER
|
231 VC5_DIRTY_COMPILED_FS
)) {
232 cl_emit(&job
->bcl
, CONFIGURATION_BITS
, config
) {
233 config
.enable_forward_facing_primitive
=
234 !(vc5
->rasterizer
->base
.cull_face
&
236 config
.enable_reverse_facing_primitive
=
237 !(vc5
->rasterizer
->base
.cull_face
&
239 /* This seems backwards, but it's what gets the
240 * clipflat test to pass.
242 config
.clockwise_primitives
=
243 vc5
->rasterizer
->base
.front_ccw
;
245 config
.enable_depth_offset
=
246 vc5
->rasterizer
->base
.offset_tri
;
248 config
.rasterizer_oversample_mode
=
249 vc5
->rasterizer
->base
.multisample
;
251 config
.direct3d_provoking_vertex
=
252 vc5
->rasterizer
->base
.flatshade_first
;
254 config
.blend_enable
= vc5
->blend
->rt
[0].blend_enable
;
256 config
.early_z_updates_enable
= true;
257 if (vc5
->zsa
->base
.depth
.enabled
) {
258 config
.z_updates_enable
=
259 vc5
->zsa
->base
.depth
.writemask
;
260 config
.early_z_enable
=
261 vc5
->zsa
->early_z_enable
;
262 config
.depth_test_function
=
263 vc5
->zsa
->base
.depth
.func
;
265 config
.depth_test_function
= PIPE_FUNC_ALWAYS
;
271 if (vc5
->dirty
& VC5_DIRTY_RASTERIZER
) {
272 cl_emit(&job
->bcl
, DEPTH_OFFSET
, depth
) {
273 depth
.depth_offset_factor
=
274 vc5
->rasterizer
->offset_factor
;
275 depth
.depth_offset_units
=
276 vc5
->rasterizer
->offset_units
;
279 cl_emit(&job
->bcl
, POINT_SIZE
, point_size
) {
280 point_size
.point_size
= vc5
->rasterizer
->point_size
;
283 cl_emit(&job
->bcl
, LINE_WIDTH
, line_width
) {
284 line_width
.line_width
= vc5
->rasterizer
->base
.line_width
;
288 if (vc5
->dirty
& VC5_DIRTY_VIEWPORT
) {
289 cl_emit(&job
->bcl
, CLIPPER_XY_SCALING
, clip
) {
290 clip
.viewport_half_width_in_1_256th_of_pixel
=
291 vc5
->viewport
.scale
[0] * 256.0f
;
292 clip
.viewport_half_height_in_1_256th_of_pixel
=
293 vc5
->viewport
.scale
[1] * 256.0f
;
296 cl_emit(&job
->bcl
, CLIPPER_Z_SCALE_AND_OFFSET
, clip
) {
297 clip
.viewport_z_offset_zc_to_zs
=
298 vc5
->viewport
.translate
[2];
299 clip
.viewport_z_scale_zc_to_zs
=
300 vc5
->viewport
.scale
[2];
303 cl_emit(&job
->bcl
, CLIPPER_Z_MIN_MAX_CLIPPING_PLANES
, clip
) {
304 clip
.minimum_zw
= (vc5
->viewport
.translate
[2] -
305 vc5
->viewport
.scale
[2]);
306 clip
.maximum_zw
= (vc5
->viewport
.translate
[2] +
307 vc5
->viewport
.scale
[2]);
311 cl_emit(&job
->bcl
, VIEWPORT_OFFSET
, vp
) {
312 vp
.viewport_centre_x_coordinate
=
313 vc5
->viewport
.translate
[0];
314 vp
.viewport_centre_y_coordinate
=
315 vc5
->viewport
.translate
[1];
319 if (vc5
->dirty
& VC5_DIRTY_BLEND
) {
320 struct pipe_blend_state
*blend
= vc5
->blend
;
322 cl_emit(&job
->bcl
, BLEND_CONFIG
, config
) {
323 struct pipe_rt_blend_state
*rtblend
= &blend
->rt
[0];
325 config
.colour_blend_mode
= rtblend
->rgb_func
;
326 config
.colour_blend_dst_factor
=
327 vc5_factor(rtblend
->rgb_dst_factor
);
328 config
.colour_blend_src_factor
=
329 vc5_factor(rtblend
->rgb_src_factor
);
331 config
.alpha_blend_mode
= rtblend
->alpha_func
;
332 config
.alpha_blend_dst_factor
=
333 vc5_factor(rtblend
->alpha_dst_factor
);
334 config
.alpha_blend_src_factor
=
335 vc5_factor(rtblend
->alpha_src_factor
);
338 cl_emit(&job
->bcl
, COLOUR_WRITE_MASKS
, mask
) {
339 if (blend
->independent_blend_enable
) {
340 mask
.render_target_0_per_colour_component_write_masks
=
341 (~blend
->rt
[0].colormask
) & 0xf;
342 mask
.render_target_1_per_colour_component_write_masks
=
343 (~blend
->rt
[1].colormask
) & 0xf;
344 mask
.render_target_2_per_colour_component_write_masks
=
345 (~blend
->rt
[2].colormask
) & 0xf;
346 mask
.render_target_3_per_colour_component_write_masks
=
347 (~blend
->rt
[3].colormask
) & 0xf;
349 uint8_t colormask
= (~blend
->rt
[0].colormask
) & 0xf;
350 mask
.render_target_0_per_colour_component_write_masks
= colormask
;
351 mask
.render_target_1_per_colour_component_write_masks
= colormask
;
352 mask
.render_target_2_per_colour_component_write_masks
= colormask
;
353 mask
.render_target_3_per_colour_component_write_masks
= colormask
;
358 if (vc5
->dirty
& VC5_DIRTY_BLEND_COLOR
) {
359 cl_emit(&job
->bcl
, BLEND_CONSTANT_COLOUR
, colour
) {
360 /* XXX: format-dependent swizzling */
361 colour
.red_f16
= vc5
->blend_color
.hf
[2];
362 colour
.green_f16
= vc5
->blend_color
.hf
[1];
363 colour
.blue_f16
= vc5
->blend_color
.hf
[0];
364 colour
.alpha_f16
= vc5
->blend_color
.hf
[3];
368 if (vc5
->dirty
& (VC5_DIRTY_ZSA
| VC5_DIRTY_STENCIL_REF
)) {
369 struct pipe_stencil_state
*front
= &vc5
->zsa
->base
.stencil
[0];
370 struct pipe_stencil_state
*back
= &vc5
->zsa
->base
.stencil
[1];
372 cl_emit(&job
->bcl
, STENCIL_CONFIG
, config
) {
373 config
.front_config
= true;
374 config
.back_config
= !back
->enabled
;
376 config
.stencil_write_mask
= front
->writemask
;
377 config
.stencil_test_mask
= front
->valuemask
;
379 config
.stencil_test_function
= front
->func
;
380 config
.stencil_pass_op
= front
->zpass_op
;
381 config
.depth_test_fail_op
= front
->zfail_op
;
382 config
.stencil_test_fail_op
= front
->fail_op
;
384 config
.stencil_ref_value
= vc5
->stencil_ref
.ref_value
[0];
388 cl_emit(&job
->bcl
, STENCIL_CONFIG
, config
) {
389 config
.front_config
= false;
390 config
.back_config
= true;
392 config
.stencil_write_mask
= back
->writemask
;
393 config
.stencil_test_mask
= back
->valuemask
;
395 config
.stencil_test_function
= back
->func
;
396 config
.stencil_pass_op
= back
->zpass_op
;
397 config
.depth_test_fail_op
= back
->zfail_op
;
398 config
.stencil_test_fail_op
= back
->fail_op
;
400 config
.stencil_ref_value
=
401 vc5
->stencil_ref
.ref_value
[1];
406 if (vc5
->dirty
& VC5_DIRTY_FRAGTEX
)
407 emit_textures(vc5
, &vc5
->fragtex
);
409 if (vc5
->dirty
& VC5_DIRTY_VERTTEX
)
410 emit_textures(vc5
, &vc5
->fragtex
);
412 if (vc5
->dirty
& VC5_DIRTY_FLAT_SHADE_FLAGS
) {
413 /* XXX: Need to handle more than 24 entries. */
414 cl_emit(&job
->bcl
, FLAT_SHADE_FLAGS
, flags
) {
415 flags
.varying_offset_v0
= 0;
417 flags
.flat_shade_flags_for_varyings_v024
=
418 vc5
->prog
.fs
->prog_data
.fs
->flat_shade_flags
[0] & 0xfffff;
420 if (vc5
->rasterizer
->base
.flatshade
) {
421 flags
.flat_shade_flags_for_varyings_v024
|=
422 vc5
->prog
.fs
->prog_data
.fs
->shade_model_flags
[0] & 0xfffff;
427 if (vc5
->dirty
& VC5_DIRTY_STREAMOUT
) {
428 struct vc5_streamout_stateobj
*so
= &vc5
->streamout
;
430 if (so
->num_targets
) {
431 cl_emit(&job
->bcl
, TRANSFORM_FEEDBACK_ENABLE
, tfe
) {
432 tfe
.number_of_32_bit_output_buffer_address_following
=
434 tfe
.number_of_16_bit_output_data_specs_following
=
435 vc5
->prog
.bind_vs
->num_tf_specs
;
438 for (int i
= 0; i
< vc5
->prog
.bind_vs
->num_tf_specs
; i
++) {
439 cl_emit_prepacked(&job
->bcl
,
440 &vc5
->prog
.bind_vs
->tf_specs
[i
]);
443 for (int i
= 0; i
< so
->num_targets
; i
++) {
444 const struct pipe_stream_output_target
*target
=
446 struct vc5_resource
*rsc
=
447 vc5_resource(target
->buffer
);
449 cl_emit(&job
->bcl
, TRANSFORM_FEEDBACK_OUTPUT_ADDRESS
, output
) {
452 target
->buffer_offset
);
455 vc5_job_add_write_resource(vc5
->job
,
457 /* XXX: buffer_size? */