broadcom/vc5: Set the max texture LOD bias.
[mesa.git] / src / gallium / drivers / vc5 / vc5_screen.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "os/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/u_hash_table.h"
34 #include "util/ralloc.h"
35
36 #include <xf86drm.h>
37 #include "vc5_drm.h"
38 #include "vc5_screen.h"
39 #include "vc5_context.h"
40 #include "vc5_resource.h"
41 #include "compiler/v3d_compiler.h"
42
43 static const char *
44 vc5_screen_get_name(struct pipe_screen *pscreen)
45 {
46 struct vc5_screen *screen = vc5_screen(pscreen);
47
48 if (!screen->name) {
49 screen->name = ralloc_asprintf(screen,
50 "VC5 V3D %d.%d",
51 screen->devinfo.ver / 10,
52 screen->devinfo.ver % 10);
53 }
54
55 return screen->name;
56 }
57
58 static const char *
59 vc5_screen_get_vendor(struct pipe_screen *pscreen)
60 {
61 return "Broadcom";
62 }
63
64 static void
65 vc5_screen_destroy(struct pipe_screen *pscreen)
66 {
67 struct vc5_screen *screen = vc5_screen(pscreen);
68
69 util_hash_table_destroy(screen->bo_handles);
70 vc5_bufmgr_destroy(pscreen);
71 slab_destroy_parent(&screen->transfer_pool);
72
73 if (using_vc5_simulator)
74 vc5_simulator_destroy(screen);
75
76 v3d_compiler_free(screen->compiler);
77
78 close(screen->fd);
79 ralloc_free(pscreen);
80 }
81
82 static int
83 vc5_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
84 {
85 switch (param) {
86 /* Supported features (boolean caps). */
87 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
88 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
89 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
90 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
91 case PIPE_CAP_NPOT_TEXTURES:
92 case PIPE_CAP_SHAREABLE_SHADERS:
93 case PIPE_CAP_USER_CONSTANT_BUFFERS:
94 case PIPE_CAP_TEXTURE_SHADOW_MAP:
95 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
96 case PIPE_CAP_TWO_SIDED_STENCIL:
97 case PIPE_CAP_TEXTURE_MULTISAMPLE:
98 case PIPE_CAP_TEXTURE_SWIZZLE:
99 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
100 case PIPE_CAP_START_INSTANCE:
101 case PIPE_CAP_TGSI_INSTANCEID:
102 case PIPE_CAP_SM3:
103 case PIPE_CAP_INDEP_BLEND_ENABLE: /* XXX */
104 case PIPE_CAP_TEXTURE_QUERY_LOD:
105 case PIPE_CAP_PRIMITIVE_RESTART:
106 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
107 case PIPE_CAP_OCCLUSION_QUERY:
108 case PIPE_CAP_POINT_SPRITE:
109 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
110 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
111 case PIPE_CAP_COMPUTE:
112 case PIPE_CAP_DRAW_INDIRECT:
113 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
114 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
115 return 1;
116
117 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
118 return 256;
119
120 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
121 return 4;
122
123 case PIPE_CAP_GLSL_FEATURE_LEVEL:
124 return 400;
125
126 case PIPE_CAP_MAX_VIEWPORTS:
127 return 1;
128
129 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
130 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
131 return 1;
132 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
133 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
134 return 0;
135
136 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
137 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
138 return 1;
139
140
141 /* Stream output. */
142 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
143 return 4;
144 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
145 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
146 return 64;
147
148 case PIPE_CAP_MIN_TEXEL_OFFSET:
149 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
150 return -8;
151 case PIPE_CAP_MAX_TEXEL_OFFSET:
152 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
153 return 7;
154
155 /* Unsupported features. */
156 case PIPE_CAP_ANISOTROPIC_FILTER:
157 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
158 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
159 case PIPE_CAP_CUBE_MAP_ARRAY:
160 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
161 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
162 case PIPE_CAP_SEAMLESS_CUBE_MAP:
163 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
164 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
165 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
166 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
167 case PIPE_CAP_SHADER_STENCIL_EXPORT:
168 case PIPE_CAP_TGSI_TEXCOORD:
169 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
170 case PIPE_CAP_CONDITIONAL_RENDER:
171 case PIPE_CAP_TEXTURE_BARRIER:
172 case PIPE_CAP_INDEP_BLEND_FUNC:
173 case PIPE_CAP_DEPTH_CLIP_DISABLE:
174 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
175 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
176 case PIPE_CAP_USER_VERTEX_BUFFERS:
177 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
178 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
179 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
180 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
181 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
182 case PIPE_CAP_TEXTURE_GATHER_SM5:
183 case PIPE_CAP_FAKE_SW_MSAA:
184 case PIPE_CAP_SAMPLE_SHADING:
185 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
186 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
187 case PIPE_CAP_MAX_VERTEX_STREAMS:
188 case PIPE_CAP_MULTI_DRAW_INDIRECT:
189 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
190 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
191 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
192 case PIPE_CAP_SAMPLER_VIEW_TARGET:
193 case PIPE_CAP_CLIP_HALFZ:
194 case PIPE_CAP_VERTEXID_NOBASE:
195 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
196 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
197 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
198 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
199 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
200 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
201 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
202 case PIPE_CAP_DEPTH_BOUNDS_TEST:
203 case PIPE_CAP_TGSI_TXQS:
204 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
205 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
206 case PIPE_CAP_CLEAR_TEXTURE:
207 case PIPE_CAP_DRAW_PARAMETERS:
208 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
209 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
210 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
211 case PIPE_CAP_INVALIDATE_BUFFER:
212 case PIPE_CAP_GENERATE_MIPMAP:
213 case PIPE_CAP_STRING_MARKER:
214 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
215 case PIPE_CAP_QUERY_BUFFER_OBJECT:
216 case PIPE_CAP_QUERY_MEMORY_INFO:
217 case PIPE_CAP_PCI_GROUP:
218 case PIPE_CAP_PCI_BUS:
219 case PIPE_CAP_PCI_DEVICE:
220 case PIPE_CAP_PCI_FUNCTION:
221 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
222 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
223 case PIPE_CAP_CULL_DISTANCE:
224 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
225 case PIPE_CAP_TGSI_VOTE:
226 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
227 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
228 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
229 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
230 case PIPE_CAP_TGSI_FS_FBFETCH:
231 case PIPE_CAP_INT64:
232 case PIPE_CAP_INT64_DIVMOD:
233 case PIPE_CAP_DOUBLES:
234 case PIPE_CAP_BINDLESS_TEXTURE:
235 case PIPE_CAP_POST_DEPTH_COVERAGE:
236 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
237 case PIPE_CAP_TGSI_BALLOT:
238 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
239 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
240 case PIPE_CAP_TGSI_CLOCK:
241 case PIPE_CAP_TGSI_TEX_TXF_LZ:
242 case PIPE_CAP_NATIVE_FENCE_FD:
243 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
244 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
245 case PIPE_CAP_QUERY_SO_OVERFLOW:
246 case PIPE_CAP_MEMOBJ:
247 case PIPE_CAP_LOAD_CONSTBUF:
248 case PIPE_CAP_TILE_RASTER_ORDER:
249 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
250 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
251 return 0;
252
253 /* Geometry shader output, unsupported. */
254 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
255 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
256 return 0;
257
258 /* Texturing. */
259 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
260 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
261 return VC5_MAX_MIP_LEVELS;
262 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
263 return 256;
264 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
265 return 2048;
266
267 /* Render targets. */
268 case PIPE_CAP_MAX_RENDER_TARGETS:
269 return 4;
270
271 /* Queries. */
272 case PIPE_CAP_QUERY_TIME_ELAPSED:
273 case PIPE_CAP_QUERY_TIMESTAMP:
274 return 0;
275
276 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
277 return 2048;
278
279 case PIPE_CAP_ENDIANNESS:
280 return PIPE_ENDIAN_LITTLE;
281
282 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
283 return 64;
284
285 case PIPE_CAP_VENDOR_ID:
286 return 0x14E4;
287 case PIPE_CAP_DEVICE_ID:
288 return 0xFFFFFFFF;
289 case PIPE_CAP_ACCELERATED:
290 return 1;
291 case PIPE_CAP_VIDEO_MEMORY: {
292 uint64_t system_memory;
293
294 if (!os_get_total_physical_memory(&system_memory))
295 return 0;
296
297 return (int)(system_memory >> 20);
298 }
299 case PIPE_CAP_UMA:
300 return 1;
301
302 default:
303 fprintf(stderr, "unknown param %d\n", param);
304 return 0;
305 }
306 }
307
308 static float
309 vc5_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
310 {
311 switch (param) {
312 case PIPE_CAPF_MAX_LINE_WIDTH:
313 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
314 return 32;
315
316 case PIPE_CAPF_MAX_POINT_WIDTH:
317 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
318 return 512.0f;
319
320 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
321 return 0.0f;
322 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
323 return 16.0f;
324 case PIPE_CAPF_GUARD_BAND_LEFT:
325 case PIPE_CAPF_GUARD_BAND_TOP:
326 case PIPE_CAPF_GUARD_BAND_RIGHT:
327 case PIPE_CAPF_GUARD_BAND_BOTTOM:
328 return 0.0f;
329 default:
330 fprintf(stderr, "unknown paramf %d\n", param);
331 return 0;
332 }
333 }
334
335 static int
336 vc5_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
337 enum pipe_shader_cap param)
338 {
339 if (shader != PIPE_SHADER_VERTEX &&
340 shader != PIPE_SHADER_FRAGMENT) {
341 return 0;
342 }
343
344 /* this is probably not totally correct.. but it's a start: */
345 switch (param) {
346 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
347 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
348 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
349 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
350 return 16384;
351
352 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
353 return UINT_MAX;
354
355 case PIPE_SHADER_CAP_MAX_INPUTS:
356 if (shader == PIPE_SHADER_FRAGMENT)
357 return VC5_MAX_FS_INPUTS / 4;
358 else
359 return 16;
360 case PIPE_SHADER_CAP_MAX_OUTPUTS:
361 return shader == PIPE_SHADER_FRAGMENT ? 4 : 8;
362 case PIPE_SHADER_CAP_MAX_TEMPS:
363 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
364 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
365 return 16 * 1024 * sizeof(float);
366 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
367 return 16;
368 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
369 return 0;
370 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
371 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
372 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
373 return 0;
374 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
375 return 1;
376 case PIPE_SHADER_CAP_SUBROUTINES:
377 return 0;
378 case PIPE_SHADER_CAP_INTEGERS:
379 return 1;
380 case PIPE_SHADER_CAP_FP16:
381 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
382 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
383 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
384 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
385 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
386 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
387 return 0;
388 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
389 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
390 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
391 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
392 return VC5_MAX_TEXTURE_SAMPLERS;
393 case PIPE_SHADER_CAP_PREFERRED_IR:
394 return PIPE_SHADER_IR_NIR;
395 case PIPE_SHADER_CAP_SUPPORTED_IRS:
396 return 0;
397 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
398 return 32;
399 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
400 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
401 return 0;
402 default:
403 fprintf(stderr, "unknown shader param %d\n", param);
404 return 0;
405 }
406 return 0;
407 }
408
409 static boolean
410 vc5_screen_is_format_supported(struct pipe_screen *pscreen,
411 enum pipe_format format,
412 enum pipe_texture_target target,
413 unsigned sample_count,
414 unsigned usage)
415 {
416 unsigned retval = 0;
417
418 if (sample_count > 1 && sample_count != VC5_MAX_SAMPLES)
419 return FALSE;
420
421 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
422 !util_format_is_supported(format, usage)) {
423 return FALSE;
424 }
425
426 if (usage & PIPE_BIND_VERTEX_BUFFER) {
427 switch (format) {
428 case PIPE_FORMAT_R32G32B32A32_FLOAT:
429 case PIPE_FORMAT_R32G32B32_FLOAT:
430 case PIPE_FORMAT_R32G32_FLOAT:
431 case PIPE_FORMAT_R32_FLOAT:
432 case PIPE_FORMAT_R32G32B32A32_SNORM:
433 case PIPE_FORMAT_R32G32B32_SNORM:
434 case PIPE_FORMAT_R32G32_SNORM:
435 case PIPE_FORMAT_R32_SNORM:
436 case PIPE_FORMAT_R32G32B32A32_SSCALED:
437 case PIPE_FORMAT_R32G32B32_SSCALED:
438 case PIPE_FORMAT_R32G32_SSCALED:
439 case PIPE_FORMAT_R32_SSCALED:
440 case PIPE_FORMAT_R16G16B16A16_UNORM:
441 case PIPE_FORMAT_R16G16B16_UNORM:
442 case PIPE_FORMAT_R16G16_UNORM:
443 case PIPE_FORMAT_R16_UNORM:
444 case PIPE_FORMAT_R16G16B16A16_SNORM:
445 case PIPE_FORMAT_R16G16B16_SNORM:
446 case PIPE_FORMAT_R16G16_SNORM:
447 case PIPE_FORMAT_R16_SNORM:
448 case PIPE_FORMAT_R16G16B16A16_USCALED:
449 case PIPE_FORMAT_R16G16B16_USCALED:
450 case PIPE_FORMAT_R16G16_USCALED:
451 case PIPE_FORMAT_R16_USCALED:
452 case PIPE_FORMAT_R16G16B16A16_SSCALED:
453 case PIPE_FORMAT_R16G16B16_SSCALED:
454 case PIPE_FORMAT_R16G16_SSCALED:
455 case PIPE_FORMAT_R16_SSCALED:
456 case PIPE_FORMAT_R8G8B8A8_UNORM:
457 case PIPE_FORMAT_R8G8B8_UNORM:
458 case PIPE_FORMAT_R8G8_UNORM:
459 case PIPE_FORMAT_R8_UNORM:
460 case PIPE_FORMAT_R8G8B8A8_SNORM:
461 case PIPE_FORMAT_R8G8B8_SNORM:
462 case PIPE_FORMAT_R8G8_SNORM:
463 case PIPE_FORMAT_R8_SNORM:
464 case PIPE_FORMAT_R8G8B8A8_USCALED:
465 case PIPE_FORMAT_R8G8B8_USCALED:
466 case PIPE_FORMAT_R8G8_USCALED:
467 case PIPE_FORMAT_R8_USCALED:
468 case PIPE_FORMAT_R8G8B8A8_SSCALED:
469 case PIPE_FORMAT_R8G8B8_SSCALED:
470 case PIPE_FORMAT_R8G8_SSCALED:
471 case PIPE_FORMAT_R8_SSCALED:
472 retval |= PIPE_BIND_VERTEX_BUFFER;
473 break;
474 default:
475 break;
476 }
477 }
478
479 if ((usage & PIPE_BIND_RENDER_TARGET) &&
480 vc5_rt_format_supported(format)) {
481 retval |= PIPE_BIND_RENDER_TARGET;
482 }
483
484 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
485 vc5_tex_format_supported(format)) {
486 retval |= PIPE_BIND_SAMPLER_VIEW;
487 }
488
489 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
490 (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
491 format == PIPE_FORMAT_X8Z24_UNORM ||
492 format == PIPE_FORMAT_Z16_UNORM ||
493 format == PIPE_FORMAT_Z32_FLOAT ||
494 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
495 retval |= PIPE_BIND_DEPTH_STENCIL;
496 }
497
498 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
499 (format == PIPE_FORMAT_I8_UINT ||
500 format == PIPE_FORMAT_I16_UINT ||
501 format == PIPE_FORMAT_I32_UINT)) {
502 retval |= PIPE_BIND_INDEX_BUFFER;
503 }
504
505 #if 0
506 if (retval != usage) {
507 fprintf(stderr,
508 "not supported: format=%s, target=%d, sample_count=%d, "
509 "usage=0x%x, retval=0x%x\n", util_format_name(format),
510 target, sample_count, usage, retval);
511 }
512 #endif
513
514 return retval == usage;
515 }
516
517 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
518
519 static unsigned handle_hash(void *key)
520 {
521 return PTR_TO_UINT(key);
522 }
523
524 static int handle_compare(void *key1, void *key2)
525 {
526 return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
527 }
528
529 static bool
530 vc5_get_device_info(struct vc5_screen *screen)
531 {
532 struct drm_vc5_get_param ident0 = {
533 .param = DRM_VC5_PARAM_V3D_CORE0_IDENT0,
534 };
535 struct drm_vc5_get_param ident1 = {
536 .param = DRM_VC5_PARAM_V3D_CORE0_IDENT1,
537 };
538 int ret;
539
540 ret = vc5_ioctl(screen->fd, DRM_IOCTL_VC5_GET_PARAM, &ident0);
541 if (ret != 0) {
542 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
543 strerror(errno));
544 return false;
545 }
546 ret = vc5_ioctl(screen->fd, DRM_IOCTL_VC5_GET_PARAM, &ident1);
547 if (ret != 0) {
548 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
549 strerror(errno));
550 return false;
551 }
552
553 uint32_t major = (ident0.value >> 24) & 0xff;
554 uint32_t minor = (ident1.value >> 0) & 0xf;
555 screen->devinfo.ver = major * 10 + minor;
556
557 if (screen->devinfo.ver != 33) {
558 fprintf(stderr,
559 "V3D %d.%d not supported by this version of Mesa.\n",
560 screen->devinfo.ver / 10,
561 screen->devinfo.ver % 10);
562 return false;
563 }
564
565 return true;
566 }
567
568 static const void *
569 vc5_screen_get_compiler_options(struct pipe_screen *pscreen,
570 enum pipe_shader_ir ir, unsigned shader)
571 {
572 return &v3d_nir_options;
573 }
574
575 struct pipe_screen *
576 vc5_screen_create(int fd)
577 {
578 struct vc5_screen *screen = rzalloc(NULL, struct vc5_screen);
579 struct pipe_screen *pscreen;
580
581 pscreen = &screen->base;
582
583 pscreen->destroy = vc5_screen_destroy;
584 pscreen->get_param = vc5_screen_get_param;
585 pscreen->get_paramf = vc5_screen_get_paramf;
586 pscreen->get_shader_param = vc5_screen_get_shader_param;
587 pscreen->context_create = vc5_context_create;
588 pscreen->is_format_supported = vc5_screen_is_format_supported;
589
590 screen->fd = fd;
591 list_inithead(&screen->bo_cache.time_list);
592 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
593 screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
594
595 #if defined(USE_VC5_SIMULATOR)
596 vc5_simulator_init(screen);
597 #endif
598
599 if (!vc5_get_device_info(screen))
600 goto fail;
601
602 slab_create_parent(&screen->transfer_pool, sizeof(struct vc5_transfer), 16);
603
604 vc5_fence_init(screen);
605
606 v3d_process_debug_variable();
607
608 vc5_resource_screen_init(pscreen);
609
610 screen->compiler = v3d_compiler_init(&screen->devinfo);
611
612 pscreen->get_name = vc5_screen_get_name;
613 pscreen->get_vendor = vc5_screen_get_vendor;
614 pscreen->get_device_vendor = vc5_screen_get_vendor;
615 pscreen->get_compiler_options = vc5_screen_get_compiler_options;
616
617 return pscreen;
618
619 fail:
620 close(fd);
621 ralloc_free(pscreen);
622 return NULL;
623 }