2 * Copyright © 2014-2017 Broadcom
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * @file vc5_simulator.c
27 * Implements VC5 simulation on top of a non-VC5 GEM fd.
29 * This file's goal is to emulate the VC5 ioctls' behavior in the kernel on
30 * top of the simpenrose software simulator. Generally, VC5 driver BOs have a
31 * GEM-side copy of their contents and a simulator-side memory area that the
32 * GEM contents get copied into during simulation. Once simulation is done,
33 * the simulator's data is copied back out to the GEM BOs, so that rendering
34 * appears on the screen as if actual hardware rendering had been done.
36 * One of the limitations of this code is that we shouldn't really need a
37 * GEM-side BO for non-window-system BOs. However, do we need unique BO
38 * handles for each of our GEM bos so that this file can look up its state
39 * from the handle passed in at submit ioctl time (also, a couple of places
40 * outside of this file still call ioctls directly on the fd).
42 * Another limitation is that BO import doesn't work unless the underlying
43 * window system's BO size matches what VC5 is going to use, which of course
44 * doesn't work out in practice. This means that for now, only DRI3 (VC5
45 * makes the winsys BOs) is supported, not DRI2 (window system makes the winys
49 #ifdef USE_VC5_SIMULATOR
52 #include "util/hash_table.h"
53 #include "util/ralloc.h"
55 #include "util/u_memory.h"
56 #include "util/u_mm.h"
57 #include "vc5_simulator_wrapper.h"
59 #include "vc5_screen.h"
60 #include "vc5_context.h"
62 /** Global (across GEM fds) state for the simulator */
63 static struct vc5_simulator_state
{
69 /* Base virtual address of the heap. */
71 /* Base hardware address of the heap. */
73 /* Size of the heap. */
76 struct mem_block
*heap
;
77 struct mem_block
*overflow
;
79 /** Mapping from GEM handle to struct vc5_simulator_bo * */
80 struct hash_table
*fd_map
;
84 .mutex
= _MTX_INITIALIZER_NP
,
87 /** Per-GEM-fd state for the simulator. */
88 struct vc5_simulator_file
{
91 /** Mapping from GEM handle to struct vc5_simulator_bo * */
92 struct hash_table
*bo_map
;
94 struct mem_block
*gmp
;
98 /** Wrapper for drm_vc5_bo tracking the simulator-specific state. */
99 struct vc5_simulator_bo
{
100 struct vc5_simulator_file
*file
;
102 /** Area for this BO within sim_state->mem */
103 struct mem_block
*block
;
108 uint32_t winsys_stride
;
116 return (void *)(uintptr_t)key
;
119 static struct vc5_simulator_file
*
120 vc5_get_simulator_file_for_fd(int fd
)
122 struct hash_entry
*entry
= _mesa_hash_table_search(sim_state
.fd_map
,
124 return entry
? entry
->data
: NULL
;
127 /* A marker placed just after each BO, then checked after rendering to make
128 * sure it's still there.
130 #define BO_SENTINEL 0xfedcba98
133 #define GMP_ALIGN2 17
136 * Sets the range of GPU virtual address space to have the given GMP
137 * permissions (bit 0 = read, bit 1 = write, write-only forbidden).
140 set_gmp_flags(struct vc5_simulator_file
*file
,
141 uint32_t offset
, uint32_t size
, uint32_t flag
)
143 assert((offset
& ((1 << GMP_ALIGN2
) - 1)) == 0);
144 int gmp_offset
= offset
>> GMP_ALIGN2
;
145 int gmp_count
= align(size
, 1 << GMP_ALIGN2
) >> GMP_ALIGN2
;
146 uint32_t *gmp
= file
->gmp_vaddr
;
150 for (int i
= gmp_offset
; i
< gmp_offset
+ gmp_count
; i
++) {
151 int32_t bitshift
= (i
% 16) * 2;
152 gmp
[i
/ 16] &= ~(0x3 << bitshift
);
153 gmp
[i
/ 16] |= flag
<< bitshift
;
158 * Allocates space in simulator memory and returns a tracking struct for it
159 * that also contains the drm_gem_cma_object struct.
161 static struct vc5_simulator_bo
*
162 vc5_create_simulator_bo(int fd
, int handle
, unsigned size
)
164 struct vc5_simulator_file
*file
= vc5_get_simulator_file_for_fd(fd
);
165 struct vc5_simulator_bo
*sim_bo
= rzalloc(file
,
166 struct vc5_simulator_bo
);
167 size
= align(size
, 4096);
170 sim_bo
->handle
= handle
;
172 mtx_lock(&sim_state
.mutex
);
173 sim_bo
->block
= u_mmAllocMem(sim_state
.heap
, size
+ 4, GMP_ALIGN2
, 0);
174 mtx_unlock(&sim_state
.mutex
);
175 assert(sim_bo
->block
);
177 set_gmp_flags(file
, sim_bo
->block
->ofs
, size
, 0x3);
180 sim_bo
->vaddr
= sim_state
.mem
+ sim_bo
->block
->ofs
- sim_state
.mem_base
;
181 memset(sim_bo
->vaddr
, 0xd0, size
);
183 *(uint32_t *)(sim_bo
->vaddr
+ sim_bo
->size
) = BO_SENTINEL
;
185 /* A handle of 0 is used for vc5_gem.c internal allocations that
186 * don't need to go in the lookup table.
189 mtx_lock(&sim_state
.mutex
);
190 _mesa_hash_table_insert(file
->bo_map
, int_to_key(handle
),
192 mtx_unlock(&sim_state
.mutex
);
199 vc5_free_simulator_bo(struct vc5_simulator_bo
*sim_bo
)
201 struct vc5_simulator_file
*sim_file
= sim_bo
->file
;
203 if (sim_bo
->winsys_map
)
204 munmap(sim_bo
->winsys_map
, sim_bo
->size
);
206 set_gmp_flags(sim_file
, sim_bo
->block
->ofs
, sim_bo
->size
, 0x0);
208 mtx_lock(&sim_state
.mutex
);
209 u_mmFreeMem(sim_bo
->block
);
210 if (sim_bo
->handle
) {
211 struct hash_entry
*entry
=
212 _mesa_hash_table_search(sim_file
->bo_map
,
213 int_to_key(sim_bo
->handle
));
214 _mesa_hash_table_remove(sim_file
->bo_map
, entry
);
216 mtx_unlock(&sim_state
.mutex
);
220 static struct vc5_simulator_bo
*
221 vc5_get_simulator_bo(struct vc5_simulator_file
*file
, int gem_handle
)
223 mtx_lock(&sim_state
.mutex
);
224 struct hash_entry
*entry
=
225 _mesa_hash_table_search(file
->bo_map
, int_to_key(gem_handle
));
226 mtx_unlock(&sim_state
.mutex
);
228 return entry
? entry
->data
: NULL
;
232 vc5_simulator_pin_bos(int fd
, struct vc5_job
*job
)
234 struct vc5_simulator_file
*file
= vc5_get_simulator_file_for_fd(fd
);
235 struct set_entry
*entry
;
237 set_foreach(job
->bos
, entry
) {
238 struct vc5_bo
*bo
= (struct vc5_bo
*)entry
->key
;
239 struct vc5_simulator_bo
*sim_bo
=
240 vc5_get_simulator_bo(file
, bo
->handle
);
243 memcpy(sim_bo
->vaddr
, bo
->map
, bo
->size
);
250 vc5_simulator_unpin_bos(int fd
, struct vc5_job
*job
)
252 struct vc5_simulator_file
*file
= vc5_get_simulator_file_for_fd(fd
);
253 struct set_entry
*entry
;
255 set_foreach(job
->bos
, entry
) {
256 struct vc5_bo
*bo
= (struct vc5_bo
*)entry
->key
;
257 struct vc5_simulator_bo
*sim_bo
=
258 vc5_get_simulator_bo(file
, bo
->handle
);
260 if (*(uint32_t *)(sim_bo
->vaddr
+
261 sim_bo
->size
) != BO_SENTINEL
) {
262 fprintf(stderr
, "Buffer overflow in %s\n", bo
->name
);
266 memcpy(bo
->map
, sim_bo
->vaddr
, bo
->size
);
274 vc5_dump_to_file(struct vc5_exec_info
*exec
)
276 static int dumpno
= 0;
277 struct drm_vc5_get_hang_state
*state
;
278 struct drm_vc5_get_hang_state_bo
*bo_state
;
279 unsigned int dump_version
= 0;
281 if (!(vc5_debug
& VC5_DEBUG_DUMP
))
284 state
= calloc(1, sizeof(*state
));
287 list_for_each_entry_safe(struct drm_vc5_bo
, bo
, &exec
->unref_list
,
292 /* Add one more for the overflow area that isn't wrapped in a BO. */
293 state
->bo_count
= exec
->bo_count
+ unref_count
+ 1;
294 bo_state
= calloc(state
->bo_count
, sizeof(*bo_state
));
296 char *filename
= NULL
;
297 asprintf(&filename
, "vc5-dri-%d.dump", dumpno
++);
298 FILE *f
= fopen(filename
, "w+");
300 fprintf(stderr
, "Couldn't open %s: %s", filename
,
305 fwrite(&dump_version
, sizeof(dump_version
), 1, f
);
307 state
->ct0ca
= exec
->ct0ca
;
308 state
->ct0ea
= exec
->ct0ea
;
309 state
->ct1ca
= exec
->ct1ca
;
310 state
->ct1ea
= exec
->ct1ea
;
311 state
->start_bin
= exec
->ct0ca
;
312 state
->start_render
= exec
->ct1ca
;
313 fwrite(state
, sizeof(*state
), 1, f
);
316 for (i
= 0; i
< exec
->bo_count
; i
++) {
317 struct drm_gem_cma_object
*cma_bo
= exec
->bo
[i
];
318 bo_state
[i
].handle
= i
; /* Not used by the parser. */
319 bo_state
[i
].paddr
= cma_bo
->paddr
;
320 bo_state
[i
].size
= cma_bo
->base
.size
;
323 list_for_each_entry_safe(struct drm_vc5_bo
, bo
, &exec
->unref_list
,
325 struct drm_gem_cma_object
*cma_bo
= &bo
->base
;
326 bo_state
[i
].handle
= 0;
327 bo_state
[i
].paddr
= cma_bo
->paddr
;
328 bo_state
[i
].size
= cma_bo
->base
.size
;
332 /* Add the static overflow memory area. */
333 bo_state
[i
].handle
= exec
->bo_count
;
334 bo_state
[i
].paddr
= sim_state
.overflow
->ofs
;
335 bo_state
[i
].size
= sim_state
.overflow
->size
;
338 fwrite(bo_state
, sizeof(*bo_state
), state
->bo_count
, f
);
340 for (int i
= 0; i
< exec
->bo_count
; i
++) {
341 struct drm_gem_cma_object
*cma_bo
= exec
->bo
[i
];
342 fwrite(cma_bo
->vaddr
, cma_bo
->base
.size
, 1, f
);
345 list_for_each_entry_safe(struct drm_vc5_bo
, bo
, &exec
->unref_list
,
347 struct drm_gem_cma_object
*cma_bo
= &bo
->base
;
348 fwrite(cma_bo
->vaddr
, cma_bo
->base
.size
, 1, f
);
351 void *overflow
= calloc(1, sim_state
.overflow
->size
);
352 fwrite(overflow
, 1, sim_state
.overflow
->size
, f
);
362 vc5_simulator_flush(struct vc5_context
*vc5
,
363 struct drm_vc5_submit_cl
*submit
, struct vc5_job
*job
)
365 struct vc5_screen
*screen
= vc5
->screen
;
367 struct vc5_simulator_file
*file
= vc5_get_simulator_file_for_fd(fd
);
368 struct vc5_surface
*csurf
= vc5_surface(vc5
->framebuffer
.cbufs
[0]);
369 struct vc5_resource
*ctex
= csurf
? vc5_resource(csurf
->base
.texture
) : NULL
;
370 struct vc5_simulator_bo
*csim_bo
= ctex
? vc5_get_simulator_bo(file
, ctex
->bo
->handle
) : NULL
;
371 uint32_t winsys_stride
= ctex
? csim_bo
->winsys_stride
: 0;
372 uint32_t sim_stride
= ctex
? ctex
->slices
[0].stride
: 0;
373 uint32_t row_len
= MIN2(sim_stride
, winsys_stride
);
376 if (ctex
&& csim_bo
->winsys_map
) {
378 fprintf(stderr
, "%dx%d %d %d %d\n",
379 ctex
->base
.b
.width0
, ctex
->base
.b
.height0
,
385 for (int y
= 0; y
< ctex
->base
.height0
; y
++) {
386 memcpy(ctex
->bo
->map
+ y
* sim_stride
,
387 csim_bo
->winsys_map
+ y
* winsys_stride
,
392 ret
= vc5_simulator_pin_bos(fd
, job
);
396 //vc5_dump_to_file(&exec);
398 if (sim_state
.ver
>= 41)
399 v3d41_simulator_flush(sim_state
.v3d
, submit
, file
->gmp
->ofs
);
401 v3d33_simulator_flush(sim_state
.v3d
, submit
, file
->gmp
->ofs
);
403 ret
= vc5_simulator_unpin_bos(fd
, job
);
407 if (ctex
&& csim_bo
->winsys_map
) {
408 for (int y
= 0; y
< ctex
->base
.height0
; y
++) {
409 memcpy(csim_bo
->winsys_map
+ y
* winsys_stride
,
410 ctex
->bo
->map
+ y
* sim_stride
,
419 * Map the underlying GEM object from the real hardware GEM handle.
422 vc5_simulator_map_winsys_bo(int fd
, struct vc5_simulator_bo
*sim_bo
)
427 struct drm_mode_map_dumb map_dumb
= {
428 .handle
= sim_bo
->handle
,
430 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_MAP_DUMB
, &map_dumb
);
432 fprintf(stderr
, "map ioctl failure\n");
436 map
= mmap(NULL
, sim_bo
->size
, PROT_READ
| PROT_WRITE
, MAP_SHARED
,
437 fd
, map_dumb
.offset
);
438 if (map
== MAP_FAILED
) {
440 "mmap of bo %d (offset 0x%016llx, size %d) failed\n",
441 sim_bo
->handle
, (long long)map_dumb
.offset
,
450 * Do fixups after a BO has been opened from a handle.
452 * This could be done at DRM_IOCTL_GEM_OPEN/DRM_IOCTL_GEM_PRIME_FD_TO_HANDLE
453 * time, but we're still using drmPrimeFDToHandle() so we have this helper to
454 * be called afterward instead.
456 void vc5_simulator_open_from_handle(int fd
, uint32_t winsys_stride
,
457 int handle
, uint32_t size
)
459 struct vc5_simulator_bo
*sim_bo
=
460 vc5_create_simulator_bo(fd
, handle
, size
);
462 sim_bo
->winsys_stride
= winsys_stride
;
463 sim_bo
->winsys_map
= vc5_simulator_map_winsys_bo(fd
, sim_bo
);
467 * Simulated ioctl(fd, DRM_VC5_CREATE_BO) implementation.
469 * Making a VC5 BO is just a matter of making a corresponding BO on the host.
472 vc5_simulator_create_bo_ioctl(int fd
, struct drm_vc5_create_bo
*args
)
475 struct drm_mode_create_dumb create
= {
478 .height
= (args
->size
+ 127) / 128,
481 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_CREATE_DUMB
, &create
);
482 assert(create
.size
>= args
->size
);
484 args
->handle
= create
.handle
;
486 struct vc5_simulator_bo
*sim_bo
=
487 vc5_create_simulator_bo(fd
, create
.handle
, args
->size
);
489 args
->offset
= sim_bo
->block
->ofs
;
495 * Simulated ioctl(fd, DRM_VC5_MMAP_BO) implementation.
497 * We just pass this straight through to dumb mmap.
500 vc5_simulator_mmap_bo_ioctl(int fd
, struct drm_vc5_mmap_bo
*args
)
503 struct drm_mode_map_dumb map
= {
504 .handle
= args
->handle
,
507 ret
= drmIoctl(fd
, DRM_IOCTL_MODE_MAP_DUMB
, &map
);
508 args
->offset
= map
.offset
;
514 vc5_simulator_get_bo_offset_ioctl(int fd
, struct drm_vc5_get_bo_offset
*args
)
516 struct vc5_simulator_file
*file
= vc5_get_simulator_file_for_fd(fd
);
517 struct vc5_simulator_bo
*sim_bo
= vc5_get_simulator_bo(file
,
520 args
->offset
= sim_bo
->block
->ofs
;
526 vc5_simulator_gem_close_ioctl(int fd
, struct drm_gem_close
*args
)
528 /* Free the simulator's internal tracking. */
529 struct vc5_simulator_file
*file
= vc5_get_simulator_file_for_fd(fd
);
530 struct vc5_simulator_bo
*sim_bo
= vc5_get_simulator_bo(file
,
533 vc5_free_simulator_bo(sim_bo
);
535 /* Pass the call on down. */
536 return drmIoctl(fd
, DRM_IOCTL_GEM_CLOSE
, args
);
540 vc5_simulator_get_param_ioctl(int fd
, struct drm_vc5_get_param
*args
)
542 if (sim_state
.ver
>= 41)
543 return v3d41_simulator_get_param_ioctl(sim_state
.v3d
, args
);
545 return v3d33_simulator_get_param_ioctl(sim_state
.v3d
, args
);
549 vc5_simulator_ioctl(int fd
, unsigned long request
, void *args
)
552 case DRM_IOCTL_VC5_CREATE_BO
:
553 return vc5_simulator_create_bo_ioctl(fd
, args
);
554 case DRM_IOCTL_VC5_MMAP_BO
:
555 return vc5_simulator_mmap_bo_ioctl(fd
, args
);
556 case DRM_IOCTL_VC5_GET_BO_OFFSET
:
557 return vc5_simulator_get_bo_offset_ioctl(fd
, args
);
559 case DRM_IOCTL_VC5_WAIT_BO
:
560 /* We do all of the vc5 rendering synchronously, so we just
561 * return immediately on the wait ioctls. This ignores any
562 * native rendering to the host BO, so it does mean we race on
563 * front buffer rendering.
567 case DRM_IOCTL_VC5_GET_PARAM
:
568 return vc5_simulator_get_param_ioctl(fd
, args
);
570 case DRM_IOCTL_GEM_CLOSE
:
571 return vc5_simulator_gem_close_ioctl(fd
, args
);
573 case DRM_IOCTL_GEM_OPEN
:
574 case DRM_IOCTL_GEM_FLINK
:
575 return drmIoctl(fd
, request
, args
);
577 fprintf(stderr
, "Unknown ioctl 0x%08x\n", (int)request
);
583 vc5_simulator_init_global(const struct v3d_device_info
*devinfo
)
585 mtx_lock(&sim_state
.mutex
);
586 if (sim_state
.refcount
++) {
587 mtx_unlock(&sim_state
.mutex
);
591 sim_state
.v3d
= v3d_hw_auto_new(NULL
);
592 v3d_hw_alloc_mem(sim_state
.v3d
, 1024 * 1024 * 1024);
594 v3d_hw_get_mem(sim_state
.v3d
, &sim_state
.mem_size
,
597 sim_state
.heap
= u_mmInit(0, sim_state
.mem_size
);
599 /* Make a block of 0xd0 at address 0 to make sure we don't screw up
602 struct mem_block
*b
= u_mmAllocMem(sim_state
.heap
, 4096, GMP_ALIGN2
, 0);
603 memset(sim_state
.mem
+ b
->ofs
- sim_state
.mem_base
, 0xd0, 4096);
605 sim_state
.ver
= v3d_hw_get_version(sim_state
.v3d
);
607 mtx_unlock(&sim_state
.mutex
);
610 _mesa_hash_table_create(NULL
,
612 _mesa_key_pointer_equal
);
614 if (sim_state
.ver
>= 41)
615 v3d41_simulator_init_regs(sim_state
.v3d
);
617 v3d33_simulator_init_regs(sim_state
.v3d
);
621 vc5_simulator_init(struct vc5_screen
*screen
)
623 vc5_simulator_init_global(&screen
->devinfo
);
625 screen
->sim_file
= rzalloc(screen
, struct vc5_simulator_file
);
626 struct vc5_simulator_file
*sim_file
= screen
->sim_file
;
628 screen
->sim_file
->bo_map
=
629 _mesa_hash_table_create(screen
->sim_file
,
631 _mesa_key_pointer_equal
);
633 mtx_lock(&sim_state
.mutex
);
634 _mesa_hash_table_insert(sim_state
.fd_map
, int_to_key(screen
->fd
+ 1),
636 mtx_unlock(&sim_state
.mutex
);
638 sim_file
->gmp
= u_mmAllocMem(sim_state
.heap
, 8096, GMP_ALIGN2
, 0);
639 sim_file
->gmp_vaddr
= (sim_state
.mem
+ sim_file
->gmp
->ofs
-
644 vc5_simulator_destroy(struct vc5_screen
*screen
)
646 mtx_lock(&sim_state
.mutex
);
647 if (!--sim_state
.refcount
) {
648 _mesa_hash_table_destroy(sim_state
.fd_map
, NULL
);
649 u_mmDestroy(sim_state
.heap
);
650 /* No memsetting the struct, because it contains the mutex. */
651 sim_state
.mem
= NULL
;
653 mtx_unlock(&sim_state
.mutex
);
656 #endif /* USE_VC5_SIMULATOR */