virgl: unwrap the includes
[mesa.git] / src / gallium / drivers / virgl / virgl_context.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "pipe/p_shader_tokens.h"
25
26 #include "pipe/p_context.h"
27 #include "pipe/p_defines.h"
28 #include "pipe/p_screen.h"
29 #include "pipe/p_state.h"
30 #include "util/u_inlines.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/u_transfer.h"
34 #include "util/u_helpers.h"
35 #include "util/u_slab.h"
36 #include "util/u_upload_mgr.h"
37 #include "util/u_blitter.h"
38 #include "tgsi/tgsi_text.h"
39 #include "indices/u_primconvert.h"
40
41 #include "pipebuffer/pb_buffer.h"
42 #include "state_tracker/graw.h"
43
44 #include "virgl_encode.h"
45 #include "virgl_context.h"
46 #include "virgl_protocol.h"
47 #include "virgl_resource.h"
48 #include "virgl_screen.h"
49
50 static uint32_t next_handle;
51 uint32_t virgl_object_assign_handle(void)
52 {
53 return ++next_handle;
54 }
55
56 static void virgl_buffer_flush(struct virgl_context *vctx,
57 struct virgl_buffer *vbuf)
58 {
59 struct virgl_screen *rs = virgl_screen(vctx->base.screen);
60 struct pipe_box box;
61
62 assert(vbuf->on_list);
63
64 box.height = 1;
65 box.depth = 1;
66 box.y = 0;
67 box.z = 0;
68
69 box.x = vbuf->valid_buffer_range.start;
70 box.width = MIN2(vbuf->valid_buffer_range.end - vbuf->valid_buffer_range.start, vbuf->base.u.b.width0);
71
72 vctx->num_transfers++;
73 rs->vws->transfer_put(rs->vws, vbuf->base.hw_res,
74 &box, 0, 0, box.x, 0);
75
76 util_range_set_empty(&vbuf->valid_buffer_range);
77 }
78
79 static void virgl_attach_res_framebuffer(struct virgl_context *vctx)
80 {
81 struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
82 struct pipe_surface *surf;
83 struct virgl_resource *res;
84 unsigned i;
85
86 surf = vctx->framebuffer.zsbuf;
87 if (surf) {
88 res = virgl_resource(surf->texture);
89 if (res)
90 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
91 }
92 for (i = 0; i < vctx->framebuffer.nr_cbufs; i++) {
93 surf = vctx->framebuffer.cbufs[i];
94 if (surf) {
95 res = virgl_resource(surf->texture);
96 if (res)
97 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
98 }
99 }
100 }
101
102 static void virgl_attach_res_sampler_views(struct virgl_context *vctx,
103 unsigned shader_type)
104 {
105 struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
106 struct virgl_textures_info *tinfo = &vctx->samplers[shader_type];
107 struct virgl_resource *res;
108 uint32_t remaining_mask = tinfo->enabled_mask;
109 unsigned i;
110 while (remaining_mask) {
111 i = u_bit_scan(&remaining_mask);
112 assert(tinfo->views[i]);
113
114 res = virgl_resource(tinfo->views[i]->base.texture);
115 if (res)
116 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
117 }
118 }
119
120 static void virgl_attach_res_vertex_buffers(struct virgl_context *vctx)
121 {
122 struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
123 struct virgl_resource *res;
124 unsigned i;
125
126 for (i = 0; i < vctx->num_vertex_buffers; i++) {
127 res = virgl_resource(vctx->vertex_buffer[i].buffer);
128 if (res)
129 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
130 }
131 }
132
133 static void virgl_attach_res_index_buffer(struct virgl_context *vctx)
134 {
135 struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
136 struct virgl_resource *res;
137
138 res = virgl_resource(vctx->index_buffer.buffer);
139 if (res)
140 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
141 }
142
143 static void virgl_attach_res_so_targets(struct virgl_context *vctx)
144 {
145 struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
146 struct virgl_resource *res;
147 unsigned i;
148
149 for (i = 0; i < vctx->num_so_targets; i++) {
150 res = virgl_resource(vctx->so_targets[i].base.buffer);
151 if (res)
152 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
153 }
154 }
155
156 static void virgl_attach_res_uniform_buffers(struct virgl_context *vctx,
157 unsigned shader_type)
158 {
159 struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
160 struct virgl_resource *res;
161 unsigned i;
162 for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
163 res = virgl_resource(vctx->ubos[shader_type][i]);
164 if (res) {
165 vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
166 }
167 }
168 }
169
170 /*
171 * after flushing, the hw context still has a bunch of
172 * resources bound, so we need to rebind those here.
173 */
174 static void virgl_reemit_res(struct virgl_context *vctx)
175 {
176 unsigned shader_type;
177
178 /* reattach any flushed resources */
179 /* framebuffer, sampler views, vertex/index/uniform/stream buffers */
180 virgl_attach_res_framebuffer(vctx);
181
182 for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
183 virgl_attach_res_sampler_views(vctx, shader_type);
184 virgl_attach_res_uniform_buffers(vctx, shader_type);
185 }
186 virgl_attach_res_index_buffer(vctx);
187 virgl_attach_res_vertex_buffers(vctx);
188 virgl_attach_res_so_targets(vctx);
189 }
190
191 static struct pipe_surface *virgl_create_surface(struct pipe_context *ctx,
192 struct pipe_resource *resource,
193 const struct pipe_surface *templ)
194 {
195 struct virgl_context *vctx = virgl_context(ctx);
196 struct virgl_surface *surf;
197 struct virgl_resource *res = virgl_resource(resource);
198 uint32_t handle;
199
200 surf = CALLOC_STRUCT(virgl_surface);
201 if (surf == NULL)
202 return NULL;
203
204 res->clean = FALSE;
205 handle = virgl_object_assign_handle();
206 pipe_reference_init(&surf->base.reference, 1);
207 pipe_resource_reference(&surf->base.texture, resource);
208 surf->base.context = ctx;
209 surf->base.format = templ->format;
210 if (resource->target != PIPE_BUFFER) {
211 surf->base.width = u_minify(resource->width0, templ->u.tex.level);
212 surf->base.height = u_minify(resource->height0, templ->u.tex.level);
213 surf->base.u.tex.level = templ->u.tex.level;
214 surf->base.u.tex.first_layer = templ->u.tex.first_layer;
215 surf->base.u.tex.last_layer = templ->u.tex.last_layer;
216 } else {
217 surf->base.width = templ->u.buf.last_element - templ->u.buf.first_element + 1;
218 surf->base.height = resource->height0;
219 surf->base.u.buf.first_element = templ->u.buf.first_element;
220 surf->base.u.buf.last_element = templ->u.buf.last_element;
221 }
222 virgl_encoder_create_surface(vctx, handle, res, &surf->base);
223 surf->handle = handle;
224 return &surf->base;
225 }
226
227 static void virgl_surface_destroy(struct pipe_context *ctx,
228 struct pipe_surface *psurf)
229 {
230 struct virgl_context *vctx = virgl_context(ctx);
231 struct virgl_surface *surf = virgl_surface(psurf);
232
233 pipe_resource_reference(&surf->base.texture, NULL);
234 virgl_encode_delete_object(vctx, surf->handle, VIRGL_OBJECT_SURFACE);
235 FREE(surf);
236 }
237
238 static void *virgl_create_blend_state(struct pipe_context *ctx,
239 const struct pipe_blend_state *blend_state)
240 {
241 struct virgl_context *vctx = virgl_context(ctx);
242 uint32_t handle;
243 handle = virgl_object_assign_handle();
244
245 virgl_encode_blend_state(vctx, handle, blend_state);
246 return (void *)(unsigned long)handle;
247
248 }
249
250 static void virgl_bind_blend_state(struct pipe_context *ctx,
251 void *blend_state)
252 {
253 struct virgl_context *vctx = virgl_context(ctx);
254 uint32_t handle = (unsigned long)blend_state;
255 virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_BLEND);
256 }
257
258 static void virgl_delete_blend_state(struct pipe_context *ctx,
259 void *blend_state)
260 {
261 struct virgl_context *vctx = virgl_context(ctx);
262 uint32_t handle = (unsigned long)blend_state;
263 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_BLEND);
264 }
265
266 static void *virgl_create_depth_stencil_alpha_state(struct pipe_context *ctx,
267 const struct pipe_depth_stencil_alpha_state *blend_state)
268 {
269 struct virgl_context *vctx = virgl_context(ctx);
270 uint32_t handle;
271 handle = virgl_object_assign_handle();
272
273 virgl_encode_dsa_state(vctx, handle, blend_state);
274 return (void *)(unsigned long)handle;
275 }
276
277 static void virgl_bind_depth_stencil_alpha_state(struct pipe_context *ctx,
278 void *blend_state)
279 {
280 struct virgl_context *vctx = virgl_context(ctx);
281 uint32_t handle = (unsigned long)blend_state;
282 virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_DSA);
283 }
284
285 static void virgl_delete_depth_stencil_alpha_state(struct pipe_context *ctx,
286 void *dsa_state)
287 {
288 struct virgl_context *vctx = virgl_context(ctx);
289 uint32_t handle = (unsigned long)dsa_state;
290 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_DSA);
291 }
292
293 static void *virgl_create_rasterizer_state(struct pipe_context *ctx,
294 const struct pipe_rasterizer_state *rs_state)
295 {
296 struct virgl_context *vctx = virgl_context(ctx);
297 uint32_t handle;
298 handle = virgl_object_assign_handle();
299
300 virgl_encode_rasterizer_state(vctx, handle, rs_state);
301 return (void *)(unsigned long)handle;
302 }
303
304 static void virgl_bind_rasterizer_state(struct pipe_context *ctx,
305 void *rs_state)
306 {
307 struct virgl_context *vctx = virgl_context(ctx);
308 uint32_t handle = (unsigned long)rs_state;
309
310 virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_RASTERIZER);
311 }
312
313 static void virgl_delete_rasterizer_state(struct pipe_context *ctx,
314 void *rs_state)
315 {
316 struct virgl_context *vctx = virgl_context(ctx);
317 uint32_t handle = (unsigned long)rs_state;
318 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_RASTERIZER);
319 }
320
321 static void virgl_set_framebuffer_state(struct pipe_context *ctx,
322 const struct pipe_framebuffer_state *state)
323 {
324 struct virgl_context *vctx = virgl_context(ctx);
325
326 vctx->framebuffer = *state;
327 virgl_encoder_set_framebuffer_state(vctx, state);
328 virgl_attach_res_framebuffer(vctx);
329 }
330
331 static void virgl_set_viewport_states(struct pipe_context *ctx,
332 unsigned start_slot,
333 unsigned num_viewports,
334 const struct pipe_viewport_state *state)
335 {
336 struct virgl_context *vctx = virgl_context(ctx);
337 virgl_encoder_set_viewport_states(vctx, start_slot, num_viewports, state);
338 }
339
340 static void *virgl_create_vertex_elements_state(struct pipe_context *ctx,
341 unsigned num_elements,
342 const struct pipe_vertex_element *elements)
343 {
344 struct virgl_context *vctx = virgl_context(ctx);
345 uint32_t handle = virgl_object_assign_handle();
346 virgl_encoder_create_vertex_elements(vctx, handle,
347 num_elements, elements);
348 return (void*)(unsigned long)handle;
349
350 }
351
352 static void virgl_delete_vertex_elements_state(struct pipe_context *ctx,
353 void *ve)
354 {
355 struct virgl_context *vctx = virgl_context(ctx);
356 uint32_t handle = (unsigned long)ve;
357
358 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
359 }
360
361 static void virgl_bind_vertex_elements_state(struct pipe_context *ctx,
362 void *ve)
363 {
364 struct virgl_context *vctx = virgl_context(ctx);
365 uint32_t handle = (unsigned long)ve;
366 virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
367 }
368
369 static void virgl_set_vertex_buffers(struct pipe_context *ctx,
370 unsigned start_slot,
371 unsigned num_buffers,
372 const struct pipe_vertex_buffer *buffers)
373 {
374 struct virgl_context *vctx = virgl_context(ctx);
375
376 util_set_vertex_buffers_count(vctx->vertex_buffer,
377 &vctx->num_vertex_buffers,
378 buffers, start_slot, num_buffers);
379
380 vctx->vertex_array_dirty = TRUE;
381 }
382
383 static void virgl_hw_set_vertex_buffers(struct pipe_context *ctx)
384 {
385 struct virgl_context *vctx = virgl_context(ctx);
386
387 if (vctx->vertex_array_dirty) {
388 virgl_encoder_set_vertex_buffers(vctx, vctx->num_vertex_buffers, vctx->vertex_buffer);
389 virgl_attach_res_vertex_buffers(vctx);
390 }
391 }
392
393 static void virgl_set_stencil_ref(struct pipe_context *ctx,
394 const struct pipe_stencil_ref *ref)
395 {
396 struct virgl_context *vctx = virgl_context(ctx);
397 virgl_encoder_set_stencil_ref(vctx, ref);
398 }
399
400 static void virgl_set_blend_color(struct pipe_context *ctx,
401 const struct pipe_blend_color *color)
402 {
403 struct virgl_context *vctx = virgl_context(ctx);
404 virgl_encoder_set_blend_color(vctx, color);
405 }
406
407 static void virgl_set_index_buffer(struct pipe_context *ctx,
408 const struct pipe_index_buffer *ib)
409 {
410 struct virgl_context *vctx = virgl_context(ctx);
411
412 if (ib) {
413 pipe_resource_reference(&vctx->index_buffer.buffer, ib->buffer);
414 memcpy(&vctx->index_buffer, ib, sizeof(*ib));
415 } else {
416 pipe_resource_reference(&vctx->index_buffer.buffer, NULL);
417 }
418 }
419
420 static void virgl_hw_set_index_buffer(struct pipe_context *ctx,
421 struct pipe_index_buffer *ib)
422 {
423 struct virgl_context *vctx = virgl_context(ctx);
424 virgl_encoder_set_index_buffer(vctx, ib);
425 virgl_attach_res_index_buffer(vctx);
426 }
427
428 static void virgl_set_constant_buffer(struct pipe_context *ctx,
429 uint shader, uint index,
430 struct pipe_constant_buffer *buf)
431 {
432 struct virgl_context *vctx = virgl_context(ctx);
433
434 if (buf) {
435 if (!buf->user_buffer){
436 struct virgl_resource *res = virgl_resource(buf->buffer);
437 virgl_encoder_set_uniform_buffer(vctx, shader, index, buf->buffer_offset,
438 buf->buffer_size, res);
439 pipe_resource_reference(&vctx->ubos[shader][index], buf->buffer);
440 return;
441 }
442 pipe_resource_reference(&vctx->ubos[shader][index], NULL);
443 virgl_encoder_write_constant_buffer(vctx, shader, index, buf->buffer_size / 4, buf->user_buffer);
444 } else {
445 virgl_encoder_write_constant_buffer(vctx, shader, index, 0, NULL);
446 pipe_resource_reference(&vctx->ubos[shader][index], NULL);
447 }
448 }
449
450 void virgl_transfer_inline_write(struct pipe_context *ctx,
451 struct pipe_resource *res,
452 unsigned level,
453 unsigned usage,
454 const struct pipe_box *box,
455 const void *data,
456 unsigned stride,
457 unsigned layer_stride)
458 {
459 struct virgl_context *vctx = virgl_context(ctx);
460 struct virgl_screen *vs = virgl_screen(ctx->screen);
461 struct virgl_resource *grres = virgl_resource(res);
462 struct virgl_buffer *vbuf = virgl_buffer(res);
463
464 grres->clean = FALSE;
465
466 if (virgl_res_needs_flush_wait(vctx, &vbuf->base, usage)) {
467 ctx->flush(ctx, NULL, 0);
468
469 vs->vws->resource_wait(vs->vws, vbuf->base.hw_res);
470 }
471
472 virgl_encoder_inline_write(vctx, grres, level, usage,
473 box, data, stride, layer_stride);
474 }
475
476 static void *virgl_shader_encoder(struct pipe_context *ctx,
477 const struct pipe_shader_state *shader,
478 unsigned type)
479 {
480 struct virgl_context *vctx = virgl_context(ctx);
481 uint32_t handle;
482 struct tgsi_token *new_tokens;
483 int ret;
484
485 new_tokens = virgl_tgsi_transform(shader->tokens);
486 if (!new_tokens)
487 return NULL;
488
489 handle = virgl_object_assign_handle();
490 /* encode VS state */
491 ret = virgl_encode_shader_state(vctx, handle, type,
492 &shader->stream_output,
493 new_tokens);
494 if (ret) {
495 return NULL;
496 }
497
498 FREE(new_tokens);
499 return (void *)(unsigned long)handle;
500
501 }
502 static void *virgl_create_vs_state(struct pipe_context *ctx,
503 const struct pipe_shader_state *shader)
504 {
505 return virgl_shader_encoder(ctx, shader, PIPE_SHADER_VERTEX);
506 }
507
508 static void *virgl_create_gs_state(struct pipe_context *ctx,
509 const struct pipe_shader_state *shader)
510 {
511 return virgl_shader_encoder(ctx, shader, PIPE_SHADER_GEOMETRY);
512 }
513
514 static void *virgl_create_fs_state(struct pipe_context *ctx,
515 const struct pipe_shader_state *shader)
516 {
517 return virgl_shader_encoder(ctx, shader, PIPE_SHADER_FRAGMENT);
518 }
519
520 static void
521 virgl_delete_fs_state(struct pipe_context *ctx,
522 void *fs)
523 {
524 uint32_t handle = (unsigned long)fs;
525 struct virgl_context *vctx = virgl_context(ctx);
526
527 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
528 }
529
530 static void
531 virgl_delete_gs_state(struct pipe_context *ctx,
532 void *gs)
533 {
534 uint32_t handle = (unsigned long)gs;
535 struct virgl_context *vctx = virgl_context(ctx);
536
537 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
538 }
539
540 static void
541 virgl_delete_vs_state(struct pipe_context *ctx,
542 void *vs)
543 {
544 uint32_t handle = (unsigned long)vs;
545 struct virgl_context *vctx = virgl_context(ctx);
546
547 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
548 }
549
550 static void virgl_bind_vs_state(struct pipe_context *ctx,
551 void *vss)
552 {
553 uint32_t handle = (unsigned long)vss;
554 struct virgl_context *vctx = virgl_context(ctx);
555
556 virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_VERTEX);
557 }
558
559 static void virgl_bind_gs_state(struct pipe_context *ctx,
560 void *vss)
561 {
562 uint32_t handle = (unsigned long)vss;
563 struct virgl_context *vctx = virgl_context(ctx);
564
565 virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_GEOMETRY);
566 }
567
568
569 static void virgl_bind_fs_state(struct pipe_context *ctx,
570 void *vss)
571 {
572 uint32_t handle = (unsigned long)vss;
573 struct virgl_context *vctx = virgl_context(ctx);
574
575 virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_FRAGMENT);
576 }
577
578 static void virgl_clear(struct pipe_context *ctx,
579 unsigned buffers,
580 const union pipe_color_union *color,
581 double depth, unsigned stencil)
582 {
583 struct virgl_context *vctx = virgl_context(ctx);
584
585 virgl_encode_clear(vctx, buffers, color, depth, stencil);
586 }
587
588 static void virgl_draw_vbo(struct pipe_context *ctx,
589 const struct pipe_draw_info *dinfo)
590 {
591 struct virgl_context *vctx = virgl_context(ctx);
592 struct virgl_screen *rs = virgl_screen(ctx->screen);
593 struct pipe_index_buffer ib = {};
594 struct pipe_draw_info info = *dinfo;
595
596 if (!(rs->caps.caps.v1.prim_mask & (1 << dinfo->mode))) {
597 util_primconvert_save_index_buffer(vctx->primconvert, &vctx->index_buffer);
598 util_primconvert_draw_vbo(vctx->primconvert, dinfo);
599 return;
600 }
601 if (info.indexed) {
602 pipe_resource_reference(&ib.buffer, vctx->index_buffer.buffer);
603 ib.user_buffer = vctx->index_buffer.user_buffer;
604 ib.index_size = vctx->index_buffer.index_size;
605 ib.offset = vctx->index_buffer.offset + info.start * ib.index_size;
606
607 if (ib.user_buffer) {
608 u_upload_data(vctx->uploader, 0, info.count * ib.index_size,
609 ib.user_buffer, &ib.offset, &ib.buffer);
610 ib.user_buffer = NULL;
611 }
612 }
613
614 u_upload_unmap(vctx->uploader);
615
616 vctx->num_draws++;
617 virgl_hw_set_vertex_buffers(ctx);
618 if (info.indexed)
619 virgl_hw_set_index_buffer(ctx, &ib);
620
621 virgl_encoder_draw_vbo(vctx, &info);
622
623 pipe_resource_reference(&ib.buffer, NULL);
624
625 }
626
627 static void virgl_flush_eq(struct virgl_context *ctx, void *closure)
628 {
629 struct virgl_screen *rs = virgl_screen(ctx->base.screen);
630
631 /* send the buffer to the remote side for decoding */
632 ctx->num_transfers = ctx->num_draws = 0;
633 rs->vws->submit_cmd(rs->vws, ctx->cbuf);
634
635 virgl_encoder_set_sub_ctx(ctx, ctx->hw_sub_ctx_id);
636
637 /* add back current framebuffer resources to reference list? */
638 virgl_reemit_res(ctx);
639 }
640
641 static void virgl_flush_from_st(struct pipe_context *ctx,
642 struct pipe_fence_handle **fence,
643 enum pipe_flush_flags flags)
644 {
645 struct virgl_context *vctx = virgl_context(ctx);
646 struct virgl_screen *rs = virgl_screen(ctx->screen);
647 struct virgl_buffer *buf, *tmp;
648
649 if (fence)
650 *fence = rs->vws->cs_create_fence(rs->vws);
651
652 LIST_FOR_EACH_ENTRY_SAFE(buf, tmp, &vctx->to_flush_bufs, flush_list) {
653 struct pipe_resource *res = &buf->base.u.b;
654 virgl_buffer_flush(vctx, buf);
655 list_del(&buf->flush_list);
656 buf->on_list = FALSE;
657 pipe_resource_reference(&res, NULL);
658
659 }
660 virgl_flush_eq(vctx, vctx);
661 }
662
663 static struct pipe_sampler_view *virgl_create_sampler_view(struct pipe_context *ctx,
664 struct pipe_resource *texture,
665 const struct pipe_sampler_view *state)
666 {
667 struct virgl_context *vctx = virgl_context(ctx);
668 struct virgl_sampler_view *grview = CALLOC_STRUCT(virgl_sampler_view);
669 uint32_t handle;
670 struct virgl_resource *res;
671
672 if (state == NULL)
673 return NULL;
674
675 res = virgl_resource(texture);
676 handle = virgl_object_assign_handle();
677 virgl_encode_sampler_view(vctx, handle, res, state);
678
679 grview->base = *state;
680 grview->base.reference.count = 1;
681
682 grview->base.texture = NULL;
683 grview->base.context = ctx;
684 pipe_resource_reference(&grview->base.texture, texture);
685 grview->handle = handle;
686 return &grview->base;
687 }
688
689 static void virgl_set_sampler_views(struct pipe_context *ctx,
690 unsigned shader_type,
691 unsigned start_slot,
692 unsigned num_views,
693 struct pipe_sampler_view **views)
694 {
695 struct virgl_context *vctx = virgl_context(ctx);
696 int i;
697 uint32_t disable_mask = ~((1ull << num_views) - 1);
698 struct virgl_textures_info *tinfo = &vctx->samplers[shader_type];
699 uint32_t new_mask = 0;
700 uint32_t remaining_mask;
701
702 remaining_mask = tinfo->enabled_mask & disable_mask;
703
704 while (remaining_mask) {
705 i = u_bit_scan(&remaining_mask);
706 assert(tinfo->views[i]);
707
708 pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], NULL);
709 }
710
711 for (i = 0; i < num_views; i++) {
712 struct virgl_sampler_view *grview = virgl_sampler_view(views[i]);
713
714 if (views[i] == (struct pipe_sampler_view *)tinfo->views[i])
715 continue;
716
717 if (grview) {
718 new_mask |= 1 << i;
719 pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], views[i]);
720 } else {
721 pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], NULL);
722 disable_mask |= 1 << i;
723 }
724 }
725
726 tinfo->enabled_mask &= ~disable_mask;
727 tinfo->enabled_mask |= new_mask;
728 virgl_encode_set_sampler_views(vctx, shader_type, start_slot, num_views, tinfo->views);
729 virgl_attach_res_sampler_views(vctx, shader_type);
730 }
731
732 static void virgl_destroy_sampler_view(struct pipe_context *ctx,
733 struct pipe_sampler_view *view)
734 {
735 struct virgl_context *vctx = virgl_context(ctx);
736 struct virgl_sampler_view *grview = virgl_sampler_view(view);
737
738 virgl_encode_delete_object(vctx, grview->handle, VIRGL_OBJECT_SAMPLER_VIEW);
739 pipe_resource_reference(&view->texture, NULL);
740 FREE(view);
741 }
742
743 static void *virgl_create_sampler_state(struct pipe_context *ctx,
744 const struct pipe_sampler_state *state)
745 {
746 struct virgl_context *vctx = virgl_context(ctx);
747 uint32_t handle;
748
749 handle = virgl_object_assign_handle();
750
751 virgl_encode_sampler_state(vctx, handle, state);
752 return (void *)(unsigned long)handle;
753 }
754
755 static void virgl_delete_sampler_state(struct pipe_context *ctx,
756 void *ss)
757 {
758 struct virgl_context *vctx = virgl_context(ctx);
759 uint32_t handle = (unsigned long)ss;
760
761 virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SAMPLER_STATE);
762 }
763
764 static void virgl_bind_sampler_states(struct pipe_context *ctx,
765 unsigned shader, unsigned start_slot,
766 unsigned num_samplers,
767 void **samplers)
768 {
769 struct virgl_context *vctx = virgl_context(ctx);
770 uint32_t handles[32];
771 int i;
772 for (i = 0; i < num_samplers; i++) {
773 handles[i] = (unsigned long)(samplers[i]);
774 }
775 virgl_encode_bind_sampler_states(vctx, shader, start_slot, num_samplers, handles);
776 }
777
778 static void virgl_set_polygon_stipple(struct pipe_context *ctx,
779 const struct pipe_poly_stipple *ps)
780 {
781 struct virgl_context *vctx = virgl_context(ctx);
782 virgl_encoder_set_polygon_stipple(vctx, ps);
783 }
784
785 static void virgl_set_scissor_states(struct pipe_context *ctx,
786 unsigned start_slot,
787 unsigned num_scissor,
788 const struct pipe_scissor_state *ss)
789 {
790 struct virgl_context *vctx = virgl_context(ctx);
791 virgl_encoder_set_scissor_state(vctx, start_slot, num_scissor, ss);
792 }
793
794 static void virgl_set_sample_mask(struct pipe_context *ctx,
795 unsigned sample_mask)
796 {
797 struct virgl_context *vctx = virgl_context(ctx);
798 virgl_encoder_set_sample_mask(vctx, sample_mask);
799 }
800
801 static void virgl_set_clip_state(struct pipe_context *ctx,
802 const struct pipe_clip_state *clip)
803 {
804 struct virgl_context *vctx = virgl_context(ctx);
805 virgl_encoder_set_clip_state(vctx, clip);
806 }
807
808 static void virgl_resource_copy_region(struct pipe_context *ctx,
809 struct pipe_resource *dst,
810 unsigned dst_level,
811 unsigned dstx, unsigned dsty, unsigned dstz,
812 struct pipe_resource *src,
813 unsigned src_level,
814 const struct pipe_box *src_box)
815 {
816 struct virgl_context *vctx = virgl_context(ctx);
817 struct virgl_resource *dres = virgl_resource(dst);
818 struct virgl_resource *sres = virgl_resource(src);
819
820 dres->clean = FALSE;
821 virgl_encode_resource_copy_region(vctx, dres,
822 dst_level, dstx, dsty, dstz,
823 sres, src_level,
824 src_box);
825 }
826
827 static void
828 virgl_flush_resource(struct pipe_context *pipe,
829 struct pipe_resource *resource)
830 {
831 }
832
833 static void virgl_blit(struct pipe_context *ctx,
834 const struct pipe_blit_info *blit)
835 {
836 struct virgl_context *vctx = virgl_context(ctx);
837 struct virgl_resource *dres = virgl_resource(blit->dst.resource);
838 struct virgl_resource *sres = virgl_resource(blit->src.resource);
839
840 dres->clean = FALSE;
841 virgl_encode_blit(vctx, dres, sres,
842 blit);
843 }
844
845 static void
846 virgl_context_destroy( struct pipe_context *ctx )
847 {
848 struct virgl_context *vctx = virgl_context(ctx);
849 struct virgl_screen *rs = virgl_screen(ctx->screen);
850
851 vctx->framebuffer.zsbuf = NULL;
852 vctx->framebuffer.nr_cbufs = 0;
853 virgl_encoder_destroy_sub_ctx(vctx, vctx->hw_sub_ctx_id);
854 virgl_flush_eq(vctx, vctx);
855
856 rs->vws->cmd_buf_destroy(vctx->cbuf);
857 if (vctx->uploader)
858 u_upload_destroy(vctx->uploader);
859 util_primconvert_destroy(vctx->primconvert);
860
861 util_slab_destroy(&vctx->texture_transfer_pool);
862 FREE(vctx);
863 }
864
865 struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
866 void *priv,
867 unsigned flags)
868 {
869 struct virgl_context *vctx;
870 struct virgl_screen *rs = virgl_screen(pscreen);
871 vctx = CALLOC_STRUCT(virgl_context);
872
873 vctx->cbuf = rs->vws->cmd_buf_create(rs->vws);
874 if (!vctx->cbuf) {
875 FREE(vctx);
876 return NULL;
877 }
878
879 vctx->base.destroy = virgl_context_destroy;
880 vctx->base.create_surface = virgl_create_surface;
881 vctx->base.surface_destroy = virgl_surface_destroy;
882 vctx->base.set_framebuffer_state = virgl_set_framebuffer_state;
883 vctx->base.create_blend_state = virgl_create_blend_state;
884 vctx->base.bind_blend_state = virgl_bind_blend_state;
885 vctx->base.delete_blend_state = virgl_delete_blend_state;
886 vctx->base.create_depth_stencil_alpha_state = virgl_create_depth_stencil_alpha_state;
887 vctx->base.bind_depth_stencil_alpha_state = virgl_bind_depth_stencil_alpha_state;
888 vctx->base.delete_depth_stencil_alpha_state = virgl_delete_depth_stencil_alpha_state;
889 vctx->base.create_rasterizer_state = virgl_create_rasterizer_state;
890 vctx->base.bind_rasterizer_state = virgl_bind_rasterizer_state;
891 vctx->base.delete_rasterizer_state = virgl_delete_rasterizer_state;
892
893 vctx->base.set_viewport_states = virgl_set_viewport_states;
894 vctx->base.create_vertex_elements_state = virgl_create_vertex_elements_state;
895 vctx->base.bind_vertex_elements_state = virgl_bind_vertex_elements_state;
896 vctx->base.delete_vertex_elements_state = virgl_delete_vertex_elements_state;
897 vctx->base.set_vertex_buffers = virgl_set_vertex_buffers;
898 vctx->base.set_index_buffer = virgl_set_index_buffer;
899 vctx->base.set_constant_buffer = virgl_set_constant_buffer;
900 vctx->base.transfer_inline_write = virgl_transfer_inline_write;
901
902 vctx->base.create_vs_state = virgl_create_vs_state;
903 vctx->base.create_gs_state = virgl_create_gs_state;
904 vctx->base.create_fs_state = virgl_create_fs_state;
905
906 vctx->base.bind_vs_state = virgl_bind_vs_state;
907 vctx->base.bind_gs_state = virgl_bind_gs_state;
908 vctx->base.bind_fs_state = virgl_bind_fs_state;
909
910 vctx->base.delete_vs_state = virgl_delete_vs_state;
911 vctx->base.delete_gs_state = virgl_delete_gs_state;
912 vctx->base.delete_fs_state = virgl_delete_fs_state;
913
914 vctx->base.clear = virgl_clear;
915 vctx->base.draw_vbo = virgl_draw_vbo;
916 vctx->base.flush = virgl_flush_from_st;
917 vctx->base.screen = pscreen;
918 vctx->base.create_sampler_view = virgl_create_sampler_view;
919 vctx->base.sampler_view_destroy = virgl_destroy_sampler_view;
920 vctx->base.set_sampler_views = virgl_set_sampler_views;
921
922 vctx->base.create_sampler_state = virgl_create_sampler_state;
923 vctx->base.delete_sampler_state = virgl_delete_sampler_state;
924 vctx->base.bind_sampler_states = virgl_bind_sampler_states;
925
926 vctx->base.set_polygon_stipple = virgl_set_polygon_stipple;
927 vctx->base.set_scissor_states = virgl_set_scissor_states;
928 vctx->base.set_sample_mask = virgl_set_sample_mask;
929 vctx->base.set_stencil_ref = virgl_set_stencil_ref;
930 vctx->base.set_clip_state = virgl_set_clip_state;
931
932 vctx->base.set_blend_color = virgl_set_blend_color;
933
934 vctx->base.resource_copy_region = virgl_resource_copy_region;
935 vctx->base.flush_resource = virgl_flush_resource;
936 vctx->base.blit = virgl_blit;
937
938 virgl_init_context_resource_functions(&vctx->base);
939 virgl_init_query_functions(vctx);
940 virgl_init_so_functions(vctx);
941
942 list_inithead(&vctx->to_flush_bufs);
943 util_slab_create(&vctx->texture_transfer_pool, sizeof(struct virgl_transfer),
944 16, UTIL_SLAB_SINGLETHREADED);
945
946 vctx->primconvert = util_primconvert_create(&vctx->base, rs->caps.caps.v1.prim_mask);
947 vctx->uploader = u_upload_create(&vctx->base, 1024 * 1024, 256,
948 PIPE_BIND_INDEX_BUFFER);
949 if (!vctx->uploader)
950 goto fail;
951
952 vctx->hw_sub_ctx_id = rs->sub_ctx_id++;
953 virgl_encoder_create_sub_ctx(vctx, vctx->hw_sub_ctx_id);
954
955 virgl_encoder_set_sub_ctx(vctx, vctx->hw_sub_ctx_id);
956 return &vctx->base;
957 fail:
958 return NULL;
959 }