src/gallium/drivers/virgl/virgl_context.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "pipe/p_shader_tokens.h"
  25
  26 #include "pipe/p_context.h"
  27 #include "pipe/p_defines.h"
  28 #include "pipe/p_screen.h"
  29 #include "pipe/p_state.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/u_prim.h"
  34 #include "util/u_transfer.h"
  35 #include "util/u_helpers.h"
  36 #include "util/slab.h"
  37 #include "util/u_upload_mgr.h"
  38 #include "util/u_blitter.h"
  39 #include "tgsi/tgsi_text.h"
  40 #include "indices/u_primconvert.h"
  41
  42 #include "pipebuffer/pb_buffer.h"
  43
  44 #include "virgl_encode.h"
  45 #include "virgl_context.h"
  46 #include "virgl_protocol.h"
  47 #include "virgl_resource.h"
  48 #include "virgl_screen.h"
  49
  50 static uint32_t next_handle;
  51 uint32_t virgl_object_assign_handle(void)
  52 {
  53    return ++next_handle;
  54 }
  55
  56 static void virgl_buffer_flush(struct virgl_context *vctx,
  57                               struct virgl_buffer *vbuf)
  58 {
  59    struct virgl_screen *rs = virgl_screen(vctx->base.screen);
  60    struct pipe_box box;
  61
  62    assert(vbuf->on_list);
  63
  64    box.height = 1;
  65    box.depth = 1;
  66    box.y = 0;
  67    box.z = 0;
  68
  69    box.x = vbuf->valid_buffer_range.start;
  70    box.width = MIN2(vbuf->valid_buffer_range.end - vbuf->valid_buffer_range.start, vbuf->base.u.b.width0);
  71
  72    vctx->num_transfers++;
  73    rs->vws->transfer_put(rs->vws, vbuf->base.hw_res,
  74                          &box, 0, 0, box.x, 0);
  75
  76    util_range_set_empty(&vbuf->valid_buffer_range);
  77 }
  78
  79 static void virgl_attach_res_framebuffer(struct virgl_context *vctx)
  80 {
  81    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
  82    struct pipe_surface *surf;
  83    struct virgl_resource *res;
  84    unsigned i;
  85
  86    surf = vctx->framebuffer.zsbuf;
  87    if (surf) {
  88       res = virgl_resource(surf->texture);
  89       if (res)
  90          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
  91    }
  92    for (i = 0; i < vctx->framebuffer.nr_cbufs; i++) {
  93       surf = vctx->framebuffer.cbufs[i];
  94       if (surf) {
  95          res = virgl_resource(surf->texture);
  96          if (res)
  97             vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
  98       }
  99    }
 100 }
 101
 102 static void virgl_attach_res_sampler_views(struct virgl_context *vctx,
 103                                            enum pipe_shader_type shader_type)
 104 {
 105    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 106    struct virgl_textures_info *tinfo = &vctx->samplers[shader_type];
 107    struct virgl_resource *res;
 108    uint32_t remaining_mask = tinfo->enabled_mask;
 109    unsigned i;
 110    while (remaining_mask) {
 111       i = u_bit_scan(&remaining_mask);
 112       assert(tinfo->views[i]);
 113
 114       res = virgl_resource(tinfo->views[i]->base.texture);
 115       if (res)
 116          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 117    }
 118 }
 119
 120 static void virgl_attach_res_vertex_buffers(struct virgl_context *vctx)
 121 {
 122    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 123    struct virgl_resource *res;
 124    unsigned i;
 125
 126    for (i = 0; i < vctx->num_vertex_buffers; i++) {
 127       res = virgl_resource(vctx->vertex_buffer[i].buffer.resource);
 128       if (res)
 129          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 130    }
 131 }
 132
 133 static void virgl_attach_res_index_buffer(struct virgl_context *vctx,
 134                                           struct virgl_indexbuf *ib)
 135 {
 136    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 137    struct virgl_resource *res;
 138
 139    res = virgl_resource(ib->buffer);
 140    if (res)
 141       vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 142 }
 143
 144 static void virgl_attach_res_so_targets(struct virgl_context *vctx)
 145 {
 146    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 147    struct virgl_resource *res;
 148    unsigned i;
 149
 150    for (i = 0; i < vctx->num_so_targets; i++) {
 151       res = virgl_resource(vctx->so_targets[i].base.buffer);
 152       if (res)
 153          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 154    }
 155 }
 156
 157 static void virgl_attach_res_uniform_buffers(struct virgl_context *vctx,
 158                                              enum pipe_shader_type shader_type)
 159 {
 160    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 161    struct virgl_resource *res;
 162    unsigned i;
 163    for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
 164       res = virgl_resource(vctx->ubos[shader_type][i]);
 165       if (res) {
 166          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 167       }
 168    }
 169 }
 170
 171 static void virgl_attach_res_shader_buffers(struct virgl_context *vctx,
 172                                             enum pipe_shader_type shader_type)
 173 {
 174    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 175    struct virgl_resource *res;
 176    unsigned i;
 177    for (i = 0; i < PIPE_MAX_SHADER_BUFFERS; i++) {
 178       res = virgl_resource(vctx->ssbos[shader_type][i]);
 179       if (res) {
 180          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 181       }
 182    }
 183 }
 184
 185 static void virgl_attach_res_shader_images(struct virgl_context *vctx,
 186                                            enum pipe_shader_type shader_type)
 187 {
 188    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
 189    struct virgl_resource *res;
 190    unsigned i;
 191    for (i = 0; i < PIPE_MAX_SHADER_IMAGES; i++) {
 192       res = virgl_resource(vctx->images[shader_type][i]);
 193       if (res) {
 194          vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
 195       }
 196    }
 197 }
 198
 199 /*
 200  * after flushing, the hw context still has a bunch of
 201  * resources bound, so we need to rebind those here.
 202  */
 203 static void virgl_reemit_res(struct virgl_context *vctx)
 204 {
 205    enum pipe_shader_type shader_type;
 206
 207    /* reattach any flushed resources */
 208    /* framebuffer, sampler views, vertex/index/uniform/stream buffers */
 209    virgl_attach_res_framebuffer(vctx);
 210
 211    for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
 212       virgl_attach_res_sampler_views(vctx, shader_type);
 213       virgl_attach_res_uniform_buffers(vctx, shader_type);
 214       virgl_attach_res_shader_buffers(vctx, shader_type);
 215       virgl_attach_res_shader_images(vctx, shader_type);
 216    }
 217    virgl_attach_res_vertex_buffers(vctx);
 218    virgl_attach_res_so_targets(vctx);
 219 }
 220
 221 static struct pipe_surface *virgl_create_surface(struct pipe_context *ctx,
 222                                                 struct pipe_resource *resource,
 223                                                 const struct pipe_surface *templ)
 224 {
 225    struct virgl_context *vctx = virgl_context(ctx);
 226    struct virgl_surface *surf;
 227    struct virgl_resource *res = virgl_resource(resource);
 228    uint32_t handle;
 229
 230    surf = CALLOC_STRUCT(virgl_surface);
 231    if (!surf)
 232       return NULL;
 233
 234    res->clean = FALSE;
 235    handle = virgl_object_assign_handle();
 236    pipe_reference_init(&surf->base.reference, 1);
 237    pipe_resource_reference(&surf->base.texture, resource);
 238    surf->base.context = ctx;
 239    surf->base.format = templ->format;
 240    if (resource->target != PIPE_BUFFER) {
 241       surf->base.width = u_minify(resource->width0, templ->u.tex.level);
 242       surf->base.height = u_minify(resource->height0, templ->u.tex.level);
 243       surf->base.u.tex.level = templ->u.tex.level;
 244       surf->base.u.tex.first_layer = templ->u.tex.first_layer;
 245       surf->base.u.tex.last_layer = templ->u.tex.last_layer;
 246    } else {
 247       surf->base.width = templ->u.buf.last_element - templ->u.buf.first_element + 1;
 248       surf->base.height = resource->height0;
 249       surf->base.u.buf.first_element = templ->u.buf.first_element;
 250       surf->base.u.buf.last_element = templ->u.buf.last_element;
 251    }
 252    virgl_encoder_create_surface(vctx, handle, res, &surf->base);
 253    surf->handle = handle;
 254    return &surf->base;
 255 }
 256
 257 static void virgl_surface_destroy(struct pipe_context *ctx,
 258                                  struct pipe_surface *psurf)
 259 {
 260    struct virgl_context *vctx = virgl_context(ctx);
 261    struct virgl_surface *surf = virgl_surface(psurf);
 262
 263    pipe_resource_reference(&surf->base.texture, NULL);
 264    virgl_encode_delete_object(vctx, surf->handle, VIRGL_OBJECT_SURFACE);
 265    FREE(surf);
 266 }
 267
 268 static void *virgl_create_blend_state(struct pipe_context *ctx,
 269                                               const struct pipe_blend_state *blend_state)
 270 {
 271    struct virgl_context *vctx = virgl_context(ctx);
 272    uint32_t handle;
 273    handle = virgl_object_assign_handle();
 274
 275    virgl_encode_blend_state(vctx, handle, blend_state);
 276    return (void *)(unsigned long)handle;
 277
 278 }
 279
 280 static void virgl_bind_blend_state(struct pipe_context *ctx,
 281                                            void *blend_state)
 282 {
 283    struct virgl_context *vctx = virgl_context(ctx);
 284    uint32_t handle = (unsigned long)blend_state;
 285    virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_BLEND);
 286 }
 287
 288 static void virgl_delete_blend_state(struct pipe_context *ctx,
 289                                      void *blend_state)
 290 {
 291    struct virgl_context *vctx = virgl_context(ctx);
 292    uint32_t handle = (unsigned long)blend_state;
 293    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_BLEND);
 294 }
 295
 296 static void *virgl_create_depth_stencil_alpha_state(struct pipe_context *ctx,
 297                                                    const struct pipe_depth_stencil_alpha_state *blend_state)
 298 {
 299    struct virgl_context *vctx = virgl_context(ctx);
 300    uint32_t handle;
 301    handle = virgl_object_assign_handle();
 302
 303    virgl_encode_dsa_state(vctx, handle, blend_state);
 304    return (void *)(unsigned long)handle;
 305 }
 306
 307 static void virgl_bind_depth_stencil_alpha_state(struct pipe_context *ctx,
 308                                                 void *blend_state)
 309 {
 310    struct virgl_context *vctx = virgl_context(ctx);
 311    uint32_t handle = (unsigned long)blend_state;
 312    virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_DSA);
 313 }
 314
 315 static void virgl_delete_depth_stencil_alpha_state(struct pipe_context *ctx,
 316                                                   void *dsa_state)
 317 {
 318    struct virgl_context *vctx = virgl_context(ctx);
 319    uint32_t handle = (unsigned long)dsa_state;
 320    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_DSA);
 321 }
 322
 323 static void *virgl_create_rasterizer_state(struct pipe_context *ctx,
 324                                                    const struct pipe_rasterizer_state *rs_state)
 325 {
 326    struct virgl_context *vctx = virgl_context(ctx);
 327    uint32_t handle;
 328    handle = virgl_object_assign_handle();
 329
 330    virgl_encode_rasterizer_state(vctx, handle, rs_state);
 331    return (void *)(unsigned long)handle;
 332 }
 333
 334 static void virgl_bind_rasterizer_state(struct pipe_context *ctx,
 335                                                 void *rs_state)
 336 {
 337    struct virgl_context *vctx = virgl_context(ctx);
 338    uint32_t handle = (unsigned long)rs_state;
 339
 340    virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_RASTERIZER);
 341 }
 342
 343 static void virgl_delete_rasterizer_state(struct pipe_context *ctx,
 344                                          void *rs_state)
 345 {
 346    struct virgl_context *vctx = virgl_context(ctx);
 347    uint32_t handle = (unsigned long)rs_state;
 348    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_RASTERIZER);
 349 }
 350
 351 static void virgl_set_framebuffer_state(struct pipe_context *ctx,
 352                                                 const struct pipe_framebuffer_state *state)
 353 {
 354    struct virgl_context *vctx = virgl_context(ctx);
 355
 356    vctx->framebuffer = *state;
 357    virgl_encoder_set_framebuffer_state(vctx, state);
 358    virgl_attach_res_framebuffer(vctx);
 359 }
 360
 361 static void virgl_set_viewport_states(struct pipe_context *ctx,
 362                                      unsigned start_slot,
 363                                      unsigned num_viewports,
 364                                      const struct pipe_viewport_state *state)
 365 {
 366    struct virgl_context *vctx = virgl_context(ctx);
 367    virgl_encoder_set_viewport_states(vctx, start_slot, num_viewports, state);
 368 }
 369
 370 static void *virgl_create_vertex_elements_state(struct pipe_context *ctx,
 371                                                         unsigned num_elements,
 372                                                         const struct pipe_vertex_element *elements)
 373 {
 374    struct virgl_context *vctx = virgl_context(ctx);
 375    uint32_t handle = virgl_object_assign_handle();
 376    virgl_encoder_create_vertex_elements(vctx, handle,
 377                                        num_elements, elements);
 378    return (void*)(unsigned long)handle;
 379
 380 }
 381
 382 static void virgl_delete_vertex_elements_state(struct pipe_context *ctx,
 383                                               void *ve)
 384 {
 385    struct virgl_context *vctx = virgl_context(ctx);
 386    uint32_t handle = (unsigned long)ve;
 387
 388    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
 389 }
 390
 391 static void virgl_bind_vertex_elements_state(struct pipe_context *ctx,
 392                                                      void *ve)
 393 {
 394    struct virgl_context *vctx = virgl_context(ctx);
 395    uint32_t handle = (unsigned long)ve;
 396    virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
 397 }
 398
 399 static void virgl_set_vertex_buffers(struct pipe_context *ctx,
 400                                     unsigned start_slot,
 401                                     unsigned num_buffers,
 402                                     const struct pipe_vertex_buffer *buffers)
 403 {
 404    struct virgl_context *vctx = virgl_context(ctx);
 405
 406    util_set_vertex_buffers_count(vctx->vertex_buffer,
 407                                  &vctx->num_vertex_buffers,
 408                                  buffers, start_slot, num_buffers);
 409
 410    vctx->vertex_array_dirty = TRUE;
 411 }
 412
 413 static void virgl_hw_set_vertex_buffers(struct pipe_context *ctx)
 414 {
 415    struct virgl_context *vctx = virgl_context(ctx);
 416
 417    if (vctx->vertex_array_dirty) {
 418       virgl_encoder_set_vertex_buffers(vctx, vctx->num_vertex_buffers, vctx->vertex_buffer);
 419       virgl_attach_res_vertex_buffers(vctx);
 420    }
 421 }
 422
 423 static void virgl_set_stencil_ref(struct pipe_context *ctx,
 424                                  const struct pipe_stencil_ref *ref)
 425 {
 426    struct virgl_context *vctx = virgl_context(ctx);
 427    virgl_encoder_set_stencil_ref(vctx, ref);
 428 }
 429
 430 static void virgl_set_blend_color(struct pipe_context *ctx,
 431                                  const struct pipe_blend_color *color)
 432 {
 433    struct virgl_context *vctx = virgl_context(ctx);
 434    virgl_encoder_set_blend_color(vctx, color);
 435 }
 436
 437 static void virgl_hw_set_index_buffer(struct pipe_context *ctx,
 438                                      struct virgl_indexbuf *ib)
 439 {
 440    struct virgl_context *vctx = virgl_context(ctx);
 441    virgl_encoder_set_index_buffer(vctx, ib);
 442    virgl_attach_res_index_buffer(vctx, ib);
 443 }
 444
 445 static void virgl_set_constant_buffer(struct pipe_context *ctx,
 446                                      enum pipe_shader_type shader, uint index,
 447                                      const struct pipe_constant_buffer *buf)
 448 {
 449    struct virgl_context *vctx = virgl_context(ctx);
 450
 451    if (buf) {
 452       if (!buf->user_buffer){
 453          struct virgl_resource *res = virgl_resource(buf->buffer);
 454          virgl_encoder_set_uniform_buffer(vctx, shader, index, buf->buffer_offset,
 455                                           buf->buffer_size, res);
 456          pipe_resource_reference(&vctx->ubos[shader][index], buf->buffer);
 457          return;
 458       }
 459       pipe_resource_reference(&vctx->ubos[shader][index], NULL);
 460       virgl_encoder_write_constant_buffer(vctx, shader, index, buf->buffer_size / 4, buf->user_buffer);
 461    } else {
 462       virgl_encoder_write_constant_buffer(vctx, shader, index, 0, NULL);
 463       pipe_resource_reference(&vctx->ubos[shader][index], NULL);
 464    }
 465 }
 466
 467 void virgl_transfer_inline_write(struct pipe_context *ctx,
 468                                 struct pipe_resource *res,
 469                                 unsigned level,
 470                                 unsigned usage,
 471                                 const struct pipe_box *box,
 472                                 const void *data,
 473                                 unsigned stride,
 474                                 unsigned layer_stride)
 475 {
 476    struct virgl_context *vctx = virgl_context(ctx);
 477    struct virgl_screen *vs = virgl_screen(ctx->screen);
 478    struct virgl_resource *grres = virgl_resource(res);
 479    struct virgl_buffer *vbuf = virgl_buffer(res);
 480
 481    grres->clean = FALSE;
 482
 483    if (virgl_res_needs_flush_wait(vctx, &vbuf->base, usage)) {
 484       ctx->flush(ctx, NULL, 0);
 485
 486       vs->vws->resource_wait(vs->vws, vbuf->base.hw_res);
 487    }
 488
 489    virgl_encoder_inline_write(vctx, grres, level, usage,
 490                               box, data, stride, layer_stride);
 491 }
 492
 493 static void *virgl_shader_encoder(struct pipe_context *ctx,
 494                                   const struct pipe_shader_state *shader,
 495                                   unsigned type)
 496 {
 497    struct virgl_context *vctx = virgl_context(ctx);
 498    uint32_t handle;
 499    struct tgsi_token *new_tokens;
 500    int ret;
 501
 502    new_tokens = virgl_tgsi_transform(vctx, shader->tokens);
 503    if (!new_tokens)
 504       return NULL;
 505
 506    handle = virgl_object_assign_handle();
 507    /* encode VS state */
 508    ret = virgl_encode_shader_state(vctx, handle, type,
 509                                    &shader->stream_output, 0,
 510                                    new_tokens);
 511    if (ret) {
 512       return NULL;
 513    }
 514
 515    FREE(new_tokens);
 516    return (void *)(unsigned long)handle;
 517
 518 }
 519 static void *virgl_create_vs_state(struct pipe_context *ctx,
 520                                    const struct pipe_shader_state *shader)
 521 {
 522    return virgl_shader_encoder(ctx, shader, PIPE_SHADER_VERTEX);
 523 }
 524
 525 static void *virgl_create_tcs_state(struct pipe_context *ctx,
 526                                    const struct pipe_shader_state *shader)
 527 {
 528    return virgl_shader_encoder(ctx, shader, PIPE_SHADER_TESS_CTRL);
 529 }
 530
 531 static void *virgl_create_tes_state(struct pipe_context *ctx,
 532                                    const struct pipe_shader_state *shader)
 533 {
 534    return virgl_shader_encoder(ctx, shader, PIPE_SHADER_TESS_EVAL);
 535 }
 536
 537 static void *virgl_create_gs_state(struct pipe_context *ctx,
 538                                    const struct pipe_shader_state *shader)
 539 {
 540    return virgl_shader_encoder(ctx, shader, PIPE_SHADER_GEOMETRY);
 541 }
 542
 543 static void *virgl_create_fs_state(struct pipe_context *ctx,
 544                                    const struct pipe_shader_state *shader)
 545 {
 546    return virgl_shader_encoder(ctx, shader, PIPE_SHADER_FRAGMENT);
 547 }
 548
 549 static void
 550 virgl_delete_fs_state(struct pipe_context *ctx,
 551                      void *fs)
 552 {
 553    uint32_t handle = (unsigned long)fs;
 554    struct virgl_context *vctx = virgl_context(ctx);
 555
 556    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
 557 }
 558
 559 static void
 560 virgl_delete_gs_state(struct pipe_context *ctx,
 561                      void *gs)
 562 {
 563    uint32_t handle = (unsigned long)gs;
 564    struct virgl_context *vctx = virgl_context(ctx);
 565
 566    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
 567 }
 568
 569 static void
 570 virgl_delete_vs_state(struct pipe_context *ctx,
 571                      void *vs)
 572 {
 573    uint32_t handle = (unsigned long)vs;
 574    struct virgl_context *vctx = virgl_context(ctx);
 575
 576    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
 577 }
 578
 579 static void
 580 virgl_delete_tcs_state(struct pipe_context *ctx,
 581                        void *tcs)
 582 {
 583    uint32_t handle = (unsigned long)tcs;
 584    struct virgl_context *vctx = virgl_context(ctx);
 585
 586    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
 587 }
 588
 589 static void
 590 virgl_delete_tes_state(struct pipe_context *ctx,
 591                       void *tes)
 592 {
 593    uint32_t handle = (unsigned long)tes;
 594    struct virgl_context *vctx = virgl_context(ctx);
 595
 596    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
 597 }
 598
 599 static void virgl_bind_vs_state(struct pipe_context *ctx,
 600                                         void *vss)
 601 {
 602    uint32_t handle = (unsigned long)vss;
 603    struct virgl_context *vctx = virgl_context(ctx);
 604
 605    virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_VERTEX);
 606 }
 607
 608 static void virgl_bind_tcs_state(struct pipe_context *ctx,
 609                                void *vss)
 610 {
 611    uint32_t handle = (unsigned long)vss;
 612    struct virgl_context *vctx = virgl_context(ctx);
 613
 614    virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_TESS_CTRL);
 615 }
 616
 617 static void virgl_bind_tes_state(struct pipe_context *ctx,
 618                                void *vss)
 619 {
 620    uint32_t handle = (unsigned long)vss;
 621    struct virgl_context *vctx = virgl_context(ctx);
 622
 623    virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_TESS_EVAL);
 624 }
 625
 626 static void virgl_bind_gs_state(struct pipe_context *ctx,
 627                                void *vss)
 628 {
 629    uint32_t handle = (unsigned long)vss;
 630    struct virgl_context *vctx = virgl_context(ctx);
 631
 632    virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_GEOMETRY);
 633 }
 634
 635
 636 static void virgl_bind_fs_state(struct pipe_context *ctx,
 637                                         void *vss)
 638 {
 639    uint32_t handle = (unsigned long)vss;
 640    struct virgl_context *vctx = virgl_context(ctx);
 641
 642    virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_FRAGMENT);
 643 }
 644
 645 static void virgl_clear(struct pipe_context *ctx,
 646                                 unsigned buffers,
 647                                 const union pipe_color_union *color,
 648                                 double depth, unsigned stencil)
 649 {
 650    struct virgl_context *vctx = virgl_context(ctx);
 651
 652    virgl_encode_clear(vctx, buffers, color, depth, stencil);
 653 }
 654
 655 static void virgl_draw_vbo(struct pipe_context *ctx,
 656                                    const struct pipe_draw_info *dinfo)
 657 {
 658    struct virgl_context *vctx = virgl_context(ctx);
 659    struct virgl_screen *rs = virgl_screen(ctx->screen);
 660    struct virgl_indexbuf ib = {};
 661    struct pipe_draw_info info = *dinfo;
 662
 663    if (!dinfo->count_from_stream_output && !dinfo->indirect &&
 664        !dinfo->primitive_restart &&
 665        !u_trim_pipe_prim(dinfo->mode, (unsigned*)&dinfo->count))
 666       return;
 667
 668    if (!(rs->caps.caps.v1.prim_mask & (1 << dinfo->mode))) {
 669       util_primconvert_draw_vbo(vctx->primconvert, dinfo);
 670       return;
 671    }
 672    if (info.index_size) {
 673            pipe_resource_reference(&ib.buffer, info.has_user_indices ? NULL : info.index.resource);
 674            ib.user_buffer = info.has_user_indices ? info.index.user : NULL;
 675            ib.index_size = dinfo->index_size;
 676            ib.offset = info.start * ib.index_size;
 677
 678            if (ib.user_buffer) {
 679                    u_upload_data(vctx->uploader, 0, info.count * ib.index_size, 256,
 680                                  ib.user_buffer, &ib.offset, &ib.buffer);
 681                    ib.user_buffer = NULL;
 682            }
 683    }
 684
 685    u_upload_unmap(vctx->uploader);
 686
 687    vctx->num_draws++;
 688    virgl_hw_set_vertex_buffers(ctx);
 689    if (info.index_size)
 690       virgl_hw_set_index_buffer(ctx, &ib);
 691
 692    virgl_encoder_draw_vbo(vctx, &info);
 693
 694    pipe_resource_reference(&ib.buffer, NULL);
 695
 696 }
 697
 698 static void virgl_flush_eq(struct virgl_context *ctx, void *closure)
 699 {
 700    struct virgl_screen *rs = virgl_screen(ctx->base.screen);
 701
 702    /* send the buffer to the remote side for decoding */
 703    ctx->num_transfers = ctx->num_draws = 0;
 704    rs->vws->submit_cmd(rs->vws, ctx->cbuf);
 705
 706    virgl_encoder_set_sub_ctx(ctx, ctx->hw_sub_ctx_id);
 707
 708    /* add back current framebuffer resources to reference list? */
 709    virgl_reemit_res(ctx);
 710 }
 711
 712 static void virgl_flush_from_st(struct pipe_context *ctx,
 713                                struct pipe_fence_handle **fence,
 714                                enum pipe_flush_flags flags)
 715 {
 716    struct virgl_context *vctx = virgl_context(ctx);
 717    struct virgl_screen *rs = virgl_screen(ctx->screen);
 718    struct virgl_buffer *buf, *tmp;
 719
 720    if (fence)
 721       *fence = rs->vws->cs_create_fence(rs->vws);
 722
 723    LIST_FOR_EACH_ENTRY_SAFE(buf, tmp, &vctx->to_flush_bufs, flush_list) {
 724       struct pipe_resource *res = &buf->base.u.b;
 725       virgl_buffer_flush(vctx, buf);
 726       list_del(&buf->flush_list);
 727       buf->on_list = FALSE;
 728       pipe_resource_reference(&res, NULL);
 729
 730    }
 731    virgl_flush_eq(vctx, vctx);
 732 }
 733
 734 static struct pipe_sampler_view *virgl_create_sampler_view(struct pipe_context *ctx,
 735                                       struct pipe_resource *texture,
 736                                       const struct pipe_sampler_view *state)
 737 {
 738    struct virgl_context *vctx = virgl_context(ctx);
 739    struct virgl_sampler_view *grview;
 740    uint32_t handle;
 741    struct virgl_resource *res;
 742
 743    if (!state)
 744       return NULL;
 745
 746    grview = CALLOC_STRUCT(virgl_sampler_view);
 747    if (!grview)
 748       return NULL;
 749
 750    res = virgl_resource(texture);
 751    handle = virgl_object_assign_handle();
 752    virgl_encode_sampler_view(vctx, handle, res, state);
 753
 754    grview->base = *state;
 755    grview->base.reference.count = 1;
 756
 757    grview->base.texture = NULL;
 758    grview->base.context = ctx;
 759    pipe_resource_reference(&grview->base.texture, texture);
 760    grview->handle = handle;
 761    return &grview->base;
 762 }
 763
 764 static void virgl_set_sampler_views(struct pipe_context *ctx,
 765                                    enum pipe_shader_type shader_type,
 766                                    unsigned start_slot,
 767                                    unsigned num_views,
 768                                    struct pipe_sampler_view **views)
 769 {
 770    struct virgl_context *vctx = virgl_context(ctx);
 771    int i;
 772    uint32_t disable_mask = ~((1ull << num_views) - 1);
 773    struct virgl_textures_info *tinfo = &vctx->samplers[shader_type];
 774    uint32_t new_mask = 0;
 775    uint32_t remaining_mask;
 776
 777    remaining_mask = tinfo->enabled_mask & disable_mask;
 778
 779    while (remaining_mask) {
 780       i = u_bit_scan(&remaining_mask);
 781       assert(tinfo->views[i]);
 782
 783       pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], NULL);
 784    }
 785
 786    for (i = 0; i < num_views; i++) {
 787       struct virgl_sampler_view *grview = virgl_sampler_view(views[i]);
 788
 789       if (views[i] == (struct pipe_sampler_view *)tinfo->views[i])
 790          continue;
 791
 792       if (grview) {
 793          new_mask |= 1 << i;
 794          pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], views[i]);
 795       } else {
 796          pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], NULL);
 797          disable_mask |= 1 << i;
 798       }
 799    }
 800
 801    tinfo->enabled_mask &= ~disable_mask;
 802    tinfo->enabled_mask |= new_mask;
 803    virgl_encode_set_sampler_views(vctx, shader_type, start_slot, num_views, tinfo->views);
 804    virgl_attach_res_sampler_views(vctx, shader_type);
 805 }
 806
 807 static void
 808 virgl_texture_barrier(struct pipe_context *ctx, unsigned flags)
 809 {
 810    struct virgl_context *vctx = virgl_context(ctx);
 811    struct virgl_screen *rs = virgl_screen(ctx->screen);
 812
 813    if (!(rs->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER))
 814       return;
 815    virgl_encode_texture_barrier(vctx, flags);
 816 }
 817
 818 static void virgl_destroy_sampler_view(struct pipe_context *ctx,
 819                                  struct pipe_sampler_view *view)
 820 {
 821    struct virgl_context *vctx = virgl_context(ctx);
 822    struct virgl_sampler_view *grview = virgl_sampler_view(view);
 823
 824    virgl_encode_delete_object(vctx, grview->handle, VIRGL_OBJECT_SAMPLER_VIEW);
 825    pipe_resource_reference(&view->texture, NULL);
 826    FREE(view);
 827 }
 828
 829 static void *virgl_create_sampler_state(struct pipe_context *ctx,
 830                                         const struct pipe_sampler_state *state)
 831 {
 832    struct virgl_context *vctx = virgl_context(ctx);
 833    uint32_t handle;
 834
 835    handle = virgl_object_assign_handle();
 836
 837    virgl_encode_sampler_state(vctx, handle, state);
 838    return (void *)(unsigned long)handle;
 839 }
 840
 841 static void virgl_delete_sampler_state(struct pipe_context *ctx,
 842                                       void *ss)
 843 {
 844    struct virgl_context *vctx = virgl_context(ctx);
 845    uint32_t handle = (unsigned long)ss;
 846
 847    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SAMPLER_STATE);
 848 }
 849
 850 static void virgl_bind_sampler_states(struct pipe_context *ctx,
 851                                      enum pipe_shader_type shader,
 852                                      unsigned start_slot,
 853                                      unsigned num_samplers,
 854                                      void **samplers)
 855 {
 856    struct virgl_context *vctx = virgl_context(ctx);
 857    uint32_t handles[32];
 858    int i;
 859    for (i = 0; i < num_samplers; i++) {
 860       handles[i] = (unsigned long)(samplers[i]);
 861    }
 862    virgl_encode_bind_sampler_states(vctx, shader, start_slot, num_samplers, handles);
 863 }
 864
 865 static void virgl_set_polygon_stipple(struct pipe_context *ctx,
 866                                      const struct pipe_poly_stipple *ps)
 867 {
 868    struct virgl_context *vctx = virgl_context(ctx);
 869    virgl_encoder_set_polygon_stipple(vctx, ps);
 870 }
 871
 872 static void virgl_set_scissor_states(struct pipe_context *ctx,
 873                                     unsigned start_slot,
 874                                     unsigned num_scissor,
 875                                    const struct pipe_scissor_state *ss)
 876 {
 877    struct virgl_context *vctx = virgl_context(ctx);
 878    virgl_encoder_set_scissor_state(vctx, start_slot, num_scissor, ss);
 879 }
 880
 881 static void virgl_set_sample_mask(struct pipe_context *ctx,
 882                                  unsigned sample_mask)
 883 {
 884    struct virgl_context *vctx = virgl_context(ctx);
 885    virgl_encoder_set_sample_mask(vctx, sample_mask);
 886 }
 887
 888 static void virgl_set_min_samples(struct pipe_context *ctx,
 889                                  unsigned min_samples)
 890 {
 891    struct virgl_context *vctx = virgl_context(ctx);
 892    struct virgl_screen *rs = virgl_screen(ctx->screen);
 893
 894    if (!(rs->caps.caps.v2.capability_bits & VIRGL_CAP_SET_MIN_SAMPLES))
 895       return;
 896    virgl_encoder_set_min_samples(vctx, min_samples);
 897 }
 898
 899 static void virgl_set_clip_state(struct pipe_context *ctx,
 900                                 const struct pipe_clip_state *clip)
 901 {
 902    struct virgl_context *vctx = virgl_context(ctx);
 903    virgl_encoder_set_clip_state(vctx, clip);
 904 }
 905
 906 static void virgl_set_tess_state(struct pipe_context *ctx,
 907                                  const float default_outer_level[4],
 908                                  const float default_inner_level[2])
 909 {
 910    struct virgl_context *vctx = virgl_context(ctx);
 911    struct virgl_screen *rs = virgl_screen(ctx->screen);
 912
 913    if (!rs->caps.caps.v1.bset.has_tessellation_shaders)
 914       return;
 915    virgl_encode_set_tess_state(vctx, default_outer_level, default_inner_level);
 916 }
 917
 918 static void virgl_resource_copy_region(struct pipe_context *ctx,
 919                                       struct pipe_resource *dst,
 920                                       unsigned dst_level,
 921                                       unsigned dstx, unsigned dsty, unsigned dstz,
 922                                       struct pipe_resource *src,
 923                                       unsigned src_level,
 924                                       const struct pipe_box *src_box)
 925 {
 926    struct virgl_context *vctx = virgl_context(ctx);
 927    struct virgl_resource *dres = virgl_resource(dst);
 928    struct virgl_resource *sres = virgl_resource(src);
 929
 930    dres->clean = FALSE;
 931    virgl_encode_resource_copy_region(vctx, dres,
 932                                     dst_level, dstx, dsty, dstz,
 933                                     sres, src_level,
 934                                     src_box);
 935 }
 936
 937 static void
 938 virgl_flush_resource(struct pipe_context *pipe,
 939                     struct pipe_resource *resource)
 940 {
 941 }
 942
 943 static void virgl_blit(struct pipe_context *ctx,
 944                       const struct pipe_blit_info *blit)
 945 {
 946    struct virgl_context *vctx = virgl_context(ctx);
 947    struct virgl_resource *dres = virgl_resource(blit->dst.resource);
 948    struct virgl_resource *sres = virgl_resource(blit->src.resource);
 949
 950    dres->clean = FALSE;
 951    virgl_encode_blit(vctx, dres, sres,
 952                     blit);
 953 }
 954
 955 static void virgl_set_shader_buffers(struct pipe_context *ctx,
 956                                      enum pipe_shader_type shader,
 957                                      unsigned start_slot, unsigned count,
 958                                      const struct pipe_shader_buffer *buffers)
 959 {
 960    struct virgl_context *vctx = virgl_context(ctx);
 961    struct virgl_screen *rs = virgl_screen(ctx->screen);
 962
 963    for (unsigned i = 0; i < count; i++) {
 964       unsigned idx = start_slot + i;
 965
 966       if (buffers) {
 967          if (buffers[i].buffer) {
 968             pipe_resource_reference(&vctx->ssbos[shader][idx], buffers[i].buffer);
 969             continue;
 970          }
 971       }
 972       pipe_resource_reference(&vctx->ssbos[shader][idx], NULL);
 973    }
 974
 975    uint32_t max_shader_buffer = (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) ?
 976       rs->caps.caps.v2.max_shader_buffer_frag_compute :
 977       rs->caps.caps.v2.max_shader_buffer_other_stages;
 978    if (!max_shader_buffer)
 979       return;
 980    virgl_encode_set_shader_buffers(vctx, shader, start_slot, count, buffers);
 981 }
 982
 983 static void virgl_set_shader_images(struct pipe_context *ctx,
 984                                     enum pipe_shader_type shader,
 985                                     unsigned start_slot, unsigned count,
 986                                     const struct pipe_image_view *images)
 987 {
 988    struct virgl_context *vctx = virgl_context(ctx);
 989    struct virgl_screen *rs = virgl_screen(ctx->screen);
 990
 991    for (unsigned i = 0; i < count; i++) {
 992       unsigned idx = start_slot + i;
 993
 994       if (images) {
 995          if (images[i].resource) {
 996             pipe_resource_reference(&vctx->images[shader][idx], images[i].resource);
 997             continue;
 998          }
 999       }
1000       pipe_resource_reference(&vctx->images[shader][idx], NULL);
1001    }
1002
1003    uint32_t max_shader_images = (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) ?
1004      rs->caps.caps.v2.max_shader_image_frag_compute :
1005      rs->caps.caps.v2.max_shader_image_other_stages;
1006    if (!max_shader_images)
1007       return;
1008    virgl_encode_set_shader_images(vctx, shader, start_slot, count, images);
1009 }
1010
1011 static void virgl_memory_barrier(struct pipe_context *ctx,
1012                                  unsigned flags)
1013 {
1014    struct virgl_context *vctx = virgl_context(ctx);
1015    struct virgl_screen *rs = virgl_screen(ctx->screen);
1016
1017    if (!(rs->caps.caps.v2.capability_bits & VIRGL_CAP_MEMORY_BARRIER))
1018       return;
1019    virgl_encode_memory_barrier(vctx, flags);
1020 }
1021
1022 static void *virgl_create_compute_state(struct pipe_context *ctx,
1023                                         const struct pipe_compute_state *state)
1024 {
1025    struct virgl_context *vctx = virgl_context(ctx);
1026    uint32_t handle;
1027    const struct tgsi_token *new_tokens = state->prog;
1028    struct pipe_stream_output_info so_info = {};
1029    int ret;
1030
1031    handle = virgl_object_assign_handle();
1032    ret = virgl_encode_shader_state(vctx, handle, PIPE_SHADER_COMPUTE,
1033                                    &so_info,
1034                                    state->req_local_mem,
1035                                    new_tokens);
1036    if (ret) {
1037       return NULL;
1038    }
1039
1040    return (void *)(unsigned long)handle;
1041 }
1042
1043 static void virgl_bind_compute_state(struct pipe_context *ctx, void *state)
1044 {
1045    uint32_t handle = (unsigned long)state;
1046    struct virgl_context *vctx = virgl_context(ctx);
1047
1048    virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_COMPUTE);
1049 }
1050
1051 static void virgl_delete_compute_state(struct pipe_context *ctx, void *state)
1052 {
1053    uint32_t handle = (unsigned long)state;
1054    struct virgl_context *vctx = virgl_context(ctx);
1055
1056    virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
1057 }
1058
1059 static void virgl_launch_grid(struct pipe_context *ctx,
1060                               const struct pipe_grid_info *info)
1061 {
1062    struct virgl_context *vctx = virgl_context(ctx);
1063    virgl_encode_launch_grid(vctx, info);
1064 }
1065
1066 static void
1067 virgl_context_destroy( struct pipe_context *ctx )
1068 {
1069    struct virgl_context *vctx = virgl_context(ctx);
1070    struct virgl_screen *rs = virgl_screen(ctx->screen);
1071
1072    vctx->framebuffer.zsbuf = NULL;
1073    vctx->framebuffer.nr_cbufs = 0;
1074    virgl_encoder_destroy_sub_ctx(vctx, vctx->hw_sub_ctx_id);
1075    virgl_flush_eq(vctx, vctx);
1076
1077    rs->vws->cmd_buf_destroy(vctx->cbuf);
1078    if (vctx->uploader)
1079       u_upload_destroy(vctx->uploader);
1080    util_primconvert_destroy(vctx->primconvert);
1081
1082    slab_destroy_child(&vctx->texture_transfer_pool);
1083    FREE(vctx);
1084 }
1085
1086 static void virgl_get_sample_position(struct pipe_context *ctx,
1087                                       unsigned sample_count,
1088                                       unsigned index,
1089                                       float *out_value)
1090 {
1091    struct virgl_context *vctx = virgl_context(ctx);
1092    struct virgl_screen *vs = virgl_screen(vctx->base.screen);
1093
1094    if (sample_count > vs->caps.caps.v1.max_samples) {
1095       debug_printf("VIRGL: requested %d MSAA samples, but only %d supported\n",
1096                    sample_count, vs->caps.caps.v1.max_samples);
1097       return;
1098    }
1099
1100    /* The following is basically copied from dri/i965gen6_get_sample_position
1101     * The only addition is that we hold the msaa positions for all sample
1102     * counts in a flat array. */
1103    uint32_t bits = 0;
1104    if (sample_count == 1) {
1105       out_value[0] = out_value[1] = 0.5f;
1106       return;
1107    } else if (sample_count == 2) {
1108       bits = vs->caps.caps.v2.sample_locations[0] >> (8 * index);
1109    } else if (sample_count <= 4) {
1110       bits = vs->caps.caps.v2.sample_locations[1] >> (8 * index);
1111    } else if (sample_count <= 8) {
1112       bits = vs->caps.caps.v2.sample_locations[2 + (index >> 2)] >> (8 * (index & 3));
1113    } else if (sample_count <= 16) {
1114       bits = vs->caps.caps.v2.sample_locations[4 + (index >> 2)] >> (8 * (index & 3));
1115    }
1116    out_value[0] = ((bits >> 4) & 0xf) / 16.0f;
1117    out_value[1] = (bits & 0xf) / 16.0f;
1118
1119    if (virgl_debug & VIRGL_DEBUG_VERBOSE)
1120       debug_printf("VIRGL: sample postion [%2d/%2d] = (%f, %f)\n",
1121                    index, sample_count, out_value[0], out_value[1]);
1122 }
1123
1124 struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
1125                                           void *priv,
1126                                           unsigned flags)
1127 {
1128    struct virgl_context *vctx;
1129    struct virgl_screen *rs = virgl_screen(pscreen);
1130    vctx = CALLOC_STRUCT(virgl_context);
1131
1132    vctx->cbuf = rs->vws->cmd_buf_create(rs->vws);
1133    if (!vctx->cbuf) {
1134       FREE(vctx);
1135       return NULL;
1136    }
1137
1138    vctx->base.destroy = virgl_context_destroy;
1139    vctx->base.create_surface = virgl_create_surface;
1140    vctx->base.surface_destroy = virgl_surface_destroy;
1141    vctx->base.set_framebuffer_state = virgl_set_framebuffer_state;
1142    vctx->base.create_blend_state = virgl_create_blend_state;
1143    vctx->base.bind_blend_state = virgl_bind_blend_state;
1144    vctx->base.delete_blend_state = virgl_delete_blend_state;
1145    vctx->base.create_depth_stencil_alpha_state = virgl_create_depth_stencil_alpha_state;
1146    vctx->base.bind_depth_stencil_alpha_state = virgl_bind_depth_stencil_alpha_state;
1147    vctx->base.delete_depth_stencil_alpha_state = virgl_delete_depth_stencil_alpha_state;
1148    vctx->base.create_rasterizer_state = virgl_create_rasterizer_state;
1149    vctx->base.bind_rasterizer_state = virgl_bind_rasterizer_state;
1150    vctx->base.delete_rasterizer_state = virgl_delete_rasterizer_state;
1151
1152    vctx->base.set_viewport_states = virgl_set_viewport_states;
1153    vctx->base.create_vertex_elements_state = virgl_create_vertex_elements_state;
1154    vctx->base.bind_vertex_elements_state = virgl_bind_vertex_elements_state;
1155    vctx->base.delete_vertex_elements_state = virgl_delete_vertex_elements_state;
1156    vctx->base.set_vertex_buffers = virgl_set_vertex_buffers;
1157    vctx->base.set_constant_buffer = virgl_set_constant_buffer;
1158
1159    vctx->base.set_tess_state = virgl_set_tess_state;
1160    vctx->base.create_vs_state = virgl_create_vs_state;
1161    vctx->base.create_tcs_state = virgl_create_tcs_state;
1162    vctx->base.create_tes_state = virgl_create_tes_state;
1163    vctx->base.create_gs_state = virgl_create_gs_state;
1164    vctx->base.create_fs_state = virgl_create_fs_state;
1165
1166    vctx->base.bind_vs_state = virgl_bind_vs_state;
1167    vctx->base.bind_tcs_state = virgl_bind_tcs_state;
1168    vctx->base.bind_tes_state = virgl_bind_tes_state;
1169    vctx->base.bind_gs_state = virgl_bind_gs_state;
1170    vctx->base.bind_fs_state = virgl_bind_fs_state;
1171
1172    vctx->base.delete_vs_state = virgl_delete_vs_state;
1173    vctx->base.delete_tcs_state = virgl_delete_tcs_state;
1174    vctx->base.delete_tes_state = virgl_delete_tes_state;
1175    vctx->base.delete_gs_state = virgl_delete_gs_state;
1176    vctx->base.delete_fs_state = virgl_delete_fs_state;
1177
1178    vctx->base.create_compute_state = virgl_create_compute_state;
1179    vctx->base.bind_compute_state = virgl_bind_compute_state;
1180    vctx->base.delete_compute_state = virgl_delete_compute_state;
1181    vctx->base.launch_grid = virgl_launch_grid;
1182
1183    vctx->base.clear = virgl_clear;
1184    vctx->base.draw_vbo = virgl_draw_vbo;
1185    vctx->base.flush = virgl_flush_from_st;
1186    vctx->base.screen = pscreen;
1187    vctx->base.create_sampler_view = virgl_create_sampler_view;
1188    vctx->base.sampler_view_destroy = virgl_destroy_sampler_view;
1189    vctx->base.set_sampler_views = virgl_set_sampler_views;
1190    vctx->base.texture_barrier = virgl_texture_barrier;
1191
1192    vctx->base.create_sampler_state = virgl_create_sampler_state;
1193    vctx->base.delete_sampler_state = virgl_delete_sampler_state;
1194    vctx->base.bind_sampler_states = virgl_bind_sampler_states;
1195
1196    vctx->base.set_polygon_stipple = virgl_set_polygon_stipple;
1197    vctx->base.set_scissor_states = virgl_set_scissor_states;
1198    vctx->base.set_sample_mask = virgl_set_sample_mask;
1199    vctx->base.set_min_samples = virgl_set_min_samples;
1200    vctx->base.set_stencil_ref = virgl_set_stencil_ref;
1201    vctx->base.set_clip_state = virgl_set_clip_state;
1202
1203    vctx->base.set_blend_color = virgl_set_blend_color;
1204
1205    vctx->base.get_sample_position = virgl_get_sample_position;
1206
1207    vctx->base.resource_copy_region = virgl_resource_copy_region;
1208    vctx->base.flush_resource = virgl_flush_resource;
1209    vctx->base.blit =  virgl_blit;
1210
1211    vctx->base.set_shader_buffers = virgl_set_shader_buffers;
1212    vctx->base.set_shader_images = virgl_set_shader_images;
1213    vctx->base.memory_barrier = virgl_memory_barrier;
1214
1215    virgl_init_context_resource_functions(&vctx->base);
1216    virgl_init_query_functions(vctx);
1217    virgl_init_so_functions(vctx);
1218
1219    list_inithead(&vctx->to_flush_bufs);
1220    slab_create_child(&vctx->texture_transfer_pool, &rs->texture_transfer_pool);
1221
1222    vctx->primconvert = util_primconvert_create(&vctx->base, rs->caps.caps.v1.prim_mask);
1223    vctx->uploader = u_upload_create(&vctx->base, 1024 * 1024,
1224                                      PIPE_BIND_INDEX_BUFFER, PIPE_USAGE_STREAM, 0);
1225    if (!vctx->uploader)
1226            goto fail;
1227    vctx->base.stream_uploader = vctx->uploader;
1228    vctx->base.const_uploader = vctx->uploader;
1229
1230    vctx->hw_sub_ctx_id = rs->sub_ctx_id++;
1231    virgl_encoder_create_sub_ctx(vctx, vctx->hw_sub_ctx_id);
1232
1233    virgl_encoder_set_sub_ctx(vctx, vctx->hw_sub_ctx_id);
1234    return &vctx->base;
1235 fail:
1236    return NULL;
1237 }