radeon/vcn: add H.264 constrained baseline support
[mesa.git] / src / gallium / drivers / virgl / virgl_resource.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_format.h"
24 #include "util/u_inlines.h"
25 #include "util/u_memory.h"
26 #include "virgl_context.h"
27 #include "virgl_resource.h"
28 #include "virgl_screen.h"
29
30 bool virgl_res_needs_flush(struct virgl_context *vctx,
31 struct virgl_transfer *trans)
32 {
33 struct virgl_screen *vs = virgl_screen(vctx->base.screen);
34 struct virgl_resource *res = virgl_resource(trans->base.resource);
35
36 if (trans->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED)
37 return false;
38 if (!vs->vws->res_is_referenced(vs->vws, vctx->cbuf, res->hw_res))
39 return false;
40 if (res->clean_mask & (1 << trans->base.level)) {
41 if (vctx->num_draws == 0 && vctx->num_compute == 0)
42 return false;
43 if (!virgl_transfer_queue_is_queued(&vctx->queue, trans))
44 return false;
45 }
46
47 return true;
48 }
49
50 bool virgl_res_needs_readback(struct virgl_context *vctx,
51 struct virgl_resource *res,
52 unsigned usage, unsigned level)
53 {
54 bool readback = true;
55 if (res->clean_mask & (1 << level))
56 readback = false;
57 else if (usage & PIPE_TRANSFER_DISCARD_RANGE)
58 readback = false;
59 else if ((usage & (PIPE_TRANSFER_WRITE | PIPE_TRANSFER_FLUSH_EXPLICIT)) ==
60 (PIPE_TRANSFER_WRITE | PIPE_TRANSFER_FLUSH_EXPLICIT))
61 readback = false;
62 return readback;
63 }
64
65 static struct pipe_resource *virgl_resource_create(struct pipe_screen *screen,
66 const struct pipe_resource *templ)
67 {
68 unsigned vbind;
69 struct virgl_screen *vs = virgl_screen(screen);
70 struct virgl_resource *res = CALLOC_STRUCT(virgl_resource);
71
72 res->u.b = *templ;
73 res->u.b.screen = &vs->base;
74 pipe_reference_init(&res->u.b.reference, 1);
75 vbind = pipe_to_virgl_bind(templ->bind);
76 virgl_resource_layout(&res->u.b, &res->metadata);
77 res->hw_res = vs->vws->resource_create(vs->vws, templ->target,
78 templ->format, vbind,
79 templ->width0,
80 templ->height0,
81 templ->depth0,
82 templ->array_size,
83 templ->last_level,
84 templ->nr_samples,
85 res->metadata.total_size);
86 if (!res->hw_res) {
87 FREE(res);
88 return NULL;
89 }
90
91 res->clean_mask = (1 << VR_MAX_TEXTURE_2D_LEVELS) - 1;
92
93 if (templ->target == PIPE_BUFFER)
94 virgl_buffer_init(res);
95 else
96 virgl_texture_init(res);
97
98 return &res->u.b;
99
100 }
101
102 static struct pipe_resource *virgl_resource_from_handle(struct pipe_screen *screen,
103 const struct pipe_resource *templ,
104 struct winsys_handle *whandle,
105 unsigned usage)
106 {
107 struct virgl_screen *vs = virgl_screen(screen);
108 if (templ->target == PIPE_BUFFER)
109 return NULL;
110
111 struct virgl_resource *res = CALLOC_STRUCT(virgl_resource);
112 res->u.b = *templ;
113 res->u.b.screen = &vs->base;
114 pipe_reference_init(&res->u.b.reference, 1);
115
116 res->hw_res = vs->vws->resource_create_from_handle(vs->vws, whandle);
117 if (!res->hw_res) {
118 FREE(res);
119 return NULL;
120 }
121
122 virgl_texture_init(res);
123
124 return &res->u.b;
125 }
126
127 void virgl_init_screen_resource_functions(struct pipe_screen *screen)
128 {
129 screen->resource_create = virgl_resource_create;
130 screen->resource_from_handle = virgl_resource_from_handle;
131 screen->resource_get_handle = u_resource_get_handle_vtbl;
132 screen->resource_destroy = u_resource_destroy_vtbl;
133 }
134
135 static void virgl_buffer_subdata(struct pipe_context *pipe,
136 struct pipe_resource *resource,
137 unsigned usage, unsigned offset,
138 unsigned size, const void *data)
139 {
140 struct pipe_box box;
141
142 if (offset == 0 && size == resource->width0)
143 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
144 else
145 usage |= PIPE_TRANSFER_DISCARD_RANGE;
146
147 u_box_1d(offset, size, &box);
148
149 if (resource->width0 >= getpagesize())
150 u_default_buffer_subdata(pipe, resource, usage, offset, size, data);
151 else
152 virgl_transfer_inline_write(pipe, resource, 0, usage, &box, data, 0, 0);
153 }
154
155 void virgl_init_context_resource_functions(struct pipe_context *ctx)
156 {
157 ctx->transfer_map = u_transfer_map_vtbl;
158 ctx->transfer_flush_region = u_transfer_flush_region_vtbl;
159 ctx->transfer_unmap = u_transfer_unmap_vtbl;
160 ctx->buffer_subdata = virgl_buffer_subdata;
161 ctx->texture_subdata = u_default_texture_subdata;
162 }
163
164 void virgl_resource_layout(struct pipe_resource *pt,
165 struct virgl_resource_metadata *metadata)
166 {
167 unsigned level, nblocksy;
168 unsigned width = pt->width0;
169 unsigned height = pt->height0;
170 unsigned depth = pt->depth0;
171 unsigned buffer_size = 0;
172
173 for (level = 0; level <= pt->last_level; level++) {
174 unsigned slices;
175
176 if (pt->target == PIPE_TEXTURE_CUBE)
177 slices = 6;
178 else if (pt->target == PIPE_TEXTURE_3D)
179 slices = depth;
180 else
181 slices = pt->array_size;
182
183 nblocksy = util_format_get_nblocksy(pt->format, height);
184 metadata->stride[level] = util_format_get_stride(pt->format, width);
185 metadata->layer_stride[level] = nblocksy * metadata->stride[level];
186 metadata->level_offset[level] = buffer_size;
187
188 buffer_size += slices * metadata->layer_stride[level];
189
190 width = u_minify(width, 1);
191 height = u_minify(height, 1);
192 depth = u_minify(depth, 1);
193 }
194
195 if (pt->nr_samples <= 1)
196 metadata->total_size = buffer_size;
197 else /* don't create guest backing store for MSAA */
198 metadata->total_size = 0;
199 }
200
201 struct virgl_transfer *
202 virgl_resource_create_transfer(struct slab_child_pool *pool,
203 struct pipe_resource *pres,
204 const struct virgl_resource_metadata *metadata,
205 unsigned level, unsigned usage,
206 const struct pipe_box *box)
207 {
208 struct virgl_transfer *trans;
209 enum pipe_format format = pres->format;
210 const unsigned blocksy = box->y / util_format_get_blockheight(format);
211 const unsigned blocksx = box->x / util_format_get_blockwidth(format);
212
213 unsigned offset = metadata->level_offset[level];
214 if (pres->target == PIPE_TEXTURE_CUBE ||
215 pres->target == PIPE_TEXTURE_CUBE_ARRAY ||
216 pres->target == PIPE_TEXTURE_3D ||
217 pres->target == PIPE_TEXTURE_2D_ARRAY) {
218 offset += box->z * metadata->layer_stride[level];
219 }
220 else if (pres->target == PIPE_TEXTURE_1D_ARRAY) {
221 offset += box->z * metadata->stride[level];
222 assert(box->y == 0);
223 } else if (pres->target == PIPE_BUFFER) {
224 assert(box->y == 0 && box->z == 0);
225 } else {
226 assert(box->z == 0);
227 }
228
229 offset += blocksy * metadata->stride[level];
230 offset += blocksx * util_format_get_blocksize(format);
231
232 trans = slab_alloc(pool);
233 if (!trans)
234 return NULL;
235
236 trans->base.resource = pres;
237 trans->base.level = level;
238 trans->base.usage = usage;
239 trans->base.box = *box;
240 trans->base.stride = metadata->stride[level];
241 trans->base.layer_stride = metadata->layer_stride[level];
242 trans->offset = offset;
243 util_range_init(&trans->range);
244
245 if (trans->base.resource->target != PIPE_TEXTURE_3D &&
246 trans->base.resource->target != PIPE_TEXTURE_CUBE &&
247 trans->base.resource->target != PIPE_TEXTURE_1D_ARRAY &&
248 trans->base.resource->target != PIPE_TEXTURE_2D_ARRAY &&
249 trans->base.resource->target != PIPE_TEXTURE_CUBE_ARRAY)
250 trans->l_stride = 0;
251 else
252 trans->l_stride = trans->base.layer_stride;
253
254 return trans;
255 }
256
257 void virgl_resource_destroy_transfer(struct slab_child_pool *pool,
258 struct virgl_transfer *trans)
259 {
260 util_range_destroy(&trans->range);
261 slab_free(pool, trans);
262 }
263
264 void virgl_resource_destroy(struct pipe_screen *screen,
265 struct pipe_resource *resource)
266 {
267 struct virgl_screen *vs = virgl_screen(screen);
268 struct virgl_resource *res = virgl_resource(resource);
269 vs->vws->resource_unref(vs->vws, res->hw_res);
270 FREE(res);
271 }
272
273 boolean virgl_resource_get_handle(struct pipe_screen *screen,
274 struct pipe_resource *resource,
275 struct winsys_handle *whandle)
276 {
277 struct virgl_screen *vs = virgl_screen(screen);
278 struct virgl_resource *res = virgl_resource(resource);
279
280 if (res->u.b.target == PIPE_BUFFER)
281 return FALSE;
282
283 return vs->vws->resource_get_handle(vs->vws, res->hw_res,
284 res->metadata.stride[0],
285 whandle);
286 }
287
288 void virgl_resource_dirty(struct virgl_resource *res, uint32_t level)
289 {
290 if (res) {
291 if (res->u.b.target == PIPE_BUFFER)
292 res->clean_mask &= ~1;
293 else
294 res->clean_mask &= ~(1 << level);
295 }
296 }